DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-4 have been considered but are moot due to new grounds of rejection.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 1 is rejected under 35 U.S.C. 103 as being unpatentable over Wong (US 20090219090) in view of Toth et al. (Overview of system-level protection in class-D audio amplifiers, https://www.ti.com/lit/wp/slyy125/slyy125.pdf?ts=1785307628149 ).
Regarding claim 1, Wong teach teaches (Fig. 3, 5A) a circuit comprising:
short detection circuitry (DC offset protection 19) having an input adapted to be coupled to an output of an amplifier (input to circuit 19 is coupled to output of class D power amplifier channel 25A, B), and
an output (output of circuit 19), wherein the short detection circuitry is adapted to: receive a signal representing an output current from the output of the amplifier (see Fig. 3 - DC offset protection 19 receives signals from 25A,B);
filter the signal (see Fig. 5A - DC offset protection 19 includes low pass filter 26C,D) to determine a direct current (DC) offset associated with the output current (see para [0042]- DC offset protection 19 constantly monitors for DC offset);
cause the output of the short detection circuitry to indicate whether a condition is present at the output of the amplifier based on the DC offset (shut down signal SD will be sent by DC offset protection 19 when offset is beyond a threshold - see para [0046]).
Wong teaches in para 0002 that the DC offset is indicative of various conditions, but does not explicitly teach a short circuit condition.
Toth teach DC offset detection is representative of short circuits (see pg. 7 – “DC detection” paragraph).
The prior art teaches all of the claimed limitations. The combination of the known elements is achieved by using a known method of using the DC offset sensed by Wong to indicate short circuits as taught by Toth. It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the circuit taught by Wong to indicate short circuit conditions as taught by Toth as not more than predictable use of prior art elements according to established functions.
Claims 2 - 4 are rejected under 35 U.S.C. 103 as being unpatentable over Wong (US 20090219090) in view of Toth et al. (Overview of system-level protection in class-D audio amplifiers, https://www.ti.com/lit/wp/slyy125/slyy125.pdf?ts=1785307628149 ) further in view of Ikejiri et al. (US 20100019775).
Wong teach the instant invention except the following claim limitations.
Regarding claim 2, Wong does not teach wherein the short detection circuitry is adapted to determine a value of the short detection circuitry output based on comparison of the DC offset to a threshold.
Ikejiri et al. teach wherein the short detection circuitry is adapted to determine a value of the short detection circuitry output based on comparison of the DC offset to a threshold. ([0038] The short-circuit detection signal output part 23 generates a short-circuit detection signal DT in response to the H-side comparison result signal JH and the L-side comparison result signal JL. In more detail, when the H-side comparison result signal JH indicates that the signal level of the output pulse signal DOUT is lower than the high-side detection threshold value, the short-circuit detection signal output part 23 generates the short-circuit detection signal. When the L-side comparison result signal JL indicates that the signal level of the output pulse signal DOUT is higher than the low-side detection threshold value, the short-circuit detection signal output part 23 generates the short-circuit detection signal DT.) Examiner’s position is that the output of the short detection signal output part 23 is determines a value based off a comparison to a threshold level.
Therefore it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify Wong to include the teaching of wherein the short detection circuitry is adapted to determine a value of the short detection circuitry output based on comparison of the DC offset to a threshold to indicate if a fault is present.
Regarding 3, Wong does not teach wherein the threshold is programmable based on a type of the amplifier.
Ikejiri et al. teach wherein the threshold is programmable based on a type of the amplifier. (Note predetermined threshold, par. 0037) Examiner’s position is that circuits are designed with certain specs and that the threshold would be programmed based on the type of amplifier. Examiner further interprets type of amplifier as the specifications of the amplifier.
Therefore it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify Wong to include the teaching of wherein the threshold is programmable based on a type of the amplifier so that the amplifier setting can be customized for the circuit it will be utilized in.
Regarding claim 4, Wong does not teach the short detection circuitry is adapted to determine the value of the output of the short detection circuitry to indicate the short circuit condition is present in response to a magnitude of the DC offset satisfying the threshold.
Ikejiri et al. teach the short detection circuitry is adapted to determine the value of the output of the short detection circuitry to indicate the short circuit condition is present in response to a magnitude of the DC offset satisfying the threshold.
([0038] The short-circuit detection signal output part 23 generates a short-circuit detection signal DT in response to the H-side comparison result signal JH and the L-side comparison result signal JL. In more detail, when the H-side comparison result signal JH indicates that the signal level of the output pulse signal DOUT is lower than the high-side detection threshold value, the short-circuit detection signal output part 23 generates the short-circuit detection signal. When the L-side comparison result signal JL indicates that the signal level of the output pulse signal DOUT is higher than the low-side detection threshold value, the short-circuit detection signal output part 23 generates the short-circuit detection signal DT.) Examiner’s position is that the output of the short detection signal output part 23 is set to a level based off a comparison to a threshold level and level is output as a short circuit detection signal.
Therefore it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify Wong to include the teaching of the short detection circuitry is adapted to determine the value of the output of the short detection circuitry to indicate the short circuit condition is present in response to a magnitude of the DC offset satisfying the threshold indicate a fault in the device.
Allowable Subject Matter
Claims 5-8 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 5, wherein the amplifier is a switching amplifier, the output of the short detection circuitry corresponds to a register, and the short detection circuitry is adapted to provide a value to the register based on a polarity of the DC offset to indicate whether the short circuit condition is from the output of the amplifier to power or ground.
Regarding claim 6, wherein the amplifier is a switching amplifier, the output of the amplifier is a positive output of the amplifier, the input of the short detection circuitry is a first input of the short detection circuitry adapted to be coupled to the positive output of the switching amplifier, the output current is a first output current associated with the positive output of the switching amplifier, the signal is a first signal representing the first output current, the DC offset is a first DC offset associated with the first output current, and the short detection circuitry further includes a second input of the short detection circuitry adapted to be coupled to a negative output of the switching amplifier, wherein the short detection circuitry is adapted to: receive a second signal representing a second output current from the negative output of the switching amplifier; filter the second signal to determine a second DC offset associated with the second output current; and configure the output of the short detection circuitry based on comparison of the first DC offset to a threshold and comparison of the second DC offset to the threshold.
Claims 9-20 are allowed.
Upon conclusion of a comprehensive search of the pertinent prior art, the Office indicates that the claims are allowable.
Regarding independent claims 9 and 15 , patentability exists, at least in part, with the claimed features discussed on pages 7 and 8 of Non-Final rejection mailed 9/18/2025.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DEMETRIUS R PRETLOW whose telephone number is (571)272-3441. The examiner can normally be reached M-F, 5:30-1:30.
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/DEMETRIUS R PRETLOW/Examiner, Art Unit 2858
/LEE E RODAK/Supervisory Patent Examiner, Art Unit 2858
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