DETAILED ACTION
This office action is in response to the amendment filed 12/29/2025.
Claim Objections
Claims 3 and 17 are objected to because of the following informalities:
Re claim 3, it appears that “the first terminal” (second to last line) should be “the first terminal of the second resistor”.
Re claim 17, it appears that “a current limit” (line 1) should be “the current limit”.
Response to Arguments
Applicant’s argument with respect to claims 8 and 15-20 have been considered but are moot in view of the new grounds of rejection.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 8 and 15-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kimura (US 2009/0273323).
Re claim 8, Kimura teaches a system [Fig 2] comprising: regulator circuitry [Q1, R1, 110] having a transistor [Q1] coupled between a first terminal [at VIN] and a second terminal [at VOUT]; circuitry [Q5, 114, Q6, Q3] having an input [at the gate of Q5] coupled to the second terminal and an output [second terminal of Q3] coupled to a control terminal of the transistor [at Q2] and configurable to set a current limit [Iref3] of the transistor responsive to a voltage at the second terminal [paragraphs 40-41, conductivity of Q5 is based on the increasing current at terminal VOUT, which determines current at Iref1 and Iref3].
Re claim 15, Kimura teaches a method [Fig 1] comprising: sensing, by circuitry [Q5, 114, Q6, 122], whether a voltage [VS] at an output of regulator circuitry [Q1, 110, 102] is less than a threshold voltage [minimum gate voltage required, paragraph 44]; and setting, by the circuitry, a current limit [Iref2] at the output of the regulator circuitry responsive to the sensing [paragraphs 44, the current limit of 216 is determined based on the output voltage].
Re claim 16, Kimura teaches setting the output voltage of the regulator circuitry to a fixed voltage [paragraph 35, circuit is maintained at the output voltage under normal load conditions].
Re claim 17, Kimura teaches wherein setting a current limit at the output of the regulator circuitry responsive to the sensing includes: responsive to sensing that the voltage is below a threshold [V4], setting the current limit to a first value [paragraph 44, Q8 is no longer conductive, thus reducing Iref], and responsive to sensing that the voltage is above the threshold, setting the current limit to a second value larger than the first value [Q8 is conducting, thus Iref is the combination of 330 and 332].
Re claim 18, Kimura teaches sensing a current [IOUT] at the output of the regulator circuitry at the current limit by sensing a control terminal voltage of a transistor [Q1] of the regulator circuitry, and setting the control terminal voltage responsive to sensing that the current exceeds the current limit [paragraph 41, the control voltage increases as a result of the current reaching the threshold].
Re claim 19, Kimura teaches wherein setting the current limit to a first value includes setting the current limit using a first current source [330, Fig 3], and setting the current limit to a second value includes setting the current limit using the first current source and a second current source [332].
Re claim 20, wherein setting the current limit to the first value includes disabling a switch [Q8] coupled to second current source, and setting the current limit to the second value includes enabling the switch [paragraph 44].
Allowable Subject Matter
Claims 1-7 are allowed.
Claims 9-14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Re claim 1 and its dependents thereof, the closet prior art (which has been made of record) fail to disclose (by themselves or in combination): “a transistor having a first current terminal, a second current terminal, and a control terminal, the first current terminal coupled to the third terminal of the current sense and limit circuitry, the control terminal coupled to the second terminal of the regulator circuitry; and current source circuitry having a terminal coupled to the second current terminal of the transistor, in which a state of the transistor and the current source circuitry set the current limit” in combination with the additionally claimed features, as are claimed by Applicant.
Re claim 9 and its dependents thereof, the closet prior art (which has been made of record) fail to disclose (by themselves or in combination): “a variable current source having a control input coupled to the input of the circuitry: and an amplifier having a first input coupled to an output of the current sense circuitry, a second input coupled to an output of the variable current source, and an output coupled to the output of the circuitry” in combination with the additionally claimed features, as are claimed by Applicant.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LAKAISHA JACKSON whose telephone number is (571)270-3111. The examiner can normally be reached on M-F 8:00-5:00.
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/LaKaisha Jackson/
Examiner, Art Unit 2838
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