DETAILED ACTION
Claims 1-20 are pending.
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 7/10/2025 has been entered.
The office acknowledges the following papers:
Claims and remarks filed on 7/10/2025.
New Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-4 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. The claims recite a mental process of receiving an input representation of a computational workflow and converting the received workflow into an intermediary format representation of the computational workflow. Additionally, the workflow includes configuration of a device and/or resource also covers a mental process.
The receiving, converting, and configuring at least one of a device and resource is a process that, under its broadest reasonable interpretation, covers a mental process of the mind but for the recitation of generic computer components (e.g. at least one processing circuit, device, resource).
This judicial exception is not integrated into a practical application. In particular, the claim only recites “at least one processing circuit” to perform the receiving and converting steps. The “at least one processing circuit” is recited at a high-level of generality such that it amounts to no more than mere instructions to apply the exception using a generic computer component. Therefore, this additional element doesn’t integrate the abstract idea into a practical application because it doesn’t impose any meaningful limits on practicing the abstract idea.
The claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception. The added workflow corresponding to one or more tasks simply imposes that the mental process of receiving and converting is performed for a larger set of operations that represents a task. Thus, the claims are directed towards an abstract idea and aren’t patent eligible.
Claims 5-18 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. The claims recite a mental process of receiving an intermediary format representation of a computational workflow and executing the intermediary format representation of the computational workflow. Additionally, the workflow including configuration of a device and/or resource also covers a mental process.
The receiving, executing, and configuring at least one of a device and resource is a process that, under its broadest reasonable interpretation, covers a mental process of the mind but for the recitation of generic computer components (e.g. at least one processing circuit, device, resource).
This judicial exception is not integrated into a practical application. In particular, the claim only recites “at least one processing circuit” to perform the receiving and executing steps. The “at least one processing circuit” is recited at a high-level of generality such that it amounts to no more than mere instructions to apply the exception using a generic computer component. Therefore, this additional element doesn’t integrate the abstract idea into a practical application because it doesn’t impose any meaningful limits on practicing the abstract idea.
The claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception. The added workflow corresponding to one or more tasks simply imposes that the mental process of receiving and executing is performed for a larger set of operations that represents a task. Thus, the claims are directed towards an abstract idea and aren’t patent eligible.
Claims 19-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. The claims recite a mental process of receiving an intermediary format representation of a computational workflow and executing the intermediary format representation of the computational workflow. Additionally, the workflow including configuration of a device and/or resource also covers a mental process.
The receiving, executing, and configuring at least one of a device and resource is a process that, under its broadest reasonable interpretation, covers a mental process of the mind but for the recitation of generic computer components (e.g. at least one communication interface, computational resource, device, resource).
This judicial exception is not integrated into a practical application. In particular, the claim only recites “the communication interface” and “the at least one computational resource” to perform the receiving and executing steps. The “the communication interface” and “the at least one computational resource” elements are recited at a high-level of generality such that it amounts to no more than mere instructions to apply the exception using a generic computer component. Therefore, this additional element doesn’t integrate the abstract idea into a practical application because it doesn’t impose any meaningful limits on practicing the abstract idea.
The claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception. The added workflow corresponding to one or more tasks simply imposes that the mental process of receiving and executing is performed for a larger set of operations that represents a task. Thus, the claims are directed towards an abstract idea and aren’t patent eligible.
New Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-9 and 12-20 are rejected under 35 U.S.C. 103 as being unpatentable over Lai et al. (U.S. 2017/0177343), in view of Official Notice.
As per claim 1:
Lai disclosed a method comprising:
receiving, by at least one processing circuit, an input representation of a workflow for a computational device, wherein the input representation comprises at least one instruction in an input format (Lai: Figures 1 and 4 elements 102-106 and 402, paragraphs 31, 37, and 40)(The processor receives instruction code (i.e. input representation of a workflow).); and
converting, by the at least one processing circuit, the input representation to an intermediary format (IF) representation of the workflow (Lai: Figures 1 and 4 elements 106 and 402, paragraphs 31, 37, and 40)(The received code is translated and converted into processor code (i.e. intermediary format).);
wherein the IF representation comprises at least one IF instruction configured to execute the workflow (Lai: Figures 1 and 4 elements 106, 112, and 402, paragraphs 31, 37, and 40)(The received code is translated into processor code (i.e. IF instruction). The translated code includes instructions executable by the processor (i.e. workflow).).
wherein the workflow corresponds to one or more tasks to complete a process executable by one or more device format instructions at the computational device and includes at least configuring at least one of a device and a resource to perform one or more operations (Lai: Figures 1 and 4 elements 110-112 and 406-408, paragraphs 37 and 40)(The decoded processor code instructions (i.e. device format instructions) configures the execution unit (i.e. resource) to execute the instruction (i.e. perform operation(s)). Official notice is given that tasks comprising a set of instructions can be executed on processors for the advantage of executing larger programs. Thus, it would have been obvious to one of ordinary skill in the art to implement task execution within Lai.).
As per claim 2:
Lai disclosed the method of claim 1, wherein the at least one IF instruction comprises an instruction to perform, by the computational device, at least one of a load operation, a store operation, or a computational operation (Lai: Figures 1, 4, 6, and 8 elements 106, 402, 601, and 801, paragraphs 31, 37, 40, 43, and 53)(The received code is translated into processor code (i.e. intermediary format). The translated processor code includes loads, stores, and computational operations.).
As per claim 3:
Lai disclosed the method of claim 1, wherein converting the IF representation comprises generating the input representation based on an arrangement of the workflow (Lai: Figures 1 and 4 elements 106 and 402, paragraphs 31, 37, and 40)(The received code is translated into processor code (i.e. intermediary format) based on existing dependencies within the received code.).
As per claim 4:
Lai disclosed the method of claim 1, wherein the input representation is a first input representation, the input format is a first input format (Lai: Figures 1 and 4 elements 102-106 and 402, paragraphs 31, 37, and 40)(The processor receives instruction code in a first input format.), the method further comprising:
receiving, by the at least one processing circuit, a second input representation of the workflow, wherein the second input representation comprises at least one instruction in a second input format (Lai: Figures 1 and 4 elements 102-106 and 402, paragraphs 31, 37, and 40)(The processor receives additional instruction code in a second input format.); and
generating, by the at least one processing circuit, based on the second input representation, the IF representation of the workflow (Lai: Figures 1 and 4 elements 106 and 402, paragraphs 31, 37, and 40)(The received code is translated into processor code (i.e. intermediary format).).
As per claim 5:
Lai disclosed a method comprising:
receiving, by at least one processing circuit, an intermediary format (IF) representation of a workflow for a computational device, wherein the IF representation comprises at least one intermediary format instruction (Lai: Figure 2 elements 202 and 206, paragraphs 37-38)(The external binary translator generates translated processor code (i.e. intermediary format instructions) and sends it to the processor.); and
executing, by the at least one processing circuit, the IF representation (Lai: Figure 2 element 212, paragraphs 37-38)(The execution unit executes the translated processor code.),
wherein the workflow corresponds to one or more tasks to complete a process executable by one or more device format instructions at the computational device and includes at least configuring at least one of a device and a resource to perform one or more instructions (Lai: Figures 1 and 4 elements 110-112 and 406-408, paragraphs 37 and 40)(The decoded processor code instructions (i.e. device format instructions) configures the execution unit (i.e. resource) to execute the instruction (i.e. perform operation(s)). Official notice is given that tasks comprising a set of instructions can be executed on processors for the advantage of executing larger programs. Thus, it would have been obvious to one of ordinary skill in the art to implement task execution within Lai.).
As per claim 6:
Lai disclosed the method of claim 5, wherein the executing the IF representation comprises generating, based on the IF representation, the one or more device format instructions (Lai: Figure 2 element 208, paragraphs 37-38)(The fusion manager fuses translated processor code instructions together (i.e. device format instruction).).
As per claim 7:
Lai disclosed the method of claim 6, further comprising executing, by the computational device, the one or more device format instructions (Lai: Figure 2 element 212, paragraphs 37-38)(The execution unit executes the translated processor code, including fused translated processor code.).
As per claim 8:
Lai disclosed the method of claim 6, further comprising sending the one or more device format instructions to the computational device (Lai: Figure 3 element 308, paragraphs 37-38)(An embodiment allows for the fusion manager to be external to the processor (i.e. computational device).).
As per claim 9:
Lai disclosed the method of claim 5, wherein:
the at least one processing circuit comprises an execution apparatus at the computational device (Lai: Figure 2 element 212, paragraphs 37-38); and
the executing the IF representation comprises executing, by the execution apparatus, at least one of the at least one IF instruction (Lai: Figure 2 element 212, paragraphs 37-38)(The execution unit executes the translated processor code.).
As per claim 12:
Lai disclosed the method of claim 5, wherein the executing the IF representation comprises processing the IF instruction (Lai: Figure 2 element 212, paragraphs 37-38)(The execution unit executes the translated processor code.).
As per claim 13:
Lai disclosed the method of claim 12, wherein the processing the IF instruction comprises generating, based on the IF instruction, one or more device format instructions (Lai: Figure 2 element 208, paragraphs 37-38)(The fusion manager fuses translated processor code instructions together (i.e. device format instruction).).
As per claim 14:
Lai disclosed the method of claim 13, wherein the processing the IF instruction further comprises sending the one or more device format instructions to the computational device (Lai: Figure 3 element 308, paragraphs 37-38)(An embodiment allows for the fusion manager to be external to the processor (i.e. computational device).).
As per claim 15:
Lai disclosed the method of claim 5, wherein the executing the IF representation comprises executing the IF representation based on an arrangement of the workflow (Lai: Figures 2, 6, and 8 elements 212, 601, and 801, paragraphs 37-38, 43, and 53)(The execution unit executes the translated processor code based on the instruction dependencies.).
As per claim 16:
Lai disclosed the method of claim 5, wherein the executing the IF representation comprises performing at least one of a load operation, a store operation, or a computational operation (Lai: Figures 1, 4, 6, and 8 elements 106, 402, 601, and 801, paragraphs 31, 37, 40, 43, and 53)(The received code is translated into processor code (i.e. intermediary format). The translated processor code includes loads, stores, and computational operations.).
As per claim 17:
Lai disclosed the method of claim 5, wherein the at least one processing circuit is at least one first processing circuit (Lai: Figure 2 element 212, paragraphs 37-38), the method further comprising:
receiving, by at least one second processing circuit, the IF representation of the workflow for a computational device, wherein the IF representation comprises at least one IF instruction (Lai: Figure 2 element 212, paragraphs 37-38)(The execution unit receives the translated processor code (i.e. intermediary format instructions) for execution. Official notice is given that processors can include multiple execution units for the advantage of providing execution logic for separate instruction types. Thus, it would have been obvious to one of ordinary skill in the art to implement multiple execution units in Lai for execution of different instruction types.); and
executing, by the at least one second processing circuit, the IF representation (Lai: Figure 2 element 212, paragraphs 37-38)(In view of the above official notice, added execution units executes different types of translated processor code.).
As per claim 18:
Lai disclosed the method of claim 17, wherein:
the executing, by the at least one first processing circuit, the IF representation provides a first result (Lai: Figure 2 element 212, paragraphs 37-38)(The execution unit executes the translated processor code to generate execution results.); and
the executing, by the at least one second processing circuit, the IF representation provides a second result (Lai: Figure 2 element 212, paragraphs 37-38)(The execution unit executes the translated processor code to generate execution results.).
As per claim 19:
Lai disclosed an apparatus comprising:
a computational device (Lai: Figure 2 element 202, paragraphs 27-38) comprising:
a communication interface (Lai: Figure 2 elements 202 and 206, paragraphs 37-38)(The logic elements of the processor receiving the binary translator outputs reads upon the communication interface.); and
at least one computational resource (Lai: Figure 2 element 212, paragraphs 37-38);
wherein the computational device is configured to:
receive, by the communication interface, an intermediary format (IF) instruction configured to execute a workflow (Lai: Figure 2 elements 202 and 206, paragraphs 37-38)(The external binary translator generates translated processor code (i.e. intermediary format instructions) and sends it to the processor. The logic elements of the processor receiving the binary translator outputs reads upon the communication interface. The translated code includes instructions executable by the processor (i.e. workflow).); and
execute, at least in part, by the at least one computational resource, the IF instruction (Lai: Figure 2 element 212, paragraphs 37-38)(The execution unit executes the translated processor code.),
wherein the workflow corresponds to one or more tasks to complete a process executable by one or more device format instructions at the computational device and includes at least configuring at least one of a device and a resource to perform one or more operations (Lai: Figures 1 and 4 elements 110-112 and 406-408, paragraphs 37 and 40)(The decoded processor code instructions (i.e. device format instructions) configures the execution unit (i.e. resource) to execute the instruction (i.e. perform operation(s)). Official notice is given that tasks comprising a set of instructions can be executed on processors for the advantage of executing larger programs. Thus, it would have been obvious to one of ordinary skill in the art to implement task execution within Lai.).
As per claim 20:
Lai disclosed the apparatus of claim 19, wherein:
the computational device is configured to generate, based on the IF instruction, the one or more device format instructions (Lai: Figure 2 element 208, paragraphs 37-38)(The fusion manager fuses translated processor code instructions together (i.e. device format instruction).); and
the computational device is configured to execute, at least in part, the IF instruction by executing, at least in part, the one or more device format instructions (Lai: Figure 2 element 212, paragraphs 37-38)(The execution unit executes the translated processor code, including fused translated processor code.).
Claims 10-11 are rejected under 35 U.S.C. 103 as being unpatentable over Lai et al. (U.S. 2017/0177343), in view of Barnett et al. (U.S. 8,250,524).
As per claim 10:
Lai disclosed the method of claim 5
Lai failed to teach wherein the executing the IF representation comprises communicating using an application programming interface for the computational device.
However, Barnett combined with Lai disclosed wherein the executing the IF representation comprises communicating using an application programming interface for the computational device (Barnett: Figures 1 and 4 elements 140-143, 160, and 426-429, column 2 lines 42-59, column 5 lines 38-58, column 8 lines 14-43, and column 8 lines 51-60)(Lai: Figure 2 element 212, paragraphs 37-38)(Barnett disclosed a contract API being used to modify intermediate code. Lai disclosed an execution unit that executes the translated processor code. The combination allows for using a contract API to modify the translated processor code of Lai prior to execution.).
The advantage of using a contract API is that end users can specify conditions on how input code is compiled into intermediate code. Thus, it would have been obvious to one of ordinary skill in the art at the time of the effective filing date to implement the contract API of Barnett into the binary translation steps of Lai for the above advantage.
As per claim 11:
Lai disclosed the method of claim 5.
Lai failed to teach wherein the executing the IF representation comprises modifying the IF instruction based on an application programming interface for the computational device.
However, Barnett combined with Lai disclosed wherein the executing the IF representation comprises modifying the IF instruction based on an application programming interface for the computational device (Barnett: Figures 1 and 4 elements 140-143, 160, and 426-429, column 2 lines 42-59, column 5 lines 38-58, column 8 lines 14-43, and column 8 lines 51-60)(Lai: Figure 2 element 212, paragraphs 37-38)(Barnett disclosed a contract API being used to modify intermediate code. Lai disclosed an execution unit that executes the translated processor code. The combination allows for using a contract API to modify the translated processor code of Lai prior to execution.).
The advantage of using a contract API is that end users can specify conditions on how input code is compiled into intermediate code. Thus, it would have been obvious to one of ordinary skill in the art at the time of the effective filing date to implement the contract API of Barnett into the binary translation steps of Lai for the above advantage.
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Lai et al. (U.S. 2017/0177343), in view of Carrington et al. (U.S. 2020/0387438).
As per claim 10:
Lai disclosed the method of claim 5.
Lai failed to teach wherein the executing the IF representation comprises communicating using an application programming interface for the computational device.
However, Carrington combined with Lai disclosed wherein the executing the IF representation comprises communicating using an application programming interface for the computational device (Carrington: Figure 3 elements 302, paragraph 39)(Lai: Figure 2 element 212, paragraphs 37-38)(Carrington disclosed a hardware processor that executes call API instructions. Lai disclosed an execution unit that executes the translated processor code. The combination allows for the execution unit of Lai to execute calls to API instructions.).
The advantage of using calling APIs by instructions is that hardware events can be tracked (Carrington: Paragraph 39). Thus, it would have been obvious to one of ordinary skill in the art at the time of the effective filing date to implement the instruction API calls of Carrington into the translated code of Lai for the above advantage.
Response to Arguments
The arguments presented by Applicant in the response, received on 7/10/2025 are partially considered persuasive.
Applicant argues regarding the 101 rejections:
“The Office Action mischaracterizes the MPEP 2106.04(a)(2)IIIA rule regarding a mental process and limitations performed in the human mind. Specifically, the Office Action confuses between the actual performance of the limitations in the human mind and the imagination of performance of the limitations in the human mind. The Office Action contends that these steps can be performed mentally by conjuring up in the mind an instruction in a format and generating an intermediary format" and "one can mentally think about a series of C/C+ code and mentally translate them into architectural code for a given microprocessor." But this argument amounts to imagining to perform the limitation, not actually perform the limitation. If this imagining process is allowed, then virtually all inventions are ineligible because they can always be imagined to be performed in the human mind.
The MPEP rule specifically states that "claims do recite a mental process when they contain limitations that can practically be performed in the human mind." MPEP 2106.04(a)(2) (Emphasis added.). In other words, the limitations must be practically performed in the human mind, not imagined to be performed in the human mind. The phrase "practically be performed" clearly indicates that the limitations must be actually performed. Examples of claims in which the limitations cannot be practically performed in the human mind include a case where the "invention involves a several-step manipulation of data that, except in its most simplistic form, could not conceivably be performed in the human mind or with pencil and paper." Synopsys., 839 F.3d at 1148, 120 USPQ2d at 1481 (distinguishing the claims in TQP Development, LLC v. Intuit Inc., 2014 WL 651935 (E.D. Tex. 2014)). Here, at least the limitations "the IF representation comprises at least one IF instruction configured to execute the workflow," and "the workflow includes at least configuring at least one of a device and a resource" cannot be practically performed in the human mind or with pencil and paper because Response to Final Office Action PAGE 8 OF 15
the human mind or pencil and paper cannot execute the workflow or configure a device or a resource. The amendment further clarifies the claim language to recite "converting the input representation to an intermediary format (IF) representation of the workflow," and "the workflow corresponds to one or more tasks to complete a process executable by one or more device format instructions at the computational device and includes at least configuring at least one of a device and a resource to perform one or more operations." The amendment further shows that these limitations cannot practically be performed in the human mind because the human mind cannot convert the input representation to an IF representation of the workflow where the workflow corresponds to one or more tasks to complete a process executable by one or more device format instructions at the computational device and configures at least one of a device and a resource to perform one or more operations.
In conclusion, amended independent claims 1, 5 and 19, and their respective dependent claims, as a whole, satisfy all conditions for subject matter eligibility under 35 U.S.C. §101
Therefore, Applicant believes that amended independent claims 1, 5 and 19 and their respective dependent claims are statutory and patent eligible.”
This argument is not found to be persuasive for the following reason. The steps of “receiving an input representation of a workflow, wherein …” and “generating based on the input representation, an intermediary format representation of the workflow” are the abstract idea limitations. These steps can be performed mentally by conjuring up in the mind an instruction in a format and generating an intermediary format of the workflow. For example, one can mentally think about a series of C/C+ code and mentally translate them into architectural code for a given microprocessor. The human mind is well-equipped to perform such mental operations. The given code can be thought to be broken down into various controls to control a resource. The remaining processing circuit, device, and resource are generic computing components. As noted above in the rewritten 101 rejections, the claims don’t include judicial exception integrated into a practical application nor include additional elements that are sufficient to amount to significantly more than the judicial exception. Thus, the claims include abstract ideas.
Applicant argues regarding claims 1, 5, and 19:
“The Office Action's interpretation "of workflow is a series of tasks complete in a specific order to achieve a goal" is not consistent with the specification as it would be interpreted by one of ordinary skill in the art. To clarify the claim language, claims 1, 5 and 19 have been amended to recite "the workflow corresponds to one or more tasks to complete a process executable by one or more device format instructions at the computational device and includes at least configuring at least one of a device and a resource to perform one or more operations." A set of instructions as disclosed in Lai does not correspond to one or more tasks to complete a process executable by one or more device format instructions at the computational device because it does not refer to a process executable by one or more device format instructions. In addition, a set of instructions simply carries out the operations as defined in the instructions. It does not configure at least one of a device and a resource to perform one or more operations.”
This argument is found to be persuasive for the following reason. The examiner agrees that Lai alone failed to teach the newly claimed limitations. However, a new ground of rejection has been given due to the amendment.
Applicant argues regarding claims 17-18:
“Furthermore, as analyzed above under the §102 rejections, the IF instruction executes the workflow, not the workflow executes the IF instruction. Therefore, the Office Action's allegation that "processors can include multiple execution units" is improper because applying the Office Action's logic, the conclusion is that multiple execution units execute the processors, which is technically impossible.”
This argument is not found to be persuasive for the following reason. The rejection doesn’t rely on multiple execution units to execute the processor, as alleged by the applicant. Instead, the official notice adds multiple execution units to the processor to execute different IF instructions.
Applicant argues regarding claims 10-11:
“Furthermore, Barnett merely discloses augmenting an application API with contracts from a contract API (Barnett, col. 2, lines 42-49), not "executing the IF representation comprises communicating using an application programming interface for the computational device," as recited in claim 10. Using another API does not execute the IF representation. Moreover, Barnett is totally silent about the workflow and therefore Barnett fails to cure the defects in Lai.”
This argument is not found to be persuasive for the following reason. The rejection doesn’t use the contract API of Barnett to execute the IF representation. Instead, the combination allows for the contract API to modify the binary translated code of Lai prior to execution. Thus, reading upon the claimed limitation.
Applicant argues regarding claim 10:
“Furthermore, Carrington merely discloses processor 302 may execute instruction 306 to call an API to track simulated hardware events (Carrington, ¶[0039], lines 1-3), not "executing the IF representation comprises communicating using an application programming interface for the computational device," as recited in claim 10. Executing an instruction to call an API does not execute the IF representation. Moreover, Carrington is totally silent about the workflow and therefore Carrington fails to cure the defects in Lai.”
This argument is not found to be persuasive for the following reason. The translated binary code reads upon the IF representation, as noted above. The combination allows for the execution unit of Lai to execute calls to API instructions. Thus, the translated binary code in Lai includes call API instructions, which reads upon the claimed limitations.
Conclusion
The following is text cited from 37 CFR 1.111(c): In amending in reply to a rejection of claims in an application or patent under reexamination, the applicant or patent owner must clearly point out the patentable novelty which he or she thinks the claims present in view of the state of the art disclosed by the references cited or the objections made. The applicant or patent owner must also show how the amendments avoid such references or objections.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JACOB A. PETRANEK whose telephone number is (571)272-5988. The examiner can normally be reached on M-F 8:00-4:30.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jyoti Mehta can be reached on (571) 270-3995. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JACOB PETRANEK/Primary Examiner, Art Unit 2183