CTNF 18/216,790 CTNF 86672 Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. DETAILED ACTION Claims 1-20 are pending. Examiner Notes Examiner cites particular paragraphs and/or columns and lines in the references as applied to Applicant’s claims for the convenience of the Applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested that, in preparing responses, the Applicant fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner. The prompt development of a clear issue requires that the replies of the Applicant meet the objections to and rejections of the claims. Applicant should also specifically point out the support for any amendments made to the disclosure. See MPEP § 2163.06. 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Authorization for Internet Communications in a Patent Application Applicant is encouraged to file an Authorization for Internet Communications in a Patent Application form (http://www.uspto.gov/sites/default/files/documents/sb0439.pdf) along with the response to this office action to facilitate and expedite future communication between Applicant and the examiner. If the form is submitted then Applicant is requested to provide a contact email address in the signature block at the conclusion of the official reply. Specification Objections 06-11 AIA The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. Claim Rejections - 35 USC § 101 07-04-01 AIA 07-04 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception (an abstract idea) without significantly more. Step 1 : The claim is a process, machine, manufacture, or composition of matter: As per claim 1. An edge device comprising: Step 2A Prong One : The claim recites an abstract idea because it includes limitations that can be considered mental processes (concepts performed in the human mind including an observation, evaluation, judgment, and/or opinion). If a claim limitation, under its broadest reasonable interpretation, covers performance of the limitation in the human mind or via pen and paper, then it falls within the “Mental Processes” grouping of abstract ideas. Accordingly, the claim recites an abstract idea: monitor a status of the processor ( abstract idea mental process ). Step 2A Prong Two : The abstract idea is not integrated into a practical application because the abstract idea is recited but for generically recited additional computer elements (i.e. data storage, processor, memory, computer readable medium, etc.) which do not add meaningful limitations to the abstract idea amounting to simply implementing the abstract idea on a generic computer using generic computing hardware and/or software (e.g. generally linking the use of the judicial exception to a particular technological environment or field of use (see MPEP 2106.05(h)). Mere instructions to apply an exception using a generic computer component cannot provide an inventive concept. The generic computing components are recited at a high-level of generality such that they amount to no more than mere instructions to apply the exception using the recited generic computer components. Accordingly, these additional elements do not integrate the abstract idea into a practical application because they do not impose any meaningful limits on practicing the abstract idea: a processor to execute an application ( generic computing components ); and a device ( generic computing components ) including: an interface to the processor ( generic computing components ); a network interface ( generic computing components ); and circuitry ( generic computing components ) to: based on the status and the application having an associated objective, initiate a migration of execution of the application from the processor ( generic computing components performing extra-solution activity of sending/transmitting data/information to trigger/initiate the migration ). Step 2B : The claim includes limitations which can be considered extra-solution activity (see MPEP 2106.05(g)) insufficient to amount to significantly more than the abstract idea because the additional limitations only perform at least one of collecting, gathering, displaying, generating, modifying, updating, storing, retrieving, sending, and receiving data/information data which are well-understood, routine, conventional computer functions as recognized by the court decisions listed in MPEP § 2106.05(d)II. The claim further includes limitations that do not integrate the judicial exception into a practical application because they merely recite the words "apply it" (or an equivalent) with the judicial exception, or merely including instructions to implement an abstract idea on a computer, or merely using a computer as a tool to perform an abstract idea, as discussed in MPEP § 2106.05(f). Therefore, the claim, and its limitations when considered separately and in combination, is directed to patent ineligible subject matter: based on the status and the application having an associated objective, initiate a migration of execution of the application from the processor ( extra-solution activity of sending/transmitting data/information to trigger/initiate the migration ). Claim 2. The edge device of claim 1, wherein to initiate the migration, the circuitry is to send an indication to an orchestrator ( extra-solution activity of sending/transmitting data/information to trigger/initiate the migration ). Claim 3. The edge device of claim 1, wherein the migration is to a second processor outside the edge device at a second edge device, the second edge device located within a communication threshold range ( generic computing components performing extra-solution activity of sending/transmitting data/information ). Claim 4. The edge device of claim 1, wherein the migration is to a second processor outside the edge device at a cloud server ( generic computing components performing extra-solution activity of sending/transmitting data/information ). Claim 5. The edge device of claim 1, wherein the migration is to the circuitry of the device ( generic computing components performing extra-solution activity of sending/transmitting data/information ). Claim 6. The edge device of claim 1, wherein the interface to the processor includes a list of resources corresponding to the application ( abstract idea mental process ). Claim 7. The edge device of claim 1, wherein the status includes a scheduled downtime for the processor to perform an update ( abstract idea mental process ). Claim 8. The edge device of claim 1, wherein the status includes an unscheduled downtime for the processor due to a power failure ( abstract idea mental process ). Claim 9. The edge device of claim 1, wherein the processor is a central processing unit (CPU) and the device is one of an infrastructure processing unit (IPU), a data processing unit (DPU), or an edge processing unit (EPU) ( generic computing components ). Claim 10. The edge device of claim 1, wherein the edge device includes an event recorder device ( generic computing components ), the event recorder device including: a battery to power the event recorder device ( generic computing components ); and memory to store telemetry data captured by at least one sensor of the edge device ( generic computing components performing extra-solution activity of saving/storing data/information ). Claim 11. The edge device of claim 10, wherein the event recorder device is activated when the edge device loses power ( extra-solution activity of sending/receiving data/information to activate the event recorder device ). Claim 12. The edge device of claim 10, wherein the at least one sensor includes at least one of a thermal sensor, a movement sensor, a pin in a device connector, an electric charge detector, or a pressure sensor ( generic computing components ). Claim 13. The edge device of claim 1, wherein the edge device includes a baseboard management controller (BMC) ( generic computing components ) to: intercept a remote reboot command directed at the processor ( extra-solution activity of sending/receiving data/information ); and send the status of the processor to the device before the processor reboots ( extra-solution activity of sending/receiving data/information ). Claim 14. The edge device of claim 1, wherein the associated objective of the application includes a zero downtime requirement of the application ( abstract idea mental process ). As per claim 15, it has similar limitations as claim 1 and is therefore rejected using the same rationale. As per claim 16, it has similar limitations as claim 10 and is therefore rejected using the same rationale. As per claim 17, it has similar limitations as claim 14 and is therefore rejected using the same rationale. As per claim 18, it has similar limitations as claim 9 and is therefore rejected using the same rationale. As per claim 19, it has similar limitations as claim 1 and is therefore rejected using the same rationale. As per claim 20, it has similar limitations as claim 5 and is therefore rejected using the same rationale. Claims 15-18 are rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter. The claims do not fall within at least one of the four categories of patent eligible subject matter. As per claim 15, it is directed to a signal directly or indirectly by claiming a medium and the Specification recites evidence where the computer readable medium is defined as a signal or wave (see Specification [0093]-[0094]). More specifically, the instant Specification defines the claimed machine-readable medium using open-ended language i.e., “any tangible medium”, “that may include but is not limited to”, “examples of”, “but not limited to, by way of example”, “e.g., be transmitted or received over a communications network”, and “capable of hosting data in a non-transitory format”. A transitory signal, while physical and real, does not possess concrete structure that would qualify as a device or part under the definition of a machine, is not a tangible article or commodity under the definition of a manufacture (even though it is man-made and physical in that it exists in the real world and has tangible causes and effects), and is not composed of matter such that it would qualify as a composition of matter (see Nuijten, 500 F.3d at 1356-1357, 84 USPQ2d at 1501-03 ). As such, a transitory, propagating signal does not fall within any statutory category (see Mentor Graphics Corp. v. EVE-USA, Inc., 851 F.3d 1275, 1294, 112 USPQ2d 1120, 1133 (Fed. Cir. 2017); Nuijten, 500 F.3d at 1356-1357, 84 USPQ2d at 1501-03 ). The BRI of machine-readable media can encompass non-statutory transitory forms of signal transmission, such as a propagating electrical or electromagnetic signal per se (see In re Nuijten, 500 F.3d 1346, 84 USPQ2d 1495 (Fed. Cir. 2007) ). In that event, the claim is directed to a form of energy which does not fall into a category of invention. Applicant is advised to amend the claim to a “non-transitory computer-readable storage medium, wherein the non-transitory computer-readable storage medium excludes transitory embodiments” or equivalent language. As per claims 16-18, they are dependent on claim 10 and do not overcome the 35 U.S.C. 101 deficiency of claim 15. Therefore, they are rejected using the same rationale. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. Claim 3 is rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention. As per claim 3, it is indefinite because it recites “within a communication threshold range” and it is unclear as to how to interpret the aforementioned phrase because it is vague and not well-defined. For the purposes of examination, “within a communication threshold range” is interpreted to read on the appropriate cited prior art reference(s) below. Appropriate correction is required. Claim Rejections - 35 USC § 102 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-12-aia AIA (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. 07-15 AIA Claim s 1-4, 15, and 19 are rejected under 35 U.S.C. 102( a)(1-2 ) as being anticipated by Albisu et al. (US 2022/0350671) (hereinafter Albisu) . As per claim 1, Albisu teaches the invention as claimed including an edge device ([0021] and fig. 7 edge device ) comprising: a processor (fig. 7, block 704 processor ) to execute an application ([0032] the edge device may be performing some computations on data e.g., by way of executing one or more other applications. The flexible computation capacity orchestration application can be configured to monitor processor utilization of the edge device during those computations ); and a device ([0021] and fig. 7 edge device ) including: an interface to the processor ([0135] and fig. 7, block 718 communications component to interface with processor ); a network interface ([0134] and fig. 7, block 716 I/O interface for network communications ); and circuitry ([0062] interconnected machine logic circuits or circuit modules within the computing system and [0121] application-specific integrated circuits ) to: monitor a status of the processor ([0032] monitor processor utilization of edge device ); and based on the status and the application having an associated objective ([0002]-[0003] and [0108]-[0109] computations of applications have different security requirements for execution ), initiate a migration of execution of the application from the processor ([0040]-[0042] and [0052] determine if computations being performed by the edge device should be relocated/moved/offloaded to another device based on operational data including utilization of processing resources and security data that can define security capabilities of the edge device and security requirements of the computations being executed ). As per claim 2, Albisu further teaches the edge device of claim 1,wherein to initiate the migration, the circuitry is to send an indication to an orchestrator ([0048] edge devices 102B, 102C that receive the data for computations can be configured, via execution of the flexible computation capacity orchestration application, to perform computations on the data for computations, thereby offloading processor load from the edge device 102A ). As per claim 3, Albisu further teaches the edge device of claim 1, wherein the migration is to a second processor outside the edge device at a second edge device ([0048] edge devices 102B, 102C that receive the data for computations can be configured, via execution of the flexible computation capacity orchestration application, to perform computations on the data for computations, thereby offloading processor load from the edge device 102A ), the second edge device located within a communication threshold range ([0028] edge devices operate in communication with or as part of a communications network ). As per claim 4, Albisu further teaches the edge device of claim 1, wherein the migration is to a second processor outside the edge device at a cloud server ([0002] and [0048] offload processor load between edge devices which can be cloud computing devices ). As per claim 15, it has similar limitations as claim 1 and is therefore rejected using the same rationale. As per claim 19, it has similar limitations as claim 1 and is therefore rejected using the same rationale . Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim s 5 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Albisu in view of Raz et al. (US 2024/0028389) (hereinafter Raz) . As per claim 5, Albisu does not explicitly teach wherein the migration is to the circuitry of the device. However, Raz teaches wherein the migration is to the circuitry of the device ([0030] software thread is migrated from one processing circuitry to another processing circuitry and executing threads between the plurality of processing circuitries ). Raz and Albisu are both concerned with edge devices and are therefore combinable/modifiable. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Albisu in view of Raz because it would provide for a way of configuring one or more processing circuitries that are associated with a preferred memory area to execute the one or more threads to increase performance of a plurality of additional memory accesses, for example reducing total latency of the plurality of additional memory accesses, and additionally or alternatively increasing total bandwidth of the plurality of additional memory accesses, thus increasing performance of the system when executing the plurality of threads. As per claim 20, it has similar limitations as claim 5 and is therefore rejected using the same rationale . 07-21-aia AIA Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Albisu in view of Roslak et al. (US 2012/0137301) (hereinafter Roslak) . As per claim 6, Albisu does not explicitly teach wherein the interface to the processor includes a list of resources corresponding to the application. However, Roslak teaches wherein the interface to the processor includes a list of resources corresponding to the application ([0017] a list of the defined priority applications for selection by the user, wherein the list can also indicate the resources that would be utilized by each application ). Roslak and Albisu are both concerned with computing device resource utilization and are therefore combinable/modifiable. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Albisu in view of Roslak because it would provide a way to control resources of the device to operate critical applications regardless of other lower priority applications that may be requesting resources without disabling the functionality of the communication device . 07-21-aia AIA Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Albisu in view of Gopalakrishnan et al. (US 2006/0288086) (hereinafter Gopalakrishnan) . As per claim 7, Albisu does not explicitly teach wherein the status includes a scheduled downtime for the processor to perform an update. However, Gopalakrishnan teaches wherein the status includes a scheduled downtime for the processor to perform an update ([0011] service profile is updated off-line from the edge box, i.e., on the AAA server and `pushed` to the edge server. At a scheduled downtime, all sessions are taken down and updated ). Gopalakrishnan and Albisu are both concerned with edge computing devices and are therefore combinable/modifiable. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Albisu in view of Gopalakrishnan because it would provide a way to reduce overhead by caching policies and profiles associated with a particular service by the edge device the first time they are accessed by a subscriber, and these cached profiles are retrieved locally when subsequent subscribers request the same service . 07-21-aia AIA Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Albisu in view of Bower et al. (US 2012/0151248) (hereinafter Bower) . As per claim 8, Albisu does not explicitly teach wherein the status includes an unscheduled downtime for the processor due to a power failure. However, Bower teaches wherein the status includes an unscheduled downtime for the processor due to a power failure ([0004] an example of unscheduled downtime events include power failures ). Bower and Albisu are both concerned with executing tasks on computing devices associated with device power considerations and are therefore combinable/modifiable. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Albisu in view of Bower because it would provide a power-efficient failover server operating in a normal operating state configured to dynamically backup device states or transaction logs. A redundant server coupled to the primary server in a failover cluster is operated at a reduced power state. The redundant server dynamically receives the backup from the primary server and is elevated to a normal operating state in response to a failure of the primary server. By enforcing a reduced power state of the redundant server, a failover system provides a desired combination of high-power efficiency with low latency . 07-21-aia AIA Claim 9 and 18 rejected under 35 U.S.C. 103 as being unpatentable over Albisu in view of Guim Bernat (US 2020/0241926) (hereinafter Guim Bernat) . As per claim 9, Albisu further teaches wherein the processor is a central processing unit (CPU) ([0148]). Albisu does not explicitly teach the device is one of an infrastructure processing unit (IPU), a data processing unit (DPU), or an edge processing unit (EPU). However, Guim Bernat teaches the device is one of an infrastructure processing unit (IPU), a data processing unit (DPU), or an edge processing unit (EPU) ([0088] DPU and IPU ). Guim Bernat and Albisu are both concerned with executing tasks on computing devices associated with device power considerations and are therefore combinable/modifiable. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Albisu in view of Guim Bernat because it would provide for compute, memory, and storage resources offered at the edges in the edge cloud which are critical to providing ultra-low latency response times for services and functions used by endpoint data sources as well as reduce network backhaul traffic from the edge cloud toward cloud data center, thus improving energy consumption and overall network usages. As per claim 18, it has similar limitations as claim 9 and is therefore rejected using the same rationale . 07-21-aia AIA Claim s 10, 12, and 16 rejected under 35 U.S.C. 103 as being unpatentable over Albisu in view of Denson (US 10,173,547) in view of Nagaraj et al. (US 2021/0232472) (hereinafter Nagaraj) . As per claim 10, Albisu does not explicitly teach wherein the edge device includes an event recorder device, the event recorder device including: a battery to power the event recorder device; and memory to store telemetry data captured by at least one sensor of the edge device. However, Denson teaches an event recorder device, the event recorder device including: a battery to power the event recorder device (col. 1, ll. 21-23 event recorder receives its power from the battery ). Denson and Albisu are both concerned with executing tasks on computing devices associated with device power considerations and are therefore combinable/modifiable. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Albisu in view of Denson because it would provide an event recorder including a system for vehicle battery drainage avoidance. An interface can be configured to receive an indication to power on, where a wake-up voltage is increased after a power on signal is received. The system for drainage avoidance controls the digitally controlled reference voltage in order to prevent the vehicle event recorder from draining the vehicle battery. After the vehicle event recorder is powered on, the digitally controlled reference voltage can be increased. Albisu in view of Denson do not explicitly teach memory to store telemetry data captured by at least one sensor of the edge device. However, Nagaraj teaches memory to store telemetry data captured by at least one sensor of the edge device ([0031] when the machine-learning model is stored locally in the edge appliance, the machine-learning model can be leveraged to trigger remedial actions very quickly in response to potentially problematic events within the data center. As updated telemetry data from the computing devices and the sensors is received at the edge appliance in a feedback loop, the hardware accelerator generates corresponding updated training data and adds the updated training data to the training data set. The machine-learning model can be continuously refined over time as the machine-learning model is retrained periodically using the training data set after such updates ). Nagaraj and Albisu are both concerned with executing tasks on computing devices associated with device power considerations and are therefore combinable/modifiable. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Albisu in view of Denson in view of Nagaraj because it would provide a way to reduce the delay between the time at which telemetry data is collected and the time at which remedial action can be triggered in response to an event that can be predicted based on a pattern that a machine-learning model can detect in the telemetry data. By leveraging a machine-learning model stored at an edge appliance, the system can significantly reduce the network distance between the source of telemetry data and the location at which the telemetry data is analyzed for event detection. Furthermore, a hardware accelerator that is dedicated to performing the predictive function of the machine-learning model can be used to ensure that the predictive functionality will not be delayed due to competition with other functions performed by the edge appliance for processing resources and memory resources. The system can also leverage cloud resources to update the machine-learning model without overextending the computing resources available at the edge appliance. As per claim 12, Albisu further teaches wherein the at least one sensor includes at least one of a thermal sensor, a movement sensor, a pin in a device connector, an electric charge detector, or a pressure sensor ([0139] movement sensor ). As per claim 16, it has similar limitations as claim 10 and is therefore rejected using the same rationale . 07-21-aia AIA Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Albisu in view of Denson in view of Nagaraj in view of Valdes (US 11,276,306) . As per claim 11, Albisu in view of Denson in view of Nagaraj do not explicitly teach wherein the event recorder device is activated when the edge device loses power. However, Valdes teaches wherein the event recorder device is activated when the edge device loses power (col. 4, ll. 49-52 in the event power system loses power from the vehicle battery and the vehicle alternator, the battery is capable of powering vehicle event recorder for a period of time ). Valdes and Albisu are both concerned with executing tasks on computing devices associated with device power considerations and are therefore combinable/modifiable. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Albisu in view of Denson in view of Nagaraj in view of Valdes because it would provide a way for locating an event recorder after power loss by increasing the likelihood that the vehicle event recorder system will be found in the event that the system is disconnected from power and removed from the vehicle . 07-21-aia AIA Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Albisu in view of Lambert et al. (US 2018/0300202) (hereinafter Lambert) in view of Vishwanathan et al. (US 2015/0254082) (hereinafter Vishwanathan) . As per claim 13, Albisu does not explicitly teach wherein the edge device includes a baseboard management controller (BMC) to: intercept a remote reboot command directed at the processor; and send the status of the processor to the device before the processor reboots. However, Lambert teaches wherein the edge device includes a baseboard management controller (BMC) (abstract baseboard management controller ) to: send the status of the processor to the device before the processor reboots (claim 2 the BMC is further configured to: receive third boot status information from the processor complex in response to a third system boot process, wherein the third system boot process is conducted after the second system boot process and before the first system boot process ). Lambert and Albisu are both concerned with executing tasks on computing devices associated with device power considerations and are therefore combinable/modifiable. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Albisu in view of Lambert because it would provide a way to detect anomalous behaviors in a particular system boot process, log the anomalous behaviors and issue an alert to, for example, a management system. In this way, problems with information handling systems that are detectable through changing system boot process behaviors may be rapidly identified, and preventive or corrective actions can be taken by service technician to remedy the anomalous behaviors. Albisu in view of Lambert do not explicitly teach intercept a remote reboot command directed at the processor. However, Vishwanathan teaches intercept a remote reboot command directed at the processor (abstract intercept probe requests from a host and provided information required for a remote boot ). Vishwanathan and Albisu are both concerned with executing tasks on computing devices and are therefore combinable/modifiable. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Albisu in view of Lambert in view of Vishwanathan because it would provide for remote booting, thus eliminating the requirement of a physical expansion ROM. Additionally, booting of different host architectures may be supported. The host management software presents a synthetic device to a remote host, where the synthetic device includes at least one extension to support remote booting . 07-21-aia AIA Claim 14 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Albisu in view of Sathyanarayana et al. (US 2015/0301910) (hereinafter Sathyanarayana) . As per claim 14, Albisu does not explicitly teach wherein the associated objective of the application includes a zero downtime requirement of the application. However, Sathyanarayana teaches wherein the associated objective of the application includes a zero downtime requirement of the application ([0001] some business applications also require near zero downtime while fail over system and software are upgraded ). Sathyanarayana and Albisu are both concerned with executing tasks on computing devices and are therefore combinable/modifiable. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Albisu in view of Sathyanarayana because it would provide infrastructure for rolling upgrades of software or system with near zero data loss and down time to client applications without any geographic restriction of the servers. As per claim 17, it has similar limitations as claim 14 and is therefore rejected using the same rationale. Citation of Relevant Prior Art 07-96 AIA The prior art made of record and not relied upon is considered pertinent to Applicant's disclosure : Biswas et al. (US 2014/0281610) in at least [0033] disclose determining states of cores based on characterization data and performance objectives and scheduling an individual thread for execution on a specified core that is best suited to achieve the performance objective and migrating an executing thread from a first core to a better suited core when the better suited core indicates availability according to the identified performance objectives i.e., scheduling and migrating of currently executing cores to faster cores, in the case of a performance-based operation objective, and scheduling and migrating threads to lower power cores, in the case of a power based performance objective. Fletcher et al. (US 2014/0007134) in at least [0030] disclose migrating applications from processor cores running in the area or rack that is overheated to a different area or rack based on workload management goals and the state of the processor cores. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Adam Lee whose telephone number is (571) 270-3369. The examiner can normally be reached on M-TH 8AM-5PM. If attempts to reach the above noted Examiner by telephone are unsuccessful, the Examiner’s supervisor, Pierre Vital, can be reached at the following telephone number: (571) 272-4215. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from Patent Center. Status information for published applications may be obtained from Patent Center. Status information for unpublished applications is available through Patent Center for authorized users only. Should you have questions about access to Patent Center, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, Applicant is encouraged to use the USPTO Automated Interview Request (AIR) Form at https://www.uspto.gov/patents/uspto-automated-interview-request-air-form. /Adam Lee/Primary Examiner, Art Unit 2198 August 14, 2026 Application/Control Number: 18/216,790 Page 2 Art Unit: 2198 Application/Control Number: 18/216,790 Page 3 Art Unit: 2198 Application/Control Number: 18/216,790 Page 4 Art Unit: 2198 Application/Control Number: 18/216,790 Page 5 Art Unit: 2198 Application/Control Number: 18/216,790 Page 6 Art Unit: 2198 Application/Control Number: 18/216,790 Page 7 Art Unit: 2198 Application/Control Number: 18/216,790 Page 8 Art Unit: 2198 Application/Control Number: 18/216,790 Page 9 Art Unit: 2198 Application/Control Number: 18/216,790 Page 10 Art Unit: 2198 Application/Control Number: 18/216,790 Page 11 Art Unit: 2198 Application/Control Number: 18/216,790 Page 12 Art Unit: 2198 Application/Control Number: 18/216,790 Page 13 Art Unit: 2198 Application/Control Number: 18/216,790 Page 14 Art Unit: 2198 Application/Control Number: 18/216,790 Page 15 Art Unit: 2198 Application/Control Number: 18/216,790 Page 16 Art Unit: 2198 Application/Control Number: 18/216,790 Page 17 Art Unit: 2198 Application/Control Number: 18/216,790 Page 18 Art Unit: 2198 Application/Control Number: 18/216,790 Page 19 Art Unit: 2198 Application/Control Number: 18/216,790 Page 20 Art Unit: 2198 Application/Control Number: 18/216,790 Page 21 Art Unit: 2198 Application/Control Number: 18/216,790 Page 22 Art Unit: 2198
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