Prosecution Insights
Last updated: May 29, 2026
Application No. 18/219,271

SIGNAL PROCESSOR, SIGNAL PROCESSING METHOD, AND RADAR DEVICE

Non-Final OA §102§103
Filed
Jul 07, 2023
Priority
Mar 05, 2021 — continuation of PCTJP2021008582
Examiner
MAKHDOOM, SAMARINA
Art Unit
3648
Tech Center
3600 — Transportation & Electronic Commerce
Assignee
Mitsubishi Electric Corporation
OA Round
2 (Non-Final)
71%
Grant Probability
Favorable
2-3
OA Rounds
2m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 71% — above average
71%
Career Allowance Rate
80 granted / 112 resolved
+19.4% vs TC avg
Strong +30% interview lift
Without
With
+30.1%
Interview Lift
resolved cases with interview
Typical timeline
3y 1m
Avg Prosecution
45 currently pending
Career history
183
Total Applications
across all art units

Statute-Specific Performance

§103
83.5%
+43.5% vs TC avg
§102
16.3%
-23.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 112 resolved cases

Office Action

§102 §103
DETAILED ACTION Response to Amendment The amendment filed September 19, 2025 has been entered. Claim 1, 4-5, 8-12, and 14 are amended. Claim 15-16 are new. Claims 1-16 are pending this application. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-2, 4-6, and 8-16 are rejected under 35 U.S.C. 103 as being unpatentable over Hirata et al (JP 2015203681 A) in view of Pierce (US 5402131 A). Regarding Claim 1, Hirata teaches a signal processor comprising processing circuitry to acquire an input reception signal of a reflected wave from a target to be detected [0039 for processing received video signal], and raise a sampling number of the input reception signal to a power, the power being an order of a high-order component included in the input reception signal [0041 for signal power and 0042], and to perform coherent integration of the reception signal having the sampling number raised to the power [0038-0041 Hirata fails to explicitly teach the high order component being a second order component or higher based on the sampling number, and detect the target based on signal intensity of the reception signal having the sampling number raised to the power. Pierce has a signal detection system with coherent radar (abstract) and teaches the high order component being a second order component or higher based on the sampling number [col 2, lines 25-45 for using second order averages of the IQ samples], and detect the target based on signal intensity of the reception signal having the sampling number raised to the power [col 2, lines 25-45 for raising IQ samples to the fourth power]. It would have been obvious to a person of ordinary skill in the art before the effective filling date of the applicant’s invention for modifying the radar signal processing techniques, as disclosed by Hirata, further including the z-transform calculations as taught by Pierce for the purpose to use signal energy as a detection test statistic (Pierce, col2, lines 25-45). Regarding Claim 2, Hirata teaches the processing circuitry performs fast Fourier transform on the reception signal as the coherent integration of the reception signal having the sampling number raised to the power [0039-0041]. Regarding Claim 4, Hirata teaches the processing circuitry further performs to acquire the reception signal of the reflected wave from the target to be detected and perform suppression of a phase change of the reception signal due to a low-order component included in the reception signal [0025, and 0056-0059], and output the reception signal after phase change suppression as the input reception signal of the reflected wave [0025, and 0056-0059]. Regarding Claim 5, Hirata teaches the processing circuitry acquires the reception signal of the reflected wave from the target to be detected [0062], extract a plurality of partialized reception signals that are a set of some reception signals having sampling numbers different from each other from the reception signal [0063-0065], and perform conversion of the plurality of partialized reception signals into a plurality of frequency domain signals, respectively, and output each of the plurality of frequency domain signals as the input reception signal of the reflected wave [0063-0065]. Regarding Claim 6, Hirata teaches the processing circuitry performs fast Fourier transform on each of the plurality of partialized reception signals as the conversion of the plurality of partialized reception signals into the plurality of frequency domain signals [0039-0041]. Regarding Claim 8, Hirata teaches the processing circuitry performs compensation for an acceleration component included in the reception signal of the reflected wave from the target to be detected using a provisionally set acceleration of the target [0066], extracts the plurality of partialized reception signals from the reception signal after the compensation for the acceleration component [0024, 0064-0066], and converts the plurality of partialized reception signals into the plurality of frequency domain signals, respectively [0063-0065]. Regarding Claim 9, Hirata teaches the processing circuitry further performs to detect the target to be detected on a basis of the signal intensity of the input reception signal after the coherent integration [0007]. Regarding Claim 10, Hirata teaches wherein the processing circuitry detects the target to be detected by performing CFAR (Constant False Alarm Rate) processing on the signal intensity of the input reception signal after the coherent integration [0041]. Regarding Claim 11, Hirata teaches the processing circuitry further performs to detect the target to be detected by performing CFAR processing on the signal intensity of the input reception signal after the coherent integration [0041], and perform the CFAR processing after setting an evaluation region in each of a direction of a low-order component and a direction of the high-order component in the target to be detected [0041]. Regarding Claim 12, Hirata teaches signal processing method comprising [0039-0041]: acquiring an input reception signal of a reflected wave from a target to be detected [0039 for processing received video signal], and raising a sampling number of the input reception signal to a power of a high-order component included in the input reception signal as a power index [0041 for signal power and 0042]; and performing coherent integration of the reception signal having the sampling number raised to the power [0038-0041] Hirata fails to explicitly teach an order of the high order component being a second order or higher based on the sampling number; and detecting the target based on signal intensity of the reception signal having the sampling number raised to the power. Pierce has a signal detection system with coherent radar (abstract) and teaches an order of the high order component being a second order or higher based on the sampling number [col 2, lines 25-45 for using second order averages of the IQ samples], and detecting the target based on signal intensity of the reception signal having the sampling number raised to the power [col 2, lines 25-45 for raising IQ samples to the fourth power]. It would have been obvious to a person of ordinary skill in the art before the effective filling date of the applicant’s invention for modifying the radar signal processing techniques, as disclosed by Hirata, further including the z-transform calculations as taught by Pierce for the purpose to use signal energy as a detection test statistic (Pierce, col2, lines 25-45). Regarding Claim 13, Hirata teaches radar device comprising: the signal processor and a receiver to receive the reflected wave from the target to be detected and output the input reception signal of the reflected wave to the signal processor [0007-0008]. Regarding Claim 14, Hirata teaches a transmitter to radiate an electromagnetic wave into the air, wherein the receiver receives the reflected wave that is the electromagnetic wave after the electromagnetic wave is radiated from the transmitter and reflected by the target to be detected [0007-0008]. Regarding Claim 15, Hirata fails to explicitly teach the high order component is a third order component or higher. Pierce has a signal detection system with coherent radar (abstract) and teaches teach the high order component is a third order component or higher [col 2, lines 25-45 for raising IQ samples to the fourth power]. It would have been obvious to a person of ordinary skill in the art before the effective filling date of the applicant’s invention for modifying the radar signal processing techniques, as disclosed by Hirata, further including the z-transform calculations as taught by Pierce for the purpose to use signal energy as a detection test statistic (Pierce, col2, lines 25-45). Regarding Claim 16, Hirata fails to explicitly teach the high order component is a third order component or higher. Pierce has a signal detection system with coherent radar (abstract) and teaches teach the high order component is a third order component or higher [col 2, lines 25-45 for raising IQ samples to the fourth power]. It would have been obvious to a person of ordinary skill in the art before the effective filling date of the applicant’s invention for modifying the radar signal processing techniques, as disclosed by Hirata, further including the z-transform calculations as taught by Pierce for the purpose to use signal energy as a detection test statistic (Pierce, col2, lines 25-45). Claims 3 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over Hirata et al (JP 2015203681 A) in view of Pierce (US 5402131 A), as applied to Claim 1 above and further in view of Kageme (JP 6567220 B1). Regarding Claim 3, Hirata fails to explicitly teach processing circuitry performs chirp Z-transform on the reception signal as the coherent integration of the reception signal having the sampling number raised to the power. Kageme has a radar apparatus radiates a transmission signal subjected to intra-pulse modulation to a space (abstract) and teaches processing circuitry performs chirp Z-transform on the reception signal as the coherent integration of the reception signal having the sampling number raised to the power [page 12, last two paragraph]. It would have been obvious to a person of ordinary skill in the art before the effective filling date of the applicant’s invention for modifying the radar signal processing techniques, as disclosed by Hirata, further including the z-transform calculations as taught by Kageme for the purpose to generate a frequency domain signal (Kageme, page 12, last two paragraph). Regarding Claim 7, Hirata fails to explicitly teach the processing circuitry performs chirp Z-transform on each of the partialized reception signals as the conversion of the plurality of partialized reception signals into the plurality of frequency domain signals. Kageme has a radar apparatus radiates a transmission signal subjected to intra-pulse modulation to a space (abstract) and teaches the processing circuitry performs chirp Z-transform on each of the partialized reception signals as the conversion of the plurality of partialized reception signals into the plurality of frequency domain signals [page 12, last two paragraph]. It would have been obvious to a person of ordinary skill in the art before the effective filling date of the applicant’s invention for modifying the radar signal processing techniques, as disclosed by Hirata, further including the z-transform calculations as taught by Kageme for the purpose to generate a frequency domain signal (Kageme, page 12, last two paragraph). Response to Arguments Applicant’s arguments with respect to claims 1-16 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument On page 2, third paragraph of the applicant’s arguments the applicant states that Hirata does not suggest a second order component based on the sampling number. The examiner has added secondary reference Pierce to demonstrate these common signal processing techniques used to determine target acceleration [Pierce, col 2, lines 25-45]. The examiner acknowledges that this is a broader interpretation than Applicant’s. However, examiners are not only allowed to apply broad interpretations, but are required to do so, as it reduces the possibility that the claims, once issued, will be interpreted more broadly than is justified. MPEP §2111. Patentability is determined by the “broadest reasonable interpretation consistent with the specification” (MPEP §2111), not the narrowest reasonable interpretation. And Applicant does not have an explicit lexicographical statement in line with MPEP §2111.01 subsection IV requiring a specific interpretation of the relevant phrases which forces the examiner to interpret them only one way. The express, implicit, and inherent disclosures of a prior art reference may be relied upon in the rejection of claims under 35 U.S.C. 102 or 103. "The inherent teaching of a prior art reference, a question of fact, arises both in the context of anticipation and obviousness." In re Napier, 55 F.3d 610, 613, 34 USPQ2d 1782, 1784 (Fed. Cir. 1995). 1. For applicant’s benefit, portions of the cited reference(s) have been cited to aid in the review of the rejection(s). While every attempt has been made to be thorough and consistent within the rejection it is noted that the PRIOR ART MUST BE CONSIDERED IN ITS ENTIRETY, including disclosures that teach away from the claims. See MPEP 2141.02 VI. “The use of patents as references is not limited to what the patentees describe as their own inventions or to the problems with which they are concerned. They are part of the literature of the art, relevant for all they contain.” In re Heck, 699 F.2d 1331, 1332-33, 216 USPQ 1038, 1039 (Fed. Cir. 1983) (quoting In re Lemelson, 397 F.2d 1006, 1009, 158 USPQ 275, 277 (CCPA 1968)). A reference may be relied upon for all that it would have reasonably suggested to one having ordinary skill in the art, including non-preferred embodiments. Merck & Co. v.Biocraft Laboratories, 874 F.2d 804, 10 USPQ2d 1843 (Fed. Cir.), cert. denied, 493 U.S. 975 (1989). See also Upsher-Smith Labs. v. Pamlab, LLC, 412 F.3d 1319, 1323, 75 USPQ2d 1213, 1215 (Fed. Cir. 2005) See MPEP 2123. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SAMARINA MAKHDOOM whose telephone number is (703)756-1044. The examiner can normally be reached Monday – Thursdays from 8:30 to 5:30 pm eastern time. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Kelleher can be reached on 571-272-7753 The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SAMARINA MAKHDOOM/ Examiner, Art Unit 3648 /William Kelleher/Supervisory Patent Examiner, Art Unit 3648
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Prosecution Timeline

Jul 07, 2023
Application Filed
May 19, 2025
Non-Final Rejection mailed — §102, §103
Aug 04, 2025
Interview Requested
Aug 11, 2025
Examiner Interview Summary
Aug 11, 2025
Applicant Interview (Telephonic)
Sep 19, 2025
Response Filed
Oct 23, 2025
Final Rejection mailed — §102, §103
Feb 20, 2026
Response after Non-Final Action

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

2-3
Expected OA Rounds
71%
Grant Probability
99%
With Interview (+30.1%)
3y 1m (~2m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 112 resolved cases by this examiner. Grant probability derived from career allowance rate.

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