Prosecution Insights
Last updated: October 01, 2026
Application No. 18/220,894

ELECTRONIC COMPONENT, METHOD OF MANUFACTURING ELECTRONIC COMPONENT, FILTER MODULE, AND ELECTRONIC DEVICE

Non-Final OA §102§103
Filed
Jul 12, 2023
Priority
Feb 05, 2021 — JP 2021-017228 +1 more
Examiner
HOSSAIN, KAZI S
Art Unit
2837
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Murata Manufacturing Co., Ltd.
OA Round
1 (Non-Final)
80%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
96%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allowance Rate
511 granted / 639 resolved
+12.0% vs TC avg
Strong +16% interview lift
Without
With
+16.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
32 currently pending
Career history
666
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
67.0%
+27.0% vs TC avg
§102
23.2%
-16.8% vs TC avg
§112
7.4%
-32.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 639 resolved cases

Office Action

§102 §103
DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Elections/Restrictions Applicant’s election of Group I and Species 1 (Claims 1-4 and 9-20) without traverse in the reply filed on 07/16/2026 is acknowledged. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 3, 9, 11, 13, 15, 17, and 19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Matsushita (US 20110037540 A1). Regarding Claim 1: Matsushita teaches that an electronic component comprising: a first insulator layer (22, Fig. 1; para 0044-0070) including thereon a first conductor pattern (22a) to define an inductor (i.e. elements 22a, via 23a and 21a formed the inductor) and a first electrode pattern (22c, Fig. 1) to define a capacitor; and a second insulator layer (21, Fig. 1; para 0044-0070 ) including thereon a second conductor pattern (21a) to define the inductor and a second electrode pattern (21c) to define the capacitor; wherein the first electrode pattern and the second electrode patter face each other across the second insulator layer (construed from Fig. 1) to form the capacitor, and at least a portion of the second conductor pattern along the first conductor pattern is electrically connected (see para 0048-0049) to the first conductor pattern. Regarding Claim 3, 11, 15 and 19: As applied to claim 1, 9, and 19, Matsushita teaches that wherein at least a portion of the second insulator layer includes a cavity (not shown; i.e. the hole or via for the penetration electrodes 23a that connect 21a and 22a in Fig. 1; see para 0048) immediately above the first conductor pattern, and the second electrode pattern is located in the cavity. Regarding Claim 9: As applied to claim 1, Matsushita teaches that a filter module (11, Fig. 3; para 0052-0054) comprising: an inductor (L1)or {a capacitor} connected to the electronic component. Regarding Claim 13: As applied to claim 1, Matsushita teaches that an electronic device (2, Fig. 1). Regarding Claim 17: As applied to claim 9, Matsushita teaches that the filter module comprising an electronic device (2, Fig. 1). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 2, 10, 14 and 18 are rejected under AIA 35 U.S.C. 103 as obvious over by Matsushita. Regarding Claim 2, 10, 14 and 18: As applied to claim 1, 9, 13 and 17, Matsushita teaches the first conductor pattern and the first electrode pattern, and the second conductor pattern and the second electrode pattern except the first conductor pattern and the first electrode pattern are made of a same material, and the second conductor pattern and the second electrode pattern are made of a same material. Although it is not explicitly stated that the first conductor pattern and the first electrode pattern are made of a same material, and the second conductor pattern and the second electrode pattern are made of a same material, this appears to be the case since it is not taught that the first conductor pattern and the first electrode pattern are made of a different material, and the second conductor pattern and the second electrode pattern are made of a different material. Alternatively, It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to have the first conductor pattern and the first electrode pattern are made of a same material, and the second conductor pattern and the second electrode pattern are made of a same material to simplify design, reduce manufacturing costs and provide a desired magnetic property. Allowable Subject Matter Claims 4, 12, 16 and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Claim 4, 12, 16 and 20 recites, wherein the first conductor pattern has a loop shape or includes a portion of a loop and the second conductor pattern has a loop shape or includes a portion of a loop, and an inner edge of the loop of the first conductor pattern is aligned with an inner edge of the loop of the second conductor pattern in plan view in a lamination direction of the first conductor pattern and the second conductor pattern. The references of record do not teach or suggest the aforementioned limitations, nor would it be obvious to modify those references to include such limitations. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. A list of pertinent prior art is attached in form 892. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Kazi Hossain whose telephone number is 571-272-8182. The examiner can normally be reached on Monday-Thursday from Monday to Thursday 8:00 AM to 4:30 PM (EST). If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ismail Shawki can be reached on 571-272-3985. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from Patent Center. Status information for published applications may be obtained from Patent Center. Status information for unpublished applications is available through Patent Center for authorized users only. Should you have questions about access to Patent Center, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) Form at https://www.uspto.gov/patents/uspto-automated- interview-request-air-form. /KAZI HOSSAIN/ Examiner, Art Unit 2837 /SHAWKI S ISMAIL/Supervisory Patent Examiner, Art Unit 2837
Read full office action

Prosecution Timeline

Jul 12, 2023
Application Filed
Sep 25, 2026
Non-Final Rejection mailed — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12749634
ON-LOAD TAP CHANGER AND TAP-CHANGING TRANSFORMER HAVING AN ON-LOAD TAP CHANGER
3y 7m to grant Granted Sep 29, 2026
Patent 12744155
COMPENSATION STRUCTURE FOR REDUCING CIRCULATING CURRENT IN WINDOW OF TRANSFORMER AND TRANSFORMER COMPRISING COMPENSATION STRUCTURE
3y 5m to grant Granted Sep 22, 2026
Patent 12744154
COIL DEVICE AND METHOD OF MANUFACTURING COIL DEVICE
3y 8m to grant Granted Sep 22, 2026
Patent 12738408
TRANSFORMER
3y 10m to grant Granted Sep 15, 2026
Patent 12738407
Power Inductor, Preparation Method of Power Inductor, and System in Package Module
3y 7m to grant Granted Sep 15, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
80%
Grant Probability
96%
With Interview (+16.0%)
2y 11m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 639 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month