Prosecution Insights
Last updated: October 02, 2026
Application No. 18/221,089

ELECTRONIC DEVICE AND METHOD FOR ACCELERATING NEURAL NETWORK COMPUTATIONS

Non-Final OA §101§103
Filed
Jul 12, 2023
Priority
Apr 14, 2022 — GR 20220100326 +3 more
Examiner
BRAHMACHARI, MANDRITA
Art Unit
Tech Center
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
77%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 77% — above average
77%
Career Allowance Rate
324 granted / 422 resolved
+16.8% vs TC avg
Strong +29% interview lift
Without
With
+28.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
26 currently pending
Career history
444
Total Applications
across all art units

Statute-Specific Performance

§101
12.1%
-27.9% vs TC avg
§103
57.4%
+17.4% vs TC avg
§102
6.1%
-33.9% vs TC avg
§112
17.4%
-22.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 422 resolved cases

Office Action

§101 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION The action is in response to claims dated 7/12/2023. Claims pending in the case: 1-15 Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefore, subject to the conditions and requirements of this title. Claims 15 are rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter. Regarding Claim 15, these claims are for one or more computer-readable storage medium comprising instructions. However, the computer-readable storage medium could be interpreted as signals. Therefore, the claim(s) does/do not fall within at least one of the four categories of patent eligible subject matter. Claim(s) 1-14 is/are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception (i.e., an abstract idea) without significantly more. Step1: determine whether the claim is directed to one of the four statutory categories of invention, i.e., process, machine, manufacture, or composition of matter. If YES, proceed to Step 2A, broken into two prongs. Step 2A, Prong 1: determine whether or not the claims recite a judicial exception (e.g., mathematical concepts, mental processes, certain methods of organizing human activity). If YES, the analysis proceeds to the second prong Step 2A, Prong 2: determine whether or not the claims integrate the judicial exception into a practical application. If NOT, the analysis proceeds to determining whether the claim is a patent-eligible application of the exception (Step 2B). Step 2B: If any element or combination of elements in the claim is sufficient to ensure that the claim integrates the judicial exception into a practical application, or else amounts to significantly more than the abstract idea itself. Step 1 Analysis According to the first part of the analysis, the instant case all claims are directed to one of the statutory categories of invention. Step 2A Prong 1, Step 2A Prong 2, and Step 2B Analysis Independent Claim 1 includes the following recitation of an abstract idea: generate a query matrix, a key matrix, and a value matrix by performing Fast Fourier Transform (FFT) and butterfly linear transform on at least one input matrix (This is practical to perform by the human mind under its broadest reasonable interpretation. This is a recitation of a mental process.) (This is mathematical calculations based on information that falls into the mathematical concepts group of abstract ideas.); and perform a first matrix multiplication between the query matrix and the key matrix (This is practical to perform by the human mind under its broadest reasonable interpretation. This is a recitation of a mental process.) (This is mathematical calculations based on information that falls into the mathematical concepts group of abstract ideas.). perform a SoftMax operation on the result of the first matrix multiplication (SoftMax operation is a standard mathematical function. This is mathematical calculations based on information that falls into the mathematical concepts group of abstract ideas.); and perform a second matrix multiplication between the result of the SoftMax operation and the value matrix (This is practical to perform by the human mind under its broadest reasonable interpretation. This is a recitation of a mental process.) (This is mathematical calculations based on information that falls into the mathematical concepts group of abstract ideas.) Claim 1 recites the following additional elements, which, considered individually and as an ordered combination, do not integrate the abstract idea into a practical application: a first processor configured and a second processor (This is a recitation of generic computer components to be used in performing the abstract idea, which does not integrate the abstract idea into a practical application or amount to significantly more than the abstract idea. See MPEP 2106.05(f).) These claimed limitations therefore do not integrate the abstract idea into a practical application. The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception. In this case, after considering all claim elements individually and as an ordered combination, it is determined that the claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception for the reasons given above with respect to integration of the abstract idea into a practical application. Therefore, the claim is not patent eligible. Independent Claims 11 and 15 are similar in scope as claim 1 and therefore rejected under the same rationale. The additional elements of “computer-readable storage medium” in claim 15 also do not integrate the abstract idea into a practical application or amount to significantly more than the abstract idea (This is a recitation of generic computer components to be used in performing the abstract idea, which does not integrate the abstract idea into a practical application or amount to significantly more than the abstract idea. See MPEP 2106.05(f).). The dependent claims recite at least the abstract idea identified above in the claim upon which it depends and recites the following additional elements which, considered individually and as an ordered combination with the additional elements from the claim upon which it depends, do not integrate the abstract idea into a practical application or amount to significantly more than the abstract idea. Dependent claim 2-4 pertain to using mathematical functions in data generation (This is series of mathematical calculations based on information that falls into the mathematical concepts group of abstract ideas.) (Calculations are practical to perform in the human mind under its broadest reasonable interpretation. This is a recitation of a mental process.). The additional element describing “butterfly engine comprises a memory system” considered individually and as an ordered combination do not integrate the abstract idea into a practical application (This is a recitation of generic computer components to be used in performing the abstract idea, which does not integrate the abstract idea into a practical application or amount to significantly more than the abstract idea. See MPEP 2106.05(f).) Dependent claim 5-6 pertain to elements used in the computation (This is a recitation of generic computer components to be used in performing the abstract idea, which does not integrate the abstract idea into a practical application or amount to significantly more than the abstract idea. See MPEP 2106.05(f).) Dependent claim 7-10 pertain to the computation sequence (This is practical to perform by the human mind under its broadest reasonable interpretation. This is a recitation of a mental process.) (This is also a series of mathematical calculations based on information that falls into the mathematical concepts group of abstract ideas.) The dependent claims, therefore, do not integrate the abstract idea into a practical application or amount to significantly more than the abstract idea Dependent Claims 12-14 are similar in scope as claim 8-10 and therefore rejected under the same rationale. Hence these claims are rejected as being abstract. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Luo (Stable, Fast and Accurate: Kernelized Attention with Relative Positional Encoding) in view of Dao (Learning Fast Algorithms for Linear Transforms Using Butterfly Factorizations). Please refer to the attached documents for claim mapping. Regarding Claim 1, Luo teaches, an electronic device for accelerating machine learning, ML, model computations, the electronic device comprising: a first processor configured to: generate a query matrix, a key matrix, and a value matrix by performing Fast Fourier Transform (FFT) and … transform on at least one input matrix (Luo: Pg. 2 section 2.1: Q, K, V; Pg. 4-5 section 3.2, Pg. 6 Section – Normalized Kernelized Attention with RPE: FFT based algorithm); and a second processor configured to: perform a first matrix multiplication between the query matrix and the key matrix (Luo: Pg. 2 section 2.1: refer to the equation); perform a SoftMax operation on the result of the first matrix multiplication (Luo: Pg. 2 section 2.1: refer to the equation); and perform a second matrix multiplication between the result of the SoftMax operation and the value matrix (Luo: Pg. 2 section 2.1: refer to the equation); However, Lou does not specifically teach, butterfly linear transform; Dao teaches, butterfly linear transform matrix (Dao: Pg. 3-4 section 3.1: common FFT algorithms use butterfly matrix); It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Luo and Dao because the combination would enable using butterfly transform in the algorithm One of ordinary skill in the art would have been motivated to combine the teachings because the combination would “address the problem of automatically learning fast algorithms for a class of important linear transforms, through a parameterization of recursive algorithms via butterfly factorizations: (see Dao Pg. 11 section 5). Regarding Claim 2, Luo and Dao teach the limitations as claimed in claim 1 and, The electronic device as claimed in claim 1 wherein the first processor comprises at least one butterfly engine configured to accelerate computations involving a sparse matrix with respect to the FFT and the butterfly linear transform, wherein the at least one butterfly engine comprises a memory system and a plurality of butterfly units, wherein each of the butterfly units comprises at least one real-number multiplier, at least one real-number adder, at least one complex-number adder, at least one multiplexer, and at least one de-multiplexer (Dao: Pg. 3-4 section 3.1: common FFT algorithms use butterfly matrix). It is obvious that the computation is implemented using adders and muxes. Regarding Claim 3, Luo and Dao teach the limitations as claimed in claim 2 and, wherein the each of the butterfly units is configured to perform the FFT and the butterfly transform based on the at least one input matrix and a plurality of twiddle factors multiplexer (Dao: Pg. 5 section -A butterfly parametrization: FFT with twiddle factors). Regarding Claim 4, Luo and Dao teach the limitations as claimed in claim 3 and, twiddle factors (Dao: Pg. 5 section -A butterfly parametrization: FFT with twiddle factors); But not, wherein: in a case of performing the butterfly linear transform, the twiddle factors are non-symmetric real numbers; and in a case of performing the FFT, the twiddle factors are complex and symmetric numbers. The Examiner finds that this additional description of the data is not functionally involved in the steps recited. Thus, this descriptive material will not distinguish the claimed invention from the prior art in terms of patentability. Regarding Claim 5, Luo and Dao teach the limitations as claimed in claim 3 and, wherein the each of the butterfly units comprises: four real-number multipliers, arranged to multiply at least one input matrix and the plurality of twiddle factors; two real-number adders or subtractors, arranged to add or subtract on outputs of two real- number multipliers from among the four real-number multipliers; two complex-number adders or subtractors, arranged to add or subtract on outputs of the two real-number adders or subtractors; eight multiplexers, arranged to select the at least one input matrix required to perform the FFT or the butterfly linear transform; and two de-multiplexers, arranged to control an output flow comprising outputting the data from the two real-number adders or subtractors, or providing the data from the two real-number adders or subtractors to two complex-number adders or subtractors (Dao: Pg. 3-4 section 3.1: common FFT algorithms use butterfly matrix). It is obvious that the computation may be implemented using components necessary for the calculations. Regarding Claim 6, Luo and Dao teach the limitations as claimed in claim 5 and, wherein control signals for the eight multiplexers or the two de-multiplexer are set before performing the FFT and the butterfly linear transform (Luo: Pg. 2-3 section 2.1: transformer design) (Dao: Pg. 3-4 section 3.1: common FFT algorithm using butterfly matrix). Presetting control signals as necessary is obvious to one skilled in the art. Regarding Claim 7, Luo and Dao teach the limitations as claimed in claim 2 and, wherein the memory system is configured to: calculating starting positions of data layout corresponding to the input matrix, the starting positions indicating how many rows a first element in a current column should be shifted down; permuting the at least one input matrix based on the starting positions; and offering data access to the butterfly units based on the permuted input matrix (Luo: Pg. 2-3 section 2.1: transformer design) (Dao: Pg. 3-4 section 3.1: common FFT algorithm using butterfly matrix). Given an algorithm, it would be obvious to one skilled in the art to derive the steps and implement the computation. Regarding Claim 8, Luo and Dao teach the limitations as claimed in claim 1 and, further comprises: a third processor configured to: receive the query matrix, the key matrix, and the value matrix from the first processor; and perform at least one of layer normalization or shortcut addition based on the query matrix, the key matrix, and the value matrix (Luo: Pg. 2 section 2.1: refer to the equation; Pg. 6 section Normalized Kernelized Attention with RPE: normalizing queries). The limitation can be derived by one skilled in the art based on the teachings in the arts. Regarding Claim 9, Luo and Dao teach the limitations as claimed in claim 1 and, wherein the first processor is further configured to generate the key matrix and the value matrix before the query matrix; and wherein the second processor further configured to start the first matrix multiplication, when at least part of the query matrix become available (Luo: Pg. 2 section 2.1: refer to the equation; Pg. 2 [3]: “The kernelized attention method replaces the dot-then-exponentiate attention by a simple matrix multiplication between the kernelized features of queries and key-value pairs”). Given an algorithm, it would be obvious to one skilled in the art to derive the steps required to implement the computation. Regarding Claim 10, Luo and Dao teach the limitations as claimed in claim 9 and, wherein the second processor is further configured to start the second matrix multiplication, when at least part of the result of the softmax operation become available (Luo: Pg. 2 section 2.1: refer to the equation; Pg. 2 [3]: “The kernelized attention method replaces the dot-then-exponentiate attention by a simple matrix multiplication between the kernelized features of queries and key-value pairs”). Given an algorithm, it would be obvious to one skilled in the art to derive the steps required to implement the computation. Regarding Claim(s) 11 and 15, this/these claim(s) is/are similar in scope as claim(s) 1. Therefore, this/these claim(s) is/are rejected under the same rationale. Regarding Claim(s) 12-14, these claim(s) are similar in scope as claim(s) 8-10 respectively. Therefore, this/these claim(s) is/are rejected under the same rationale. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure in the attached 892. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MANDRITA BRAHMACHARI whose telephone number is (571)272-9735. The examiner can normally be reached Monday to Friday, 11 am to 8 pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Tamara Kyle can be reached at 571 272 4241. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Mandrita Brahmachari/Primary Examiner, Art Unit 2144
Read full office action

Prosecution Timeline

Jul 12, 2023
Application Filed
Aug 13, 2026
Non-Final Rejection mailed — §101, §103
Sep 13, 2026
Interview Requested
Sep 14, 2026
Interview Requested

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12737047
Finger-Mounted Device With Sensors and Haptics
2y 7m to grant Granted Sep 15, 2026
Patent 12731049
METHODS AND SYSTEMS FOR ANOMALY AND PATTERN DETECTION OF UNSTRUCTURED BIG DATA
4y 9m to grant Granted Sep 08, 2026
Patent 12705487
METHOD FOR SIMPLIFYING AN ARTIFICIAL NEURAL NETWORK
4y 1m to grant Granted Aug 11, 2026
Patent 12705521
METHOD FOR DETERMINING AN ISOLATED OPERATING POINT ASSOCIATED WITH AN ISOLATED REGIME, METHOD FOR DETERMINING AN OPTIMAL SET OF PARAMETERS OF A MEASUREMENT MEANS AND SYSTEM THEREFOR
3y 7m to grant Granted Aug 11, 2026
Patent 12694313
QUANTUM CIRCUIT SIMULATION
4y 3m to grant Granted Jul 28, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
77%
Grant Probability
99%
With Interview (+28.9%)
2y 11m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 422 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month