Prosecution Insights
Last updated: April 19, 2026
Application No. 18/221,271

DELETION OPERATIONS IN QUANTUM DATABASE SYSTEMS

Non-Final OA §101§112
Filed
Jul 12, 2023
Examiner
MAMILLAPALLI, PAVAN
Art Unit
2159
Tech Center
2100 — Computer Architecture & Software
Assignee
Abu Dhabi University
OA Round
1 (Non-Final)
80%
Grant Probability
Favorable
1-2
OA Rounds
3y 3m
To Grant
98%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allow Rate
597 granted / 743 resolved
+25.3% vs TC avg
Strong +17% interview lift
Without
With
+17.2%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
21 currently pending
Career history
764
Total Applications
across all art units

Statute-Specific Performance

§101
24.1%
-15.9% vs TC avg
§103
51.7%
+11.7% vs TC avg
§102
8.0%
-32.0% vs TC avg
§112
8.5%
-31.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 743 resolved cases

Office Action

§101 §112
DETAILED ACTION This Office Action is in response for Application # 18/221,271 filed on July 12, 2023 in which claims 1-8 are presented for examination. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Status of claims Claims 1-8 are pending, of which claims 1-8 are rejected under 35 U.S.C. 112(a), First Paragraph and also claims 1-8 are rejected under 35 U.S.C. 101. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 1-8 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Applicant has disclosed a particular arrangement of quantum logic gates applied to particular quantum registers and qubits. Specification ¶¶ [0013]-[0027]. However, the claims recite an application of the recited quantum logic gates to a generic arrangements of quantum registers and qubits, such that there is no indication that such an algorithm would produce the results achieved by Applicant, such that one of ordinary skill in the art would not have understood Applicant to be in possession of the claimed generic algorithm. Applicant has disclosed a quantum circuit that requires both S operator 208 and applying, by the quantum circuit, |h|+1-qubit Toffoli gates 210 and 212; deleting, by the quantum circuit, marked data/records/basis states based on applying n of other 3-qubit Toffoli gates. However, the claims cover an embodiment where this is data/records/basis (which can be ‘or’), and one of ordinary skill in the art would not have understood Applicant to have invented such a digital circuit. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-8 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claims 1 and 8 recite “searching, by the quantum circuit, database data in register |QDB〉 that matches criteria specified in register |qr〉” and “applying, by the quantum circuit, an S operator.” Per the disclosure, the latter appears to be an envisioned way of doing the former. Specification ¶ [0015]. It is therefore unclear whether these are two separate limitation or the same limitation. For the purposes of examination, they will be read as reciting the same step. Claims 1 and 8 recite “removing, by the quantum circuit, an effect of the S operator; applying by the quantum circuit, n of 3-qubit Toffoli gates” This is indefinite. Firstly, there is insufficient antecedent basis for “an effect of the S operator.” This appears to be because the disclosure states that a S operator 208 is applied to remove the effect of the S operator 204 that was applied, whereas the claims recite removing an effect of the controlled S operator itself. Specification ¶ [0017]. Secondly, it is unclear how the quantum circuit is supposed to operate by applying the S operator but not applying the first two sets of |h|+1-qubit Toffoli gates, or vice versa. Specification ¶¶ [0018]-[0019]. Claims 1 and 8 recite removing “an effect of the S operator.” There is insufficient antecedent basis for this term. Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 1-8 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. As per claims 1 and 8: The claim(s) recites an abstract idea. The limitation, “searching, by the quantum circuit, database data in register |QDB〉 that matches criteria specified in register |qr〉” and “applying, by the quantum circuit, an S operator,” as drafted, recites a calculation, i.e., applying an S quantum logic gate. This limitation therefore falls within the “Mathematical Concepts” grouping of abstract ideas. MPEP § 2106.04(a)(2)(I). The limitation, “applying, by the quantum circuit, |h|+1-qubit Toffoli gate with |h| control qubits of the register |QDB〉,” as drafted, recites a calculation, i.e., applying a Toffoli quantum logic gate. This limitation therefore falls within the “Mathematical Concepts” grouping of abstract ideas. MPEP § 2106.04(a)(2)(I). The limitation, “removing, by the quantum circuit, an effect of the S operator,” as drafted, recites a calculation, i.e., applying a controlled S quantum logic gate. This limitation therefore falls within the “Mathematical Concepts” grouping of abstract ideas. MPEP § 2106.04(a)(2)(I). The limitation, “applying, by the quantum circuit, n of 3-qubit Toffoli gates,” as drafted, recites a calculation, i.e., applying a Toffoli quantum logic gate. This limitation therefore falls within the “Mathematical Concepts” grouping of abstract ideas. MPEP § 2106.04(a)(2)(I). The limitation, “applying, by the quantum circuit, additional n of another 3-qubit Toffoli gates,” as drafted, recites a calculation, i.e., applying a Toffoli quantum logic gate. This limitation therefore falls within the “Mathematical Concepts” grouping of abstract ideas. MPEP § 2106.04(a)(2)(I). The limitation, “deleting, by the quantum circuit, marked data/records/basis states based on applying n of other 3-qubit Toffoli gates,” as drafted, recites a calculation, i.e., applying a Toffoli quantum logic gate. This limitation therefore falls within the “Mathematical Concepts” grouping of abstract ideas. MPEP § 2106.04(a)(2)(I). The limitation, “applying, by the quantum circuit, an effect of the controlled-S operator,” as drafted, recites a calculation, i.e., applying a controlled S quantum logic gate. This limitation therefore falls within the “Mathematical Concepts” grouping of abstract ideas. MPEP § 2106.04(a)(2)(I). Accordingly, the claim(s) recites abstract ideas. MPEP § 2106.04(a). For the purposes of evaluating whether the claim(s) is directed to an abstract idea or is significantly more than an abstract idea, these recited abstract ideas can be considered together as a single abstract idea, namely a quantum database algorithm. MPEP § 2106.04(II)(B). The abstract idea of a quantum database algorithm is not integrated into a practical application. As an ordered combination, the invention merely invokes a quantum circuit as a mere tool to perform the recited quantum database algorithm because the registers and qubits are being invoked in their ordinary capacity to perform the recited algorithm. MPEP § 2106.05(f). Accordingly, the additional elements, individually or in combination, do not integrate the abstract idea into a practical application, even viewing the claim(s) as a whole, and therefore the claim is directed to an abstract idea. MPEP § 2106.04(d). As discussed above with respect to integration of the abstract idea into a practical application, the conclusions for the additional elements being generic computer components and mere instructions to apply on a computer, insignificant extra-solution activity, and/or mere field of use limitations are carried over and these additional elements do not provide significantly more than the abstract idea. MPEP § 2106.05(II). Accordingly, the claim(s) does not recite additional elements, either individually or in combination, that amount to significantly more than the abstract idea. MPEP § 2106.05. Therefore, as the claim(s) is directed to an abstract idea and does not recite additional elements that amount to significantly more than the abstract idea, the claim(s) is not patentable. MPEP § 2106. As per claim 2: The abstract idea of a quantum database algorithm is not integrated into a practical application. The additional element, “the registers include |QDB〉, |s〉, |qr〉, and |cb〉,” recites generic quantum computing components. MPEP § 2106.05(b). As an ordered combination, the invention merely invokes a quantum circuit as a mere tool to perform the recited quantum database algorithm because the registers and qubits are being invoked in their ordinary capacity to perform the recited algorithm. MPEP § 2106.05(f). Accordingly, the additional elements, individually or in combination, do not integrate the abstract idea into a practical application, even viewing the claim(s) as a whole, and therefore the claim is directed to an abstract idea. MPEP § 2106.04(d). As discussed above with respect to integration of the abstract idea into a practical application, the conclusions for the additional elements being generic computer components and mere instructions to apply on a computer, insignificant extra-solution activity, and/or mere field of use limitations are carried over and these additional elements do not provide significantly more than the abstract idea. MPEP § 2106.05(II). Accordingly, the claim(s) does not recite additional elements, either individually or in combination, that amount to significantly more than the abstract idea. MPEP § 2106.05. Therefore, as the claim(s) is directed to an abstract idea and does not recite additional elements that amount to significantly more than the abstract idea, the claim(s) is not patentable. MPEP § 2106. As per claim 3: The abstract idea of a quantum database algorithm is not integrated into a practical application. The additional element, “wherein the registers |cb〉, and |s) are control registers,” recites generic quantum computing components. MPEP § 2106.05(b). As an ordered combination, the invention merely invokes a quantum circuit as a mere tool to perform the recited quantum database algorithm because the registers and qubits are being invoked in their ordinary capacity to perform the recited algorithm. MPEP § 2106.05(f). Accordingly, the additional elements, individually or in combination, do not integrate the abstract idea into a practical application, even viewing the claim(s) as a whole, and therefore the claim is directed to an abstract idea. MPEP § 2106.04(d). As discussed above with respect to integration of the abstract idea into a practical application, the conclusions for the additional elements being generic computer components and mere instructions to apply on a computer, insignificant extra-solution activity, and/or mere field of use limitations are carried over and these additional elements do not provide significantly more than the abstract idea. MPEP § 2106.05(II). Accordingly, the claim(s) does not recite additional elements, either individually or in combination, that amount to significantly more than the abstract idea. MPEP § 2106.05. Therefore, as the claim(s) is directed to an abstract idea and does not recite additional elements that amount to significantly more than the abstract idea, the claim(s) is not patentable. MPEP § 2106. As per claim 4: The abstract idea of a quantum database algorithm is not integrated into a practical application. The additional element, “wherein the register |qr〉 is a quantum register that includes criteria to specify quantum data for deletion,” recites generic quantum computing components. MPEP § 2106.05(b). As an ordered combination, the invention merely invokes a quantum circuit as a mere tool to perform the recited quantum database algorithm because the registers and qubits are being invoked in their ordinary capacity to perform the recited algorithm. MPEP § 2106.05(f). Accordingly, the additional elements, individually or in combination, do not integrate the abstract idea into a practical application, even viewing the claim(s) as a whole, and therefore the claim is directed to an abstract idea. MPEP § 2106.04(d). As discussed above with respect to integration of the abstract idea into a practical application, the conclusions for the additional elements being generic computer components and mere instructions to apply on a computer, insignificant extra-solution activity, and/or mere field of use limitations are carried over and these additional elements do not provide significantly more than the abstract idea. MPEP § 2106.05(II). Accordingly, the claim(s) does not recite additional elements, either individually or in combination, that amount to significantly more than the abstract idea. MPEP § 2106.05. Therefore, as the claim(s) is directed to an abstract idea and does not recite additional elements that amount to significantly more than the abstract idea, the claim(s) is not patentable. MPEP § 2106. As per claim 5: The claim(s) recites an abstract idea. The limitation, “wherein the applying the |h|+1-qubit Toffoli gate includes entangling data/records/basis states/items which match criteria defined by the register |qr〉 for deletion,” as drafted, recites a calculation, i.e., applying a Toffoli quantum logic gate. This limitation therefore falls within the “Mathematical Concepts” grouping of abstract ideas. MPEP § 2106.04(a)(2)(I). Accordingly, the claim(s) recites an abstract idea. MPEP § 2106.04(a). As the claim(s) recites no additional elements, the abstract idea is not integrated into a practical application, the claim is directed to the abstract idea, and the claim(s) does not amount to significantly more than the abstract idea. MPEP § 2106.07. Therefore, as the claim(s) is directed to an abstract idea and does not recite additional elements that amount to significantly more than the abstract idea, the claim(s) is not patentable. MPEP § 2106. As per claim 6: The claim(s) recites an abstract idea. The limitation, “applying the n of 3-qubit Toffoli gates includes: φ 4 = ∏ k = 1 j T Q D B k S 2 c b k 2 φ 3 ,” as drafted, recites a mathematical equation. This limitation therefore falls within the “Mathematical Concepts” grouping of abstract ideas. MPEP § 2106.04(a)(2)(I). Accordingly, the claim(s) recites an abstract idea. MPEP § 2106.04(a). As the claim(s) recites no additional elements, the abstract idea is not integrated into a practical application, the claim is directed to the abstract idea, and the claim(s) does not amount to significantly more than the abstract idea. MPEP § 2106.07. Therefore, as the claim(s) is directed to an abstract idea and does not recite additional elements that amount to significantly more than the abstract idea, the claim(s) is not patentable. MPEP § 2106. As per claim 7: The claim(s) recites an abstract idea. The limitation, “wherein applying the |j|+1 qubit Toffoli gates includes: φ 7 =   T D Q D B h d q M + 1 φ 6 , ,” as drafted, recites a mathematical equation. This limitation therefore falls within the “Mathematical Concepts” grouping of abstract ideas. MPEP § 2106.04(a)(2)(I). Accordingly, the claim(s) recites an abstract idea. MPEP § 2106.04(a). As the claim(s) recites no additional elements, the abstract idea is not integrated into a practical application, the claim is directed to the abstract idea, and the claim(s) does not amount to significantly more than the abstract idea. MPEP § 2106.07. Therefore, as the claim(s) is directed to an abstract idea and does not recite additional elements that amount to significantly more than the abstract idea, the claim(s) is not patentable. MPEP § 2106. Conclusion The prior art does not teach the claimed quantum circuit. Any inquiry concerning this communication or earlier communications from the examiner should be directed to PAVAN MAMILLAPALLI whose telephone number is (571)270-3836. The examiner can normally be reached on M-F. 8am - 4pm, EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ann J Lo can be reached on (571) 272-9767. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /PAVAN MAMILLAPALLI/ Primary Examiner, Art Unit 2159
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Prosecution Timeline

Jul 12, 2023
Application Filed
Feb 17, 2026
Non-Final Rejection — §101, §112 (current)

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Prosecution Projections

1-2
Expected OA Rounds
80%
Grant Probability
98%
With Interview (+17.2%)
3y 3m
Median Time to Grant
Low
PTA Risk
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