DETAILED ACTION
Notice of Pre-AIA or AIA Status
Applicant’s amendment, filed 03/04/2026, for application number 18/221,272 has been received and entered into record. Claims 1, 13 and 22 are amended. Claims 17-20 are cancelled. Thus, claims 1-16, 21 and 22 are presented for examination.
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 4, 8 and 10 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Juntunen et al. (US 2017/0310359 A1).
Regarding claim 1, Juntunen teaches an edge device including software implemented in non-transitory computer-readable mediums connectable to a communication network (Figure 6 and 7) comprising:
at least one timing element that produces a period signal that is countable (oscillator 614, Figure 6 and “the hardware timer 612 receives clock pulses/ticks from its oscillator (OSC) 614.” paragraph 0086); and
at least one counter that counts the period signal (“a 16-bit hardware timer 612 with 1/4096 second resolution for the least significant bits (LSBs).” Par 0086), wherein the at least one counter provides a first indication of time based upon the counts of the period signal (“creating the locally generated view of current time using values from a timer local to a device” par 0014 and “client time is represented as a 24-bit value 608, using … a 16-bit hardware timer 612” par 0086) [the hardware timer accumulates internal counts to generate a local representation of time, corresponding to the first indication of time (604, Figure 6) which is used by the device to synchronize with the host’s time protocol],
wherein upon a triggering event, the at least one counter provides a second indication of time based upon the counts of the periodic signal (“the client device's timer 602 continues to run unmodified when synchronization occurs, whereby the client 600 refers to any future time in terms of the host's time 604, and performs a hardware, firmware and/or software calculation 624 to convert host time 604 to its own time 608” par 0086) [the triggering event is the receipt of the synchronization message 620; the second indication of time is the client’s own time 608, when the client receives the message, it references its own local hardware timer 608 which maintains a continuous count of oscillator ticks, see paragraph 86],
wherein the second indication of time differs from the first indication of time in that the first indication of time is based upon a first time protocol and the second indication of time is independent of the first time protocol (“the client device's timer 602 continues to run unmodified when synchronization occurs, whereby the client 600 refers to any future time in terms of the host's time 604, and performs a hardware, firmware and/or software calculation 624 to convert host time 604 to its own time 608” par 0086 and “the communicated synchronization data includes the master (e.g., host) view of current time … The client devices that receive the synchronization information also have local timers running that identify what the respective client believes the current time to be.” par 0049) [the device maintains two distinct times: the first indication (master/host time) provided by the synchronization protocol and a second indication (local time) generated by the hardware timer that is independent and runs unmodified even when synchronization events occur], and
wherein a communication signal generated by the edge device is time hopped prior to transmission to the communication network, wherein the time-hopping is based upon transmission timing intervals for the communication signal are determined using the second indication of time (“anticipated messages to be sent and/or received at certain time slots of a shared frequency hopping sequence.” Par 0039 and “each device involved in the communication is privy to the frequency hopping sequence in order to know when a particular communication frequency will become active in the sequence.” Par 0037 and “the client device's timer 602 continues to run unmodified when synchronization occurs, whereby the client 600 refers to any future time in terms of the host's time 604, and performs a hardware, firmware and/or software calculation 624 to convert host time 604 to its own time 608 in order to set its timer compare registers.” Par 0086) [the signal transmissions occur at specific time slots within a sequence; the intervals are controlled by hardware compare registers triggered by the device’s local timer (second indication)].
Regarding claim 4, Juntunen teaches the edge device of claim 1, wherein the second indication of time has a time reference that is different than a time reference of the first indication of time (“client 600 refers to any future time in terms of the host's time 604, and performs a … calculation 624 to convert host time 604 to its own time 608” par 0086 and “communicated synchronization data includes the master (e.g., host) view of current time … The client devices … also have local timers running that identify what the respective client believes the current time to be.” par 0049) [the first indication uses the host’s clock as its external reference; the second indication uses the client’s local hardware timer/oscillator as its time reference].
Regarding claim 8, Juntunen teaches the edge device of claim 1, wherein the first indication of time is discontinued once the triggering event occurs (“In this state, the extended windowing process described in connection with the synchronized but uncompensated state 504 is discontinued… the client device implements the extended windowing process while in the synchronized but uncompensated state 504, and does not extend its normal listening/ transmitting durations while in the synchronized and compensated state 506.” Par 0083 and Figure 5) [once the triggering event (receipt of synchronization messages) occurs, the device enters a compensated state, wherein the reliance on the first indication of time to adjust transmission/listening windows is discontinued, see paragraphs 82-84].
Regarding claim 10, Juntunen teaches the edge device of claim 1, wherein the first indication of time is associated with a first type of data once the triggering event occurs (“the client 600 refers to any future time in terms of the host's time 604,” par 0086 and paragraphs 80-81) [the first indication of time sets the listening window for received messages], wherein the second indication of time is associated with a second type of data once the triggering event occurs (“performs a … calculation 624 to convert host time 604 to its own time 608” Par 0086 and paragraph 81) [the second indication sets the guard band], and an importance of the first type of data is lower than an importance of the second type of data (“the requirement of extending the window for the guard band takes priority over the requirements of … extending the listening window for received messages.” Par 0081 and paragraph 56 and Figures 3A-3B) [the first type of data (listening window for received protocol messages) is controlled by the host’s synchronized time, the second type of data (guard band) is controlled by the independent local timer, which takes priority over the protocol based listening requirements once the synchronization occurs].
Claim 22 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Liaghati (US 2016/0226514 A1).
Regarding claim 22, Liaghati teaches an edge device including software implemented in non-transitory computer-readable mediums connectable to a communication network (Figures 1 and 3) comprising:
an edge device (electronic device 102, Figure 1); and
at least one counter providing an indication of time (counters 128, Figure 1 and paragraph 32),
wherein upon a triggering event, the indication of time has a time reference that is different than a time reference prior to the triggering event (“After N values [triggering event], a next measured value (N+1) [indication of time] is encoded as a “new” reference value [time reference] (as a reference for compression of subsequent data).” Par 0015 and Figure 1) [the counter reaching the threshold triggers the new reference value, replacing the previous reference to serve as a baseline for all subsequent data], and
wherein upon the triggering event, the indication of time is represented differently, wherein a difference in representation comprises a different data structure wherein the different data structure defines how time is represented for internal timekeeping within the edge device (“the comparator 130 determines that the magnitude of change satisfies the first threshold 142” par 0032 and “the magnitude of change cannot be represented using the “default” number of bits... the magnitude of change may be encoded into a second (“non-default”) number of bits” par 0037 and “The lookup table 157 includes a first plurality of bit values having the second number of bits (4 bits in this case) and a second plurality of bit values having a third number of bits (8 bits in this case).” Par 0037 and paragraphs 31 and 34 and Figure 1) [the triggering event is the magnitude of change exceeding a threshold, which causes the system to switch internal timekeeping (the sample delta) from a 4-bit default data structure to an 8-bit or 10-bit non-default data structure].
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2, 3, 7, 9, 11, 21 are rejected under 35 U.S.C. 103 as being unpatentable over Juntunen in view of Bordogna et al. (US 2022/0006607 A1).
Regarding claim 2, Juntunen teaches the edge device of claim 1. However, Juntunen does not explicitly teach wherein the first indication of time is based upon a standard time protocol.
In the analogous art, Bordogna further teaches wherein the first indication of time is based upon a standard time protocol (“PTP values can be received by a network interface device in Ethernet packets in accordance with IEEE-1588 from a network clock source.” Par 0030) [the PTP values follow IEEE-1588 standard time protocol].
It would have been obvious to a person having ordinary skill in the art, having the teachings of Juntunen and Bordogna before him before the effective filing date of the claimed invention, to have modified Juntunen to incorporate the teachings of Bordogna to have an indication of time based upon a standard time protocol to ensure high accuracy timing to prevent data loss and reduce clock drift.
Regarding claim 3, Juntunen and Bordogna teach the edge device of claim 2, Bordogna further teaches wherein the standard time protocol is either Network Time Protocol or Precision Time Protocol (“CPU nodes 200-0 to 200-N can determine a relationship between IEEE 1588 Precision Time Protocol (PTP) time stamps and a respective time stamp” par 0018).
Regarding claim 7, Juntunen teaches the edge device of claim 1. However, Juntunen does not explicitly teach wherein a number of bits to represent time of the first indication of time and a number of bits to represent time of the second indication of time are the different.
In the analogous art, Bordogna teaches wherein a number of bits to represent time of the first indication of time and a number of bits to represent time of the second indication of time are the different (“IEEE 1588-2008 or other higher or lower resolution can be applied for time stamps.” Par 0014 and “PTP value can be determined based on TSC values and used to time stamp packets or perform operations in a distributed process environment.” Par 0030) [the shows timestamps with varying resolutions (which mean varying bit lengths; higher resolution for timestamps requires more bits) for the network aligned first indication and local second indication of time].
It would have been obvious to a person having ordinary skill in the art, having the teachings of Juntunen and Bordogna before him before the effective filing date of the claimed invention, to have modified Juntunen to incorporate the teachings of Bordogna to represent the first and second indications of time with a different number of bits to optimize circuit efficiency for using higher precision for critical timestamps and lower precision for duration. This also reduces overall power consumption of the system and allows for faster computation times.
Regarding claim 9, Juntunen teaches the edge device of claim 1. However, Juntunen does not explicitly teach wherein the first indication of time is solely associated with synthetic data once the triggering event occurs.
In the analogous art, Bordogna teaches wherein the first indication of time is solely associated with synthetic data once the triggering event occurs (“determine a relationship (c) between PTP time (network time) and ART/TSC can be generated to predict PTP time stamp values based on ART TSC values.” Par 0022 and “a driver executing on a CPU node can trigger the network interface device to take a measurement of a main timer time stamp relative to a TSC via a Memory-mapped I/O (MMIO) write operation.” Par 0023) [the trigger event (MMIO write) establishes an operation to calculate predicted (synthetic) PTP timestamps derived from local counter rather than direct external synchronization].
It would have been obvious to a person having ordinary skill in the art, having the teachings of Juntunen and Bordogna before him before the effective filing date of the claimed invention, to have modified Juntunen to incorporate the teachings of Bordogna to have the first indication of time associated with synthetic data to ensure data privacy and reduce data transmission costs, all while protecting the natural data once the triggering even occurs.
Regarding claim 11, Juntunen teaches the edge device of claim 1. However, Juntunen does not explicitly teach wherein the second indication of time repeatedly changes.
In the analogous art, Bordogna teaches wherein the second indication of time repeatedly changes (“relationships between time stamps can change over time, determination of (a), (b), and (c) can be performed after receipt of X number of PTP time stamps,” par 0025) [the correlation between local second indication (TSC) and the network reference changes, showing that the time indication repeatedly updates/is recalculates to maintain alignment].
It would have been obvious to a person having ordinary skill in the art, having the teachings of Juntunen and Bordogna before him before the effective filing date of the claimed invention, to have modified Juntunen to incorporate the teachings of Bordogna to have the second indication of time repeatedly change to maintain alignment with the timers. (Bordogna, paragraph 14 and Figure 1)
Regarding claim 21, Juntunen teaches the edge device of claim 1. However, Juntunen does not explicitly teach wherein the first indication of time is based upon a standard time protocol and the second indication of time is not based upon a standard time protocol.
In the analogous art, Bordogna teaches wherein the first indication of time is based upon a standard time protocol (“PTP values can be received by a network interface device in Ethernet packets in accordance with IEEE-1588 from a network clock source.” Par 0030) [the PTP values follow IEEE-1588 standard time protocol] and the second indication of time is not based upon a standard time protocol (“A free running time stamp counter (TSC),.. A TSC can be clocked from the CPU's crystal clock source, but can be free running and asynchronous to a network timing domain.” Par 0003) [the local hardware counter (second indication) is driven by internal crystal clock source rather than standard network time protocol].
It would have been obvious to a person having ordinary skill in the art, having the teachings of Juntunen and Bordogna before him before the effective filing date of the claimed invention, to have modified Juntunen to incorporate the teachings of Bordogna to provide a hybrid technique for the indications of time that would allow for local reliability, such as ensuring chronological order of events, even during time adjustments.
Claims 12-16 are rejected under 35 U.S.C. 103 as being unpatentable over Juntunen in view of Fathallah et al. (US 2004/0208624 A1).
Regarding claim 12, Juntunen teaches the edge device of claim 1. However, Juntunen does not explicitly teach wherein a communication signal of the edge device is time hopped by the edge device prior to transmission to the communication network.
In the analogous art, Fathallah teaches wherein a communication signal of the edge device is time hopped by the edge device prior to transmission to the communication network (“introducing, according to a code, a predetermined time delay in spectral components of the multi-wavelength optical signal…to displace the spectral components within the bit time slot; and feeding the spectral components delayed according to the code into a waveguide transmission medium” par 0019 and “The output is an FFHSS signal composed from M sub-pulses (or chip-pulses), each of which is centered at different frequency and ordered in time as fixed by the FFH code.” Par 0069 and “ The coded signal will be a series of time pulses, each with a distinct slice of the spectrum. This signal is sent to the optical network” par 0073) [the communication signal is time-hopped by precisely ordering and positioning its spectral sub-pulses in time according to a specific hopping code before being transmitted to the network channel].
It would have been obvious to a person having ordinary skill in the art, having the teachings of Juntunen and Fathallah before him before the effective filing date of the claimed invention, to have modified Juntunen to incorporate the teachings of Fathallah to time-hop the communication signal before transmission to provide high resolution deterministic precision of the raw local TSC needed for accurate sub-pulse delay while removing synchronization overhead.
Regarding claim 13, Juntunen and Fathallah teach the edge device of claim 12, Fathallah further teaches wherein a protocol of the second indication of time changes in a predetermine manner (“The M available frequencies are assigned to the M chip intervals as prescribed by the selected code from the code generator 105… The frequency synthesizer 104 output signal is a wide band time periodic deterministic signal with time period equal to the duration of a one data bit modulated signal (Tb).” Par 0004) [this describes a frequency-hopping protocol where the signal transitions through a sequence of frequencies in a predetermined order defined by the code generator; the second indication of time may correspond to the locally generated frequency-hop sequence].
Regarding claim 14, Juntunen and Fathallah teach the edge device of claim 12, Fathallah further teaches wherein a protocol of the second indication of time changes in a random manner (“direct sequence (DS) system, in which each information bit is multiplied by a temporal pseudo-random sequence, and a frequency hopping (FH) system, in which the carrier frequency of a narrow-band information transmitted signal is switched (or hopped) at a random and discrete method.” Par 0003) [this describes communication protocols where the signal’s timing/frequency characteristics are modified using random/pseudo-random sequences].
Regarding claim 15, Juntunen and Fathallah teach the edge device of claim 12, Fathallah further teaches wherein the communication signal of the edge device is transmitted via a frequency hopping spread spectrum (“a frequency hopping (FH) system, in which the carrier frequency of a narrow-band information transmitted signal is switched (or hopped) at a random and discrete method.” Par 0003) [the signal’s carrier frequency is hopped across discrete values to implement a spread spectrum communication system].
Claim 16 repeats the same limitations as recited in claim 15 and is rejected accordingly.
Claims 5-6 are rejected under 35 U.S.C. 103 as being unpatentable over Juntunen in view of Martin et al. (US 2020/0379506 A1).
Regarding claim 5, Juntunen teach the edge device of claim 1. However, Juntunen does not explicitly teach wherein a number of bits to represent time of the first indication of time and a number of bits to represent time of the second indication of time are the same.
In the analogous art, Martin teaches wherein a number of bits to represent time of the first indication of time and a number of bits to represent time of the second indication of time are the same (“Each circuit 204… obtain, at the output, numbers having the same size (the same number of bits) as in signal H synchronized on the corresponding clock domain.” Par 0060 and each number comprises 64 bits.” Par 0008) [this defines time signal as 64-bit width and requires synchronized indications provided to different clock domains to maintain this exact bit width].
It would have been obvious to a person having ordinary skill in the art, having the teachings of Juntunen and Martin before him before the effective filing date of the claimed invention, to have modified Juntunen to incorporate the teachings of Martin to represent both indications of time with the same number of bits to reduce data overhead and reduce parsing errors.
Regarding claim 6, Juntunen and Martin teach the edge device of claim 5, Martin further teaches wherein an encoding of the bits of the first indication of time and an encoding of the bits of the second indication of time are different (“Signal H is for example a binary signal comprising numbers in hexadecimal coding, over 64 bits.” Par 0031 and “signal H is coded, for example, over 9 bits, including 7 data bits and 2 synchronization bits.” Par 0055) [this differentiates encodings by defining first indication as 64-bit hex binary signal while second indication is re-encoded into a 9-bit format].
Response to Arguments
Applicant’s arguments with respect to claim(s) 1 and 22 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
No additional arguments were presented as to the remaining claims. As such, the rejection is maintained.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/AYMAN FATIMA/Examiner, Art Unit 2176
/JAWEED A ABBASZADEH/Supervisory Patent Examiner, Art Unit 2176