Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
For reissue applications filed on or after September 16, 2012, all references to 35 U.S.C. 251 and 37 CFR 1.172, 1.175, and 3.73 are to the current provisions.
FINAL OFFICE ACTION
This Office Action addresses U.S. Patent Application No. 18/223,856, which is filed as a reissue of U.S. Patent Application No. 16/811,209 (hereinafter, the '209 application), entitled “SEMICONDUCTOR MEMORY DEVICE”, which issued as U.S. Patent No. 11,069,405 (hereinafter, the '405 patent). The '405 patent claims priority to JP 2019-166252.
Claims 1-18 are pending.
Claims 1-14 were issued in the '405 patent.
Claims 15-18 are newly presented with this reissue application.
PRIOR OR CONCURRENT PROCEEDINGS
Applicant is reminded of the continuing obligation under 37 CFR 1.178(b), to timely apprise the Office of any prior or concurrent proceeding in which the patent is or was involved. These proceedings would include interferences, reissues, reexaminations, and litigation. Applicant is further reminded of the continuing obligation under 37 CFR 1.56, to timely apprise the Office of any information which is material to patentability of the claims under consideration in this reissue application.
These obligations rest with each individual associated with the filing and prosecution of this application for reissue. See also MPEP §§ 1404, 1442.01 and 1442.04.
DRAWING OBJECTIONS
The previous objections to the drawings are withdrawn due to the amended drawings filed June 2, 2026.
However, a new objection is made due to the amended drawings.
Figure 3 is objected to as the replacement sheet number crosses the outline of the drawing view:
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84
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Corrected drawing sheets are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended.
Each amended drawing should be labeled “Amended”, for example:
FIG. 1
(Amended)
Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d).
If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Note 37 CFR 1.173 for reissue drawing amendments. Note also MPEP 1413.
SPECIFICATION
The previous objections to title and specification are withdrawn due to the amendments and associated arguments filed June 2, 2026.
With particular regard to the argument that:
“the issued '405 patent already contains the term "wiring". It is further noted that the claims as currently presented use terminology identical to that of the issued '405 patent. The term "wiring" was present in the claims throughout prosecution and was not objected to during prosecution of the original patent. This further supports the position that "wiring" is proper and acceptable claim terminology in this art” (applicant’s remarks, page 24).
Such an argument has no place in reissue practice. See 37 CFR 1.176 and MPEP 1445.
Nevertheless, since applicant has now provided a concrete definition for “wiring”, i.e. conductive lines that encompass "bit lines" and/or "word lines" within the memory array, the previous objections to the use of “wiring” in the specification have been withdrawn.
CLAIM INTERPRETATION
In accordance with applicant’s arguments attached to the amendment of June 2, 2026, the claimed “wiring” and/or “wirings” are interpreted as follows:
“As noted above, the specification clearly describes "wiring" or "wirings" as conductive lines that encompass "bit lines" and/or "word lines" for example; and the claims use "wiring" or "wirings" consistently with this specification disclosure. Therefore, a person of ordinary skill in the art of semiconductor memory devices would readily understand that "first wiring," "second wiring," etc. refer to conductive lines (e.g., bit lines and word lines) within the memory array.” (applicant’s remarks, page 24).
CLAIM SUPPORT
The previous requirement for support for each of limitations of the amended claims has been met by a proper showing of support on pages 18-22 of the remarks attached to the amendment of June 2, 2022. Note MPEP 1411.02.
CLAIM OBJECTIONS
Since applicant has now provided a concrete definition for “wiring”, i.e. conductive lines that encompass "bit lines" and/or "word lines" within the memory array, the previous objections to the use of “wiring” in the claims are withdrawn.
OBJECTIONS BASED ON DEFECTIVE OATH/DECLARATION
The statement of error in the declaration filed August 22, 2023 is as follows:
“At least one error is that the Applicant claimed less than the Applicant had a right to claim. Original claim 1 is directed to a semiconductor memory device comprising first through eighteenth wirings. Applicant is entitled to broader claims including claims directed to semiconductor memory devices comprising first through tenth wirings, as recited in new claim 15. Further, original claim 1 additionally recites first through third contacts. Applicant is entitled to broader claims including claims directed to semiconductor memory devices comprising ‘a first contact electrically connected to the portion of the tenth wiring and extending in the second direction to pass through a region between the sixth wiring and the seventh wiring and a region between the fourth wiring and the fifth wiring, the first contact being electrically connected to the portion of the first wiring,’ as recited in new claim 15.”
The reissue oath/declaration filed with this application is objected to as defective (see 37 CFR 1.175 and MPEP § 1414) because of the following:
(1) The statement of error states that “Original claim 1 is directed to a semiconductor memory device comprising first through eighteenth wirings” and that “Applicant is entitled to broader claims”. However, that error was already corrected by original patent claim 12, which comprises first through twelfth wirings.
(2) The statement of error states that “Further, original claim 1 additionally recites first through third contacts” and that “Applicant is entitled to broader claims”. However, that error was already corrected by original patent claim 12, which comprises “a first contact electrically connected to a portion of the eighth wiring, and passing through a region between the fourth wiring and the fifth wiring and a region between the second wiring and the third wiring.”
REJECTIONS BASED ON DEFECTIVE OATH/DECLARATION
The following is a quotation of the appropriate paragraphs of pre-AIA 35 U.S.C. §251 that form the basis for the rejections under this section made in this Office action:
(a) IN GENERAL.—Whenever any patent is, through error, deemed wholly or partly inoperative or invalid, by reason of a defective specification or drawing, or by reason of the patentee claiming more or less than he had a right to claim in the patent, the Director shall, on the surrender of such patent and the payment of the fee required by law, reissue the patent for the invention disclosed in the original patent, and in accordance with a new and amended application, for the unexpired part of the term of the original patent. No new matter shall be introduced into the application for reissue.
Defective Reissue Declaration
Claims 1-18 are rejected as being based upon a defective reissue declaration under 35 U.S.C. §251. The declaration is defective for all of the reasons set forth above with regard to the objections to the declaration. See 37 CFR 1.175.
Original Patent Requirement
The previous rejection of claims 15-18 under the original patent requirement of § 251 is withdrawn due to the remarks submitted with the amendment filed June 2, 2026, which demonstrate that the features of claims 15-18 are supported by the original patent disclosure:
“new claims 15-18 are supported by the third embodiment of FIG. 4. The third embodiment is described in substantial detail over approximately three columns of the specification (col. 16, line 6 through col. 19, line 25) and is illustrated in its own dedicated drawing figure (FIG. 4). The four-layer structure of claims 15-18, which comprise first through tenth wirings, first through fourth resistive change elements, and a first contact, maps precisely to the structural elements disclosed for the third embodiment.”
CLAIM INTERPRETATION
For the reasons set forth in the previous Office action, the limitations of claims 1-18 do not invoke 35 U.S.C. § 112, 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. § 112, sixth paragraph.
PRIOR ART
The prior art of record that appears most relevant to the present claims was previously cited during the prosecution of the '405 patent. These include:
Inuzuka et al., JP2019169214A
Jeong et al., U.S. Patent Application No. 2019/0140022
Sonehara, U.S. Patent No. 9019748
None of these references appear to teach or suggest, either alone or in combination, each and all of the features of claims 1-14.
As an example with regard to the broadest claim 12, the prior art does not teach or suggest the claimed semiconductor memory device comprising:
a plurality of first wirings disposed at a first level and extending in a first direction;
a second wiring and a third wiring disposed at a second level, a position of which in a second direction intersecting with the first direction is different from that of the first level, the second wiring and the third wiring extending in a third direction that intersects with the first direction and the second direction, and being separated from each other;
a plurality of first resistive change elements each including a first terminal and a second terminal and disposed between one of the first wirings and one of the second wiring and the third wiring, the first terminal being electrically connected to the one of the first wirings, and the second terminal being electrically connected to the one of the second wiring and the third wiring;
a fourth wiring disposed to be in contact with a face of the second wiring opposite to the first wirings and extending in the third direction;
a fifth wiring disposed to be in contact with a face of the third wiring opposite to the first wirings, extending in the third direction, and separated from the fourth wiring;
a plurality of sixth wirings disposed at a third level and extending in the first direction, the second level being between the first level and the third level;
a plurality of second resistive change elements each including a third terminal and a fourth terminal and disposed between one of the fourth wiring and the fifth wiring and one of the sixth wirings, the third terminal being electrically connected to the one of the fourth wiring and the fifth wiring, and the fourth terminal being electrically connected to the one of the sixth wirings;
a plurality of seventh wirings disposed to correspond to the sixth wirings and extending in the first direction, each of the seventh wirings being disposed to be in contact with a face of corresponding one of the sixth wirings opposite to the second resistive change elements;
an eighth wiring and a ninth wiring disposed at a fourth level, extending in the third direction, and separated from each other, the third level being between the fourth level and the second level;
a plurality of third resistive change elements each including a fifth terminal and a six terminal and disposed between one of the seventh wirings and one of the eighth wiring and the ninth wiring, the fifth terminal being electrically connected to the one of the seventh wirings, and the six terminal being electrically connected to the one of the eighth wiring and the ninth wiring;
a tenth wiring disposed to be in contact with a face of the eighth wiring opposite to the seventh wirings and extending in the third direction;
an eleventh wiring disposed to be in contact with a face of the ninth wiring opposite to the seventh wirings and extending in the third direction, and separated from the tenth wiring;
a plurality of twelfth wirings disposed at a fifth level and extending in the first direction, the fourth level being between the fifth level and the third level;
a plurality of fourth resistive change elements each including a seventh terminal and an eighth terminal and disposed between one of the tenth wiring and the eleventh wiring and one of the twelfth wirings, the seventh terminal being electrically connected to the one of the tenth wiring and the eleventh wiring, and the eighth terminal being electrically connected to the one of the twelfth wirings; and
a first contact electrically connected to a portion of the eighth wiring, and passing through a region between the fourth wiring and the fifth wiring and a region between the second wiring and the third wiring.
RESPONSE TO ARGUMENTS
In response to the amendment and associated arguments filed June 2, 2026, this Office action:
(1) Withdraws the previous objections to the drawings.
(2) Makes a new objection to the drawings in response to the amendment.
(3) Withdraws the previous objections to the specification.
(4) Confirms a claim interpretation of the term “wiring”.
(5) Notes support for the new claim limitations provided with the amendment.
(6) Withdraws the previous objections to the claims.
(7) Maintains the previous objection based on a defective declaration.
(8) Maintains the previous rejection based on a defective declaration.
(9) Withdraws the previous rejection based on the original patent requirement.
With further regard to applicant’s arguments directed to the statement of error in the declaration, these arguments hinge on the differences between patent claim 12 and patent claim 1, such as “At least because original claim 12 recites a ‘contact electrically connected to a portion of the eight wiring,’ which is not required by original claim 1” (applicant’s remarks, page 26).
While applicant is correct that patent claim 1 and patent claim 12 have differences in scope, none of these arguments are reflected in the language of the error statement. There are two errors listed in the declaration. The first error, for example, states, “Applicant is entitled to broader claims including claims directed to semiconductor memory devices comprising first through tenth wirings.”
But claim 12 is (a) a broader claim than claim 1 in at least some respects and (b) directed to semiconductor memory devices comprising at least first through tenth wirings. Thus, there is no such error in the original patent because the purported error in patent claim 1 was corrected by patent claim 12.
The error statement in the declaration represents the basis for reissue. Without an error, there can be no reissue. The broadening error statement should be revised so that it provides a true distinction from what is desired and what is already in the original patent.
CONCLUSION
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to B. James Peikari at telephone number (571)272-4185. The examiner can normally be reached on Mon-Fri from 8:30am to 5:30pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Alexander Kosowski, SPE Art Unit 3992, can be reached at 571-272-3744.
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Any inquiry concerning this communication or earlier communications from the examiner, or as to the status of this proceeding, should be directed to the Central Reexamination Unit at telephone number (571) 272-7705.
/B. James Peikari/
Primary Examiner, Art Unit 3992
Conferees:
/DENNIS G BONSHOCK/Primary Examiner, Art Unit 3992
/ALEXANDER J KOSOWSKI/Supervisory Patent Examiner, Art Unit 3992
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