Prosecution Insights
Last updated: April 19, 2026
Application No. 18/224,704

METHODS AND SYSTEMS FOR PATCH-BY-PATCH CHARACTERIZATION OF QUANTUM PROCESSORS

Non-Final OA §112
Filed
Jul 21, 2023
Examiner
MAIDO, MAGGIE T
Art Unit
2129
Tech Center
2100 — Computer Architecture & Software
Assignee
Qedma Quantum Computing
OA Round
1 (Non-Final)
64%
Grant Probability
Moderate
1-2
OA Rounds
4y 3m
To Grant
85%
With Interview

Examiner Intelligence

Grants 64% of resolved cases
64%
Career Allow Rate
23 granted / 36 resolved
+8.9% vs TC avg
Strong +21% interview lift
Without
With
+20.7%
Interview Lift
resolved cases with interview
Typical timeline
4y 3m
Avg Prosecution
51 currently pending
Career history
87
Total Applications
across all art units

Statute-Specific Performance

§101
25.6%
-14.4% vs TC avg
§103
56.1%
+16.1% vs TC avg
§102
2.6%
-37.4% vs TC avg
§112
15.3%
-24.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 36 resolved cases

Office Action

§112
DETAILED ACTION This action is responsive to claims filed on 1 April 2024. Claims 1-20 are pending for examination. Allowable Subject Matter Claim 1 would be allowable if rewritten or amended to overcome the rejection under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action. Claims 2-20, which depend directly or indirectly from Claim 1, would be allowable. The following is a statement of reasons for the indication of allowable subject matter. The claims in the application are deemed to be directed to a nonobvious improvement over the prior art of record. The prior art does not anticipate, or render obvious as a whole, the claim limitations of Claim 1 as disclosed in Applicant’s claims. The closest prior art, listed below, discloses: Sete et al. (U.S. Pre-Grant Publication No. 20190007051) teaches steps (b) measuring the patch qubits using a measurement apparatus of said quantum processor; (c) repeating (a)-(b) to collect a set of frequencies, said frequencies being associated with a measurement outcome and a quantum circuit; (d) computing a value of the model parameters by fitting the model to said set of frequencies Presented with the additional limitations of Claim 1, Sete fails to make a prima facie case of obviousness for limitations (a) applying a set of quantum circuits to the quantum processor, wherein at least some of said quantum circuits comprise: i) a characterization gate sequence applicable to said qubit patch configured to provide measurement outcomes sensitive to at least some of the model parameters; and ii) a neighboring gate sequence applicable to at least some neighboring qubits outside the qubit patch and interacting with the qubit patch, wherein said neighboring gate sequence is configured to reduce the sensitivity of measurement outcomes to implementation errors involving environment qubits outside the qubit patch because the quantum computing system shown to be found in Sete cannot be reconciled with the above limitations and an obviousness determination would require impermissible hindsight. In summary, the references made of record, fail to disclose the required claimed technical features recited by the Claim 1 limitations as a whole. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Objections Claim 1 is objected to because of the following informalities: “patch qubits” in line 16 should be “qubit patch”. Appropriate correction is required. Claim 9 is objected to because of the following informalities: “neighboring gate sequences” in line 2 should be “neighboring gate sequence”. Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1 recites the limitation "said frequencies" in line 18. There is insufficient antecedent basis for this limitation in the claim. For examination purposes, "said frequencies" has been construed to be “said set of frequencies”. Claims 2-20, which depend directly or indirectly from claim 1, are similarly rejected. Claim 4 recites the limitation "the reduced density operator" in line 3. There is insufficient antecedent basis for this limitation in the claim. For examination purposes, "the reduced density operator" has been construed to be “a reduced density operator”. Claim 5, which depends from claim 4, is similarly rejected. Claim 4 recites the limitation "the unit operator" in line 4. There is insufficient antecedent basis for this limitation in the claim. For examination purposes, "the unit operator" has been construed to be “an unit operator”. Claim 5, which depends from claim 4, is similarly rejected. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MAGGIE MAIDO whose telephone number is (703) 756-1953. The examiner can normally be reached M-Th: 6am - 4pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Michael Huntley can be reached on (303) 297-4307. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MM/Examiner, Art Unit 2129 /MICHAEL J HUNTLEY/Supervisory Patent Examiner, Art Unit 2129
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Prosecution Timeline

Jul 21, 2023
Application Filed
Mar 12, 2026
Non-Final Rejection — §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
64%
Grant Probability
85%
With Interview (+20.7%)
4y 3m
Median Time to Grant
Low
PTA Risk
Based on 36 resolved cases by this examiner. Grant probability derived from career allow rate.

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