CTNF 18/224,710 CTNF 86643 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Remarks The present application having Application No. 18/224,710 filed on 07/21/2023 presents claims 1-20 for examination. Examiner Notes Examiner cites particular columns and line numbers in the references as applied to the claims below for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested that, in preparing responses, the applicant fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner. 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Drawings The applicant’s drawings submitted are acceptable for examination purposes. Information Disclosure Statement The information disclosure statement (IDSs) submitted on 07/21/2023, 10/15/2024 and 03/31/2026 are acknowledge and the cited prior art references have been considered by the examiner. Claim Objections Claims 5, 7, 8, 14, 17 are objected to because of the following informalities: Claim 5 recites “detected application” in line 6. It is missing an article, it should be changed to “the detected application.” Claim 14 mirrors claim 5 and requires similar correction. Claim 7 recites “collect historical data time series data” in line 2. It appears that for clarity and consistency, it should be changed to “collect historical time series data” Claim 8 recites “…a largest data set size. an average dataset…” in line 3. There appears to be a typographical error, the “.” (period) should be changed to “;”. Claim 17 mirrors claim 8 and requires similar correction. Appropriate corrections are required. Claim Rejections - 35 USC § 112 07-30-02 AIA The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. 07-34-01 Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. 07-34-05 AIA Claim 1 recites the limitation " the application " in lines 6-7 . There is insufficient antecedent basis for this limitation in the claim. Claim 3 recites the limitation "the corresponding reserved memory size" in lines 4-5. There is insufficient antecedent basis for this limitation in the claim. It is not clear whether “the corresponding reserved memory size” refers to “a corresponding reserved memory pool storage area of a size” recited in claim 1 or anything else. 07-34-05 AIA Claim 4 recites the limitation " the corresponding reserved size of a memory " in line 2 . There is insufficient antecedent basis for this limitation in the claim. Claim 8 recites the limitation “the one or more profile features” in line 1. There is insufficient antecedent basis for this limitation in the claim. It appears that “the one or more profile features” should be “the one or more application profile features.” 07-34-05 AIA Claim 10 recites the limitation " the application " in line 4 . There is insufficient antecedent basis for this limitation in the claim. Claim 12 recites the limitation "the corresponding reserved memory size" in line 5. There is insufficient antecedent basis for this limitation in the claim. It is not clear whether “the corresponding reserved memory size” refers to “a corresponding reserved memory pool storage area of a size” recited in claim 10 or anything else. Claim 17 recites the limitation “the one or more profile features” in line 1. There is insufficient antecedent basis for this limitation in the claim. It appears that “the one or more profile features” should be “the one or more application profile features.” 07-34-05 AIA Claim 19 recites the limitation " the application " in lines 7-8 . There is insufficient antecedent basis for this limitation in the claim. 07-34-05 AIA Claim 20 recites the limitation " the memory size… ” in lines 5 . There is insufficient antecedent basis for this limitation in the claim. The dependent claims 2-9, 11-18 and 20 are also rejected based on virtue of their dependencies to base claims 1, 10 or 19. Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-5, 10-14, 19 and 20 are rejected under AIA 35 U.S.C. 103 as being unpatentable over Martin et al. (US 2022/0035743 A1; IDS submitted on 10/15/2024 ) (hereinafter Martin) in view of Roberts et al. (US 2023/0051103 A1) (hereinafter Roberts). As per claim 1, Martin discloses A system for allocating memory in a memory storage area in a computer system (e.g. Martin: [0001-0002] “Memory management is a form of resource management applied to computer memory. Memory management can be used to provide ways to dynamically allocate portions of memory to programs…one or more global caches are dynamically partitioned and sized into one or more cache partitions based on anticipated I/O workloads. [Fig. 1] [0032] a memory management processor can manage use of the global memory by dynamically partitioning and sizing the global memory. Also see [0038] [0045] [0052] [Fig. 5].) comprising: a hardware processor associated with a memory storing program instructions in a computer system, the hardware processor running the program instructions configuring the processor (e.g. Martin: [Fig. 1] [0032] “a memory management processor can manage use of the global memory” [0037] “the memory management processor can include circuitry and logic configured to manage global memory.” [0054] “systems/methods can be implemented in digital electronic circuitry, in computer hardware, firmware, and/or software, including a computer program product.) to: detect one or more applications running on the computer system, the computer system memory comprising a memory pool storage area for exclusive use by the application (e.g. Martin: [0024] “an application executing on the hosts can perform a read/write operation resulting in one or more data requests to the data storage system.” [0037-0038] “the memory manager monitors I/O streams…,” and “the optimizer can re-allocate amounts of cache assigned…based on the anticipated workloads.” Thus, Martin teaches detecting workload-generating application activity and allocating memory for the corresponding workload. Also see [0040].) ; and for each detected application: run a first machine learned model trained to predict, using time-series data obtained from past memory usage by the detected application, a number of allocation requests for memory cells in the memory pool storage area for the detected application (e.g. Martin: [0041] “Using one or more machine learning techniques, the memory manager can further analyze historical and current IO workloads to anticipate IO workloads that the storage device can expect to receive in future time windows. The manager can use the ML techniques to analyze workloads corresponding to each of the bins…and can define the anticipated workloads based on IO types, IO sizes, track sizes, amongst other parameters and patterns of each parameter (e.g., frequency).” [0042] the manager can use RNN to analyze the historical workloads, and the RNN can anticipate the workloads based on historical IO workload input parameters. Further, the ML techniques can include a time series learning logic to anticipate workloads. [0045] the memory management process may predict that the first anticipated write workload is likely to include, from greatest to lowest in frequency, write IO sizes of 8K, 64K, and 128K. Similarly, the processor may predict that the first anticipated read workload is likely to include, from greatest to lowest in frequency, read IO sizes of 64K, 128K, and 8K. Based on the predicted read/write workloads, the processor allocates cache slot bins to each of the cache segments being sized according to the IO sizes (e.g. track sizes). Also see [0047-0048]. Thus, Martin teaches machine-learned model using time-series historical workload data to predict workload frequency and size behavior.) ; run a second machine learned model trained to predict, using the time-series data obtained from said past memory usage by the detected application, a size of a memory cell to be allocated in the memory pool storage area for each detected application (e.g. Martin: [0045] “the memory management processor may predict that the anticipated write workload is likely to include write IO sizes of 8K, 64K and 128K; and the first anticipated read workload is likely to include read IO sizes of 64K, 128K, and 8K. Based on the predicted workloads, the processor allocates cache slot bins…according to the IO sizes” [0047] discloses models predicting anticipated write/read workload is likely to include write/read IO sizes. [0041-0042] discloses ML techniques/models can include a time series learning logic to anticipate workloads. Martin teaches prediction of memory-allocation granularity/size based on time-series workload data, because the predicted IO sizes are used to size cache slot bins and partitions.) ; and dynamically allocate, for each detected application running on the computer system, a corresponding reserved memory pool storage area of a size based on the predicted number of allocations and the predicted memory cell size (e.g. Martin: [0001-0005] discloses memory management can be used to provide ways to dynamically allocate portions of memory to programs. One or more global caches are dynamically partitioned and sized into cache partitions based on anticipated IO workloads. Also see [0008-0011]. [0038] Based on anticipated workloads, a memory optimizer can dynamically partition caches of the storage device’s global memory and allocate the partitions to anticipated workloads. [0040-0041] the manager can establish cache slot bins based on each cluster’s properties,” [0044-0047] “Based on the predicted read/write workloads, the processor allocates cache clot bins…being sized according to the IO sizes and frequency of red/write workloads. Thus, Martin teaches dynamically partitioning and sizing of memory [allocating] according to predicted workload characteristics including IO frequency and size.) . As discussed above, Martin discloses predicting workload characteristics (e.g. frequency and IO size) using machine learning techniques and historical time series data; and dynamically allocating memory slot bins sized according to predicted workload frequency and predicated IO sizes. Martin does not expressly disclose “ a first machine learned model trained to predict… a number of allocation requests” as a distinct model from the size model; and “ a second machine learned model trained to predict… a size…” as a distinct model from the count model. However, Roberts discloses run a first machine learned model trained to predict, using time-series data obtained from past memory usage by the detected application, a number of allocation requests for memory cells in the memory pool storage area for the detected application; and run a second machine learned model trained to predict… (e.g. Roberts: [0018] discloses using a second machine learning model (an access count machine learning model), such as one trained on historical access count of the memory unit, to predict what an access count of the memory unit (e.g., data access frequency of the memory unit) will be in the future; and a first machine learning model (a schedule machine learning model) to predict when to migrate memory blocks. Also see [0042] [0045-0046] [0049-0050] [0053-0054]. Thus, Roberts clearly discloses using two distinct machine learning models trained on historical data to make two different types of predictions. ). Martin already teaches ML-driven dynamic cache allocation based on predicted IO frequency and IO size, while Roberts teaches a two-model memory-management approach in which two separate machine learning models predict timing and future access count from time-series history. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to apply Robert’s two-model or multiple model framework to Martin so that Marti’s system would use separate machine-learned models for separate prediction targets, such as frequency prediction and size-related prediction, thereby improving modularity, allowing independent training and updating of models, and enabling more specialized prediction behavior for different resource-management decisions. Martin with Roberts in order to provide separate predictive functions into distinct models, thereby improving modularity, allowing independent training/retraining and tuning, and providing a more explicit access-count prediction for memory allocation decisions. Furthermore, combining Robert’s separate-model approach with Martin’s dynamic partitioning system would have been a predictable use of prior art elements according to their established functions, yielding the expected result of more modular, more accurate, and more adaptable memory allocation decisions. As per claim 2, the combination of Martin and Roberts discloses The system as claimed in claim 1 [See rejection to claim 1 above] , wherein said first machine learned model is a time-series prediction model trained with historical data associated with memory pool storage area usage from detected application instances run on the computer system in the past, said historical data comprising time-series data including, a number of allocations and deallocations of memory in the memory pool storage area for each detected application run in the past (e.g. Martin: [0041-0042] using ML techniques, the memory manager can analyze historical and current IO workloads to anticipate workloads that the storage device can expect to receive in future time-windows. The ML techniques can include a time series learning logic to anticipate workloads. [0045] the memory management processor may predict that the first anticipated write workload is likely to include from greatest to lowest in frequency, write IO sizes; and may predict anticipated read workload is likely to include, form greatest to lowest in frequency, read IO sizes. Roberts: [0018] expressly discloses using a second machine learning model (an access count machine learning model), such as one trained on historical access count of the memory unit, to predict what an access count of memory unit (e.g., access frequency) will be in the future. [0019] discloses machine learning model can be trained based on a data access frequency/count of memory unit by a software application over a series of time intervals. Also see [0045] [0048] [0054] [0064-0065] [0078].) ; and said second machine learned model is a time-series prediction model trained with historical data associated with memory pool storage area usage from the past detected application instances, said historical data comprising time-series data including a size of the memory cells to be allocated in the memory pool storage area for each detected application run in the past (e.g. Martin: [0041-0042] using ML techniques, the memory manager can analyze historical and current IO workloads to anticipate workloads that the storage device can expect to receive in future time-windows. The ML techniques can include a time series learning logic to anticipate workloads. [0045] the memory management processor may predict that the first anticipated write workload is likely to include from greatest to lowest in frequency, write IO sizes; and may predict anticipated read workload is likely to include, form greatest to lowest in frequency, read IO sizes. Based on the predicted read/write workloads, the processor allocates cache slot bins to each of the cache segments being sized according to the IO sizes. [0005] [0009-0011] the IO operations can be portioned into one or more bins. The bins can also be sized based on anticipated IO operation sized. Each IO operation of an IO workload can be assigned to partition based on a similarity between a size of each IO operation and configured caching IO operation size. IO workloads of each of the partitions can be anticipated using ML techniques, the anticipated workload can be clustered into groups of IO operations. Cache sizes required to cache each of the groups of IO operations can be determined, global caches can be partitioned and sized into the one or more cache partitions based on the groups of IO operations and determined sizes.) . As per claim 3, the combination of Martin and Roberts discloses The system as claimed in claim 1 [See rejection to claim 1 above] , wherein prior to said dynamically allocating, the hardware processor is further configured (e.g. Martin: [0037-0040] the memory manager gathers and stores memory status data, monitors IO streams, anticipates IO workloads, and the memory optimize dynamically partitions and sizes the global caches based on the anticipated workloads. Thus, analysis and decision-making occur before dynamic allocation.) to: apply a rule or policy to determine, based on the predicted number of allocations and said predicted memory cell size, whether to proceed to dynamically allocate or not allocate the corresponding reserved memory size of memory in the memory pool storage area based on the predicted number of allocations and the predicted memory cell size for the detected application (e.g. Martin: [0019] [0038-0040] [0045] static cache sizing can be inefficient because a cache slot may be underutilized, while embodiments of Martin dynamically partition and size cache memory based on anticipated workloads; the processor groups IO workloads into clusters and determines the cache sizes required for each group, then partitions and sizes the global caches based on the group of IO operations and determined sizes. This strongly implies a rule or policy that decides whether to allocate or not allocate based on predicted workload and size, because Martin already uses workload-based conditions to control whether and how much cache to allocate.) . As per claim 4, the combination of Martin and Roberts discloses The system as claimed in claim 3 [See rejection to claim 3 above] , wherein to dynamically allocate for use by the detected application run on the computer system, the corresponding reserved size of a memory in the memory pool storage area (e.g. Martin: [0038-0040] the memory optimizer 338 dynamically partitions the global caches based on anticipated workloads; the processor partitions the cache segments along dimensions including IO type and IO size; and the processor groups IO workloads into clusters of IO operations based on IO type and track size. These disclosures teach dynamic allocation of memory size for use by an application/program based on workload characteristics.) , the hardware processor is further configured to: apply a rule or policy to determine, based on the predicted number of allocations and said predicted memory cell size, whether to increase an amount of the memory size allocated in the memory pool storage area or to decrease an amount of the memory size allocated in the memory pool storage area for the detected application (e.g. Martin: [0019] [0038] [0040] [0050] [0052] Martin explains that static cache sizing can be inefficient and that embodiments dynamically partition and size cache memory to better match anticipated IO workloads; the memory manager clusters anticipated IO workloads, determines cache sizes required for each group, and partitions and sizes the global caches based on the groups of IO operations and determined sizes. [0047] discloses the optimize repartitions and reallocates cache slot bins based on the predicated read/write workloads. Martin therefore teaches a rule or policy for changing the amount of allocated memory upward/downward as needed, because the system can re-allocate amounts of cache assigned to mirrored and unmirrored segments.) As per claim 5, the combination of Martin and Roberts discloses The system as claimed in claim 1 [See rejection to claim 1 above] , wherein to dynamically allocate a corresponding reserved memory pool storage area for use by the detected application (e.g. Martin: [0001-0002] discloses ways to dynamically allocate portions of memory to programs. One or more global caches are dynamically partitioned and sized into one or more cache partitions on anticipated IO workloads.) , the hardware processor is further configured to: apply a clustering method to said time-series data obtained from past memory usage by the application to predict a distribution of memory pool storage area size values associated with detected application (e.g. Martin: [0040-0042] Using ML techniques, the memory manger can analyze historical IO workloads to anticipate IO workloads that the storage device can expect to receive in one or more future time windows. The manager can use the ML techniques to analyze workload corresponding to each of the bins. The manager can use RNN to analyze the historical and current workloads and anticipates the workloads based on historical workload input parameters. Further, the ML techniques can include a time series learning logic to anticipate the workloads. The manager can use parameters such as IO types and sizes, etc. Roberts: [0018-0019] [0045] [0048] [0054] further discloses using trained machine learning models to predict access counts based on a history of access counts for the memory unit over the plurality of past time intervals. Also see [0064-0065] [0078][claim 1].) . As per claims 10-14, these are method claims having similar limitations as cited in system claims 1-5, respectively. Thus, claims 10-14 are also rejected under the same rationale as cited in the rejection of rejected claims 1-5. As per claims 19 and 20, these are computer readable storage medium claims having similar limitations as cited in system claims 1 and 3, respectively. Thus, claims 19 and 20 are also rejected under the same rationale as cited in the rejection of rejected claims 1 and 3, respectively. Allowable Subject Matter Claims 6-9 and 15-18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, subject to any 112(b) rejections detailed above. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Hiren Patel whose telephone number is (571) 270-3366. The examiner can normally be reached on Monday-Friday 9:30 AM to 6:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) Form at https://www.uspto.gov/patents/uspto-automated- interview-request-air-form. If attempts to reach the above noted Examiner by telephone are unsuccessful, the Examiner’s supervisor, April Y. Blair , can be reached at the following telephone number: (571) 270-1014. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from Patent Center and the Private Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from Patent Center or Private PAIR. Status information for unpublished applications is available through Patent Center or Private PAIR to authorized users only. Should you have questions on access to Patent Center or the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). May 28, 2026 /HIREN P PATEL/Primary Examiner, Art Unit 2196 Application/Control Number: 18/224,710 Page 2 Art Unit: 2196 Application/Control Number: 18/224,710 Page 3 Art Unit: 2196 Application/Control Number: 18/224,710 Page 4 Art Unit: 2196 Application/Control Number: 18/224,710 Page 5 Art Unit: 2196 Application/Control Number: 18/224,710 Page 6 Art Unit: 2196 Application/Control Number: 18/224,710 Page 7 Art Unit: 2196 Application/Control Number: 18/224,710 Page 8 Art Unit: 2196 Application/Control Number: 18/224,710 Page 9 Art Unit: 2196 Application/Control Number: 18/224,710 Page 10 Art Unit: 2196 Application/Control Number: 18/224,710 Page 11 Art Unit: 2196 Application/Control Number: 18/224,710 Page 12 Art Unit: 2196 Application/Control Number: 18/224,710 Page 13 Art Unit: 2196 Application/Control Number: 18/224,710 Page 14 Art Unit: 2196 Application/Control Number: 18/224,710 Page 15 Art Unit: 2196 Application/Control Number: 18/224,710 Page 16 Art Unit: 2196
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