DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 05/13/2026 has been entered.
Election/Restrictions
Applicant’s election without traverse of Group I claims 1-14 in the reply filed on 10/15/2025 is acknowledged.
Response to Amendment
The Amendment filed 05/13/2026 has been entered. Claims 1-20 remain pending in the application. Claims 15-20 are withdrawn.
Response to Arguments
Applicant’s arguments filed 05/13/2026 have been fully considered.
Regarding Applicant’s argument (REMARKS page 15) about the rejections of claims 8 and 11 under 35 U.S.C. 112(b), the rejections have been overcome by the amendment.
Applicant’s argument (REMARKS pages 15-17) about amended Claim 1 is moot based on the new ground rejections.
1) For the argument “it does not disclose forming RF circuitry directly on a glass substrate using flat-panel-style thin-film processing” (see REMARKS page 16 lines 9-10), Examiner disagrees because Kanehachi (‘542) does disclose the claimed language “a circuit layer on a side of the first glass substrate” { Fig.1; Fig.2 items 38 (phase shifter), 44 (transmit antenna), receiving antennas; Fig.6; page 3 lines 10-13 from bottom (radar device 30, first dielectric substrate 31 made of silicon oxide (glass), second dielectric substrate 33 made of silicon oxide (glass), a baseband IC 42 and a RF-IC 43 in which an RF portion is formed) }, “wherein the circuit layer is formed directly on the first glass substrate” {Fig.6 items 31-33; page 3 lines 10-13 from bottom (first dielectric substrate 31 made of silicon oxide (glass), second dielectric substrate 33 made of silicon oxide (glass), one surface side of the silicon substrate 32, a baseband IC 42 and a RF-IC 43 in which an RF portion is formed,); Examiner’s note: Fig.6 item 32 for “the circuit layer”.} . There is no claimed language regarding (see word with underline) “forming RF circuitry directly on a glass substrate”. Hwang (‘428) Fig.1 discloses the “panel process”, which is not clearly indicated in Kanehachi (‘542). Therefore the combination of Kanehachi (‘542) and Hwang (‘428) overcome the claimed limitation “the circuit layer is formed directly on the first glass substrate by a panel process”.
2) For the argument “Yoshida' s metal fine wires are antenna elements, not circuit layer wirings for an RF processing chip. Yoshida does not disclose or suggest forming a circuit layer directly on a glass substrate by a panel process for the purpose of bonding an RF processing chip” (see REMARKS page 17 lines 2-4), Examiner disagrees because Yoshida (‘375) is used to address claimed language “a minimum line width of wirings in the circuit layer is about 5 pm or less” only. Yoshida (‘375) Fig.4 item 35 (conductive fine wires) and col.6 lines 15-16 (conductive fine wires 35) clearly show that fine wires are in circuit layer(s). For further clarification, Examiner added Fig.4 and col.6 lines 15-16 in the rejection in this office action.
3) For the argument “The motivation in Yoshida is to reduce the visibility of antenna wires and achieve low surface electrical resistance, not to reduce RF signal loss attributable to wiring roughness in a radar sensor context.” (see REMARKS page 17 lines 6-8), Examiner does not understand the argument because there is no claimed language regarding “to reduce RF signal loss attributable to wiring roughness in a radar sensor context”.
4) For the argument “The combination of Kanehachi, Hwang, and Yoshida does not teach or suggest the claimed combination of (i) a circuit layer formed directly on a glass substrate by a panel process,” (see REMARKS page 17 lines 9-10), Examiner disagrees because Hwang (‘428) Fig.1 clearly discloses the claimed language “the circuit layer is formed directly on the first glass substrate by a panel process” {Fig.1 items 200 (substrate), 211 (ground plane), 320 (insulating layers), 340 (interconnect layer); [0045] lines 7-9 (the substrate 200 may be, a glass substrate); [0046] lines 9-10 (The dielectric layer 320 may comprise any suitable insulating layers); [0049] lines 1-2 (the interconnect layer 340 comprises a transmission); [0050] line 2 (ground plane 211); Examiner’s note: Fig.1 for “panel process”. }.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 13 are rejected under 35 U.S.C. 103 as being unpatentable over Kanehachi et al. (JP2007228542, hereafter Kanehachi) in view of Hwang et al. (US 2019/0305428, hereafter Hwang), Yoshida et al. (US 10,747,375, hereafter Yoshida), and Yamazaki et al. (US 2011/0084268, hereafter Yamazaki).
Regarding claim 1, Kanehachi (‘542) discloses that A sensor { Title (radar device) }, comprising:
a first glass substrate { Fig.2 item 30 (radar); Fig.6 items 31, 33 (substrate); page 3 lines 12-13 from bottom (radar device 30, first dielectric substrate 31 made of silicon oxide (glass), second dielectric substrate 33 made of silicon oxide (glass)) };
a circuit layer on a side of the first glass substrate { Fig.1; Fig.2 items 38 (phase shifter), 44 (transmit antenna), receiving antennas (see mark below); Fig.6; page 3 lines 10-13 from bottom (radar device 30, first dielectric substrate 31 made of silicon oxide (glass), second dielectric substrate 33 made of silicon oxide (glass), a baseband IC 42 and a RF-IC 43 in which an RF portion is formed) }, wherein the circuit layer is formed directly on the first glass substrate {Fig.6 items 31-33; page 3 lines 10-13 from bottom (first dielectric substrate 31 made of silicon oxide (glass), second dielectric substrate 33 made of silicon oxide (glass), one surface side of the silicon substrate 32, a baseband IC 42 and a RF-IC 43 in which an RF portion is formed,); Examiner’s note: Fig.6 item 32 for “the circuit layer”.} ; and
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a radio frequency processing chip on a side of the circuit layer away from the first glass substrate { Fig.2 items 43 (RF-IC); Fig.6; page 3 10-13 from bottom (radar device 30, first dielectric substrate 31 made of silicon oxide (glass), second dielectric substrate 33 made of silicon oxide (glass), a baseband IC 42 and a RF-IC 43 in which an RF portion is formed)}.
However, Kanehachi (‘542) does not explicitly disclose (see words with underlines) “the circuit layer is formed directly on the first glass substrate by a panel process and includes a plurality of metal layers and a plurality of insulating layers, a minimum line width of wirings in the circuit layer is about 5 μm or less, and a film layer roughness of the wirings in the circuit layer is on an order of tens of nanometers”. In the same field of endeavor, Hwang (‘428) discloses that
the circuit layer is formed directly on the first glass substrate by a panel process and includes a plurality of metal layers and a plurality of insulating layers {Fig.1 items 200 (substrate), 211 (ground plane), 320 (insulating layers), 340 (interconnect layer); [0045] lines 7-9 (the substrate 200 may be, a glass substrate); [0046] lines 9-10 (The dielectric layer 320 may comprise any suitable insulating layers); [0049] lines 1-2 (the interconnect layer 340 comprises a transmission); [0050] line 2 (ground plane 211); Examiner’s note: Fig.1 for “panel process”. Fig.1 items 211, 340 for “a plurality of metal layers”},
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the combination of Kanehachi (‘542) and with the teachings of Hwang (‘428) {use multi-layer circuit board with wire layers and insulation layers} to use multi-layer circuit board with wire layers and insulation layers. Doing so would providing integrated coupling elements in proximity to the feeding terminal so as to significantly improve system performance, as recognized by Hwang (‘428) {[0003] lines 3-5 (microstrip lines on a dielectric substrate backed by a metallic ground plane and fed by a metal via through an aperture on the ground plane); [0042] lines 8-12 (providing the integrated coupling element in proximity to the feeding terminal, performance is significantly improved.)}.
However, Hwang (‘428) does not explicitly disclose (see words with underlines) “a minimum line width of wirings in the circuit layer is about 5 μm or less, and a film layer roughness of the wirings in the circuit layer is on an order of tens of nanometers”. In the same field of endeavor, Yoshida (‘375) discloses that
a minimum line width of wirings in the circuit layer is about 5 μm or less {abstract lines 4-5 (a line width of the metal fine wire is 0.5 to 5.0 µm,); Fig.4 item 35 (conductive fine wires); col.6 lines 15-16 (conductive fine wires 35)},
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the combination of Kanehachi (‘542) and Hwang (‘428) with the teachings of Yoshida (‘375) {use metal fine wire (e.g. 0.5 to 5.0 µm width)} to use metal fine wire (e.g. 0.5 to 5.0 µm width). Doing so would provide electronic components (e.g. antenna) with small size so as to minimize occupation of a volume of an electronic device (e.g. mobile terminal device) with low visibility and satisfactory sensitivity, as recognized by Yoshida (‘375) {col.1 lines 22-24 (an antenna having small occupation of a volume of a mobile terminal device, low visibility, and satisfactory sensitivity)}.
However, Yoshida (‘375) does not explicitly disclose (see words with underlines) “a film layer roughness of the wirings in the circuit layer is on an order of tens of nanometers”. In the same field of endeavor, Yamazaki (‘268) discloses that
a film layer roughness of the wirings in the circuit layer is on an order of tens of nanometers {[0161] lines 1-3 (50-nm-thick titanium nitride film is used as the conductive film for the formation of the source wiring 209)},
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the combination of Kanehachi (‘542), Hwang (‘428), and Yoshida (‘375) with the teachings of Yamazaki (‘268) {use 50-nm-thick film (e.g. titanium nitride film ) as the conductive film for the formation of the source wiring} to use 50-nm-thick film (e.g. titanium nitride film ) as the conductive film for the formation of the source wiring. Doing so would etch a layer of source wiring to form multiple layer of source wirings so as to have an integrated circuit (IC) directly mounted over a substrate over which a light-emitting element is formed by a chip on glass (COG) method, as recognized by Yamazaki (‘268) {Fig.3; [0035] lines 1-3 from bottom (having an integrated circuit (IC) directly mounted over a substrate over which a light-emitting element is formed by a chip on glass (COG) method.); [0160] lines 8-10 (the formation of the source wiring 209 are etched using the mask; thus the source wiring 209 and the source wiring 210 can be formed.)}.
Regarding claim 13, which depends on claim 1, Kanehachi (‘542) does not explicitly disclose that “at least one insulating layer of the plurality of insulating layers is arranged between two adjacent metal layers of the plurality of metal layers; the plurality of insulating layers is made of a material including polyimide; and the plurality of metal layers is made of a material including copper, silver, gold, or a combination thereof”. In the same field of endeavor, Hwang (‘428) discloses that
at least one insulating layer of the plurality of insulating layers is arranged between two adjacent metal layers of the plurality of metal layers { Fig.1 item 320 (see mark below); [0046] lines 9-10 (The dielectric layer 320 may comprise any suitable insulating layers); [0049] lines 1-2 (the interconnect layer 340 comprises a transmission); [0050] line 2 (ground plane 211)};
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the plurality of insulating layers is made of a material including polyimide { [0046] lines 9-11 (The dielectric layer 320 may comprise any suitable insulating layers, such as, polyimide)}; and
the plurality of metal layers is made of a material including copper, silver, gold, or a combination thereof { [0046] lines 11-12 (The interconnect layer 340 may comprise copper)}.
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the combination of Kanehachi (‘542), Yoshida (‘375), and Yamazaki (‘268) with the teachings of Hwang (‘428) {use multi-layer circuit board with wire layers and insulation layers} to use multi-layer circuit board with wire layers and insulation layers. Doing so would providing integrated coupling elements in proximity to the feeding terminal so as to significantly improve system performance, as recognized by Hwang (‘428) {[0003] lines 3-5 (microstrip lines on a dielectric substrate backed by a metallic ground plane and fed by a metal via through an aperture on the ground plane); [0042] lines 8-12 (providing the integrated coupling element in proximity to the feeding terminal, performance is significantly improved.)}.
Claims 2-3, 6-7, 9 are rejected under 35 U.S.C. 103 as being unpatentable over Kanehachi (‘542), Hwang (‘428), Yoshida (‘375), and Yamazaki (‘268) as applied to claim 1 above, and further in view of Jakoby et al. (US 10,141,620, hereafter Jakoby).
Regarding claim 2, which depends on claim 1, Kanehachi (‘542) discloses that the sensor further comprising
a transmitting antenna array, a receiving antenna array, and a phase shifter { Fig.1; Fig.2 items 38 (phase shifter), 44 (transmit antenna), receiving antennas (see mark below); page 3 lines 1-2 from bottom (slots 44, antenna surface); page 4 lines 6-7 (a phase shifter 38)},
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wherein:
the transmitting antenna array, the receiving antenna array, and the phase shifter are all located on the side of the circuit layer { Fig.2 items 38 (phase shifter), 44 (transmit antenna), receiving antennas (see mark above); Fig.6 items 31, 33 (dielectric substrate, glass); page 4 lines 6-7 (a phase shifter 38); page 3 lines 10-13 from bottom (radar device 30, first dielectric substrate 31 made of silicon oxide (glass), second dielectric substrate 33 made of silicon oxide (glass), a baseband IC 42 and a RF-IC 43 in which an RF portion is formed)}.
However, Kanehachi (‘542) does not explicitly disclose (see words with underline) “the transmitting antenna array, the receiving antenna array, and the phase shifter are all located on the side of the circuit layer away from the first glass substrate”. Hwang (‘428), Yoshida (‘375), and Yamazaki (‘268) do not teach the limitations, which Kanehachi (‘542) does not disclose, as well. In the same field of endeavor, Jakoby (‘620) discloses that
the transmitting antenna array, the receiving antenna array, and the phase shifter are all located on the side of the circuit layer away from the first glass substrate {Fig.5 items 9 (antenna) and items 4-5, 7-8 (phase shift device) away from item 3’ (glass substrate); col.2 line 38 (The top glass and the bottom glass); col.4 lines 64-65 (radiating element, phased array antenna); col.5 lines 30-31 (Fig.5, phase shift device); col.6 line 45 (non-tunable dielectric substrate, glass), 47 (liquid crystal material 7), 52-53 (a second layer 3' of a non-tunable dielectric substrate.); col.9 line 6 (9 antenna patch)}.
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the combination of Kanehachi (‘542), Hwang (‘428), Yoshida (‘375), and Yamazaki (‘268) with the teachings of Jakoby (‘620) {use patch antenna and liquid crystal phase shifter device on a side away from a glass layer} to use patch antenna and liquid crystal phase shifter device on a side away from a glass layer. Doing so would provide for a favorable phase shift device with low response time as well as with a high performance so as to comprises both features simultaneously in a compact and planar configuration, as recognized by Jakoby (‘620) {col.1 lines 6-8 (This phase shift is frequency independent (phase shifter) or frequency dependent (variable delay line).); col.2 lines 15-19 (provide for a favorable phase shift device with low response time as well as with a high performance, that comprises both features simultaneously in a compact and planar configuration)}.
Regarding claim 3, which depends on claims 1-2, Kanehachi (‘542) discloses that in the sensor,
;
the transmitting antenna array, the receiving antenna array, and the radio frequency processing chip are all located on the side of the circuit layer { Fig.1; Fig.2 items 43 (RF-IC), 44 (transmit antenna), receiving antennas (see mark below); page 4 lines 6-7 (a phase shifter 38); page 3 10-13 from bottom (radar device 30, first dielectric substrate 31 made of silicon oxide (glass), second dielectric substrate 33 made of silicon oxide (glass), a baseband IC 42 and a RF-IC 43 in which an RF portion is formed)}; and
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the transmitting antenna array and the receiving antenna array are both electrically connected to the phase shifter, and the phase shifter is electrically connected to the radio frequency processing chip { Fig.1; Fig.2 (see connections below) }.
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However, Kanehachi (‘542) does not explicitly disclose (see word with underlines) “the phase shifter includes a second glass substrate corresponding to the first glass substrate, and a liquid crystal layer located between the first glass substrate and the second glass substrate”, “the first glass substrate includes an extension portion, wherein the extension portion does not overlap with the second glass substrate along a direction perpendicular to a plane where the first glass substrate is located”, and “the transmitting antenna array, the receiving antenna array, and the radio frequency processing chip are all located on the side of the circuit layer away from the extension portion”. Hwang (‘428), Yoshida (‘375), and Yamazaki (‘268) do not teach the limitations, which Kanehachi (‘542) does not disclose, as well. In the same field of endeavor, Jakoby (‘620) discloses that
the phase shifter includes a second glass substrate corresponding to the first glass substrate, and a liquid crystal layer located between the first glass substrate and the second glass substrate {Fig.5 items 3, 3’(substrate, glass), 7 (liquid crystal); col.2 line 38 (The top glass and the bottom glass); col.6 line 45 (non-tunable dielectric substrate, glass), 47 (liquid crystal material 7), 52-53 (a second layer 3' of a non-tunable dielectric substrate.)};
the first glass substrate includes an extension portion, wherein the extension portion does not overlap with the second glass substrate along a direction perpendicular to a plane where the first glass substrate is located {Fig.6 item 1};
the transmitting antenna array, the away from the extension portion {Fig.5 items 3, 3’, 7-8, 9; Fig.6 items 1, 3, 3’, 7-8, 9};
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the combination of Kanehachi (‘542), Hwang (‘428), Yoshida (‘375), and Yamazaki (‘268) with the teachings of Jakoby (‘620) {use RF circuit (e.g. patch antenna) and liquid crystal phase shifter device on a side away from a glass layer on an additional layer } to use RF circuit (e.g. patch antenna) and liquid crystal phase shifter device on a side away from a glass layer on an additional layer. Doing so would provide for a favorable phase shift device with low response time as well as with a high performance so as to comprises both features simultaneously in a compact and planar configuration, as recognized by Jakoby (‘620) {col.1 lines 6-8 (This phase shift is frequency independent (phase shifter) or frequency dependent (variable delay line).); col.2 lines 15-19 (provide for a favorable phase shift device with low response time as well as with a high performance, that comprises both features simultaneously in a compact and planar configuration)}.
Regarding claim 6, which depends on claims 1-2, Kanehachi (‘542) discloses that in the sensor,
;
the radio frequency processing chip is located on the side of the circuit layer away from the extension portion { Fig.1; Fig.2 items 43 (RF-IC); page 3 10-13 from bottom (radar device 30, first dielectric substrate 31 made of silicon oxide (glass), a baseband IC 42 and a RF-IC 43 in which an RF portion is formed); Examiner’s note: antennas and RF-IC are away from phase shifter 38. “the extension portion” is a bottom layer in phase shifter, therefore “away from the extension portion”.};
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the phase shifter includes a first phase shifter and a second phase shifter { Fig.1 item 15b; page 3 line 19 (phase shifters 15b)},
wherein the transmitting antenna array is located on a side of the second glass substrate {Fig.2; Examiner’s note: “glass substrate” is on phase shifter side, therefore the circuit layout in Fig.2 is “away from” the glass substrate.}; and
the transmitting antenna array and the receiving antenna array are both electrically connected to the radio frequency processing chip {Fig.2 (see mark below)}.
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However, Kanehachi (‘542) does not explicitly disclose “the phase shifter includes a second glass substrate corresponding to the first glass substrate, and a liquid crystal layer located between the first glass substrate and the second glass substrate”, “the first glass substrate includes an extension portion, wherein the extension portion does not overlap with the second glass substrate along a direction perpendicular to a plane where the first glass substrate is located”, and “the transmitting antenna array is located on a side of the second glass substrate in the first phase shifter away from the first glass substrate”. Hwang (‘428), Yoshida (‘375), and Yamazaki (‘268) do not teach the limitations, which Kanehachi (‘542) does not disclose, as well. In the same field of endeavor, Jakoby (‘620) discloses that
the phase shifter includes a second glass substrate corresponding to the first glass substrate, and a liquid crystal layer located between the first glass substrate and the second glass substrate {Fig.5 items 3, 3’ (substrate), 7 (liquid crystal); col.2 line 38 (The top glass and the bottom glass); col.6 line 45 (non-tunable dielectric substrate 3, glass), 47 (liquid crystal material 7), 52-53 (a second layer 3' of a non-tunable dielectric substrate.)};
the first glass substrate includes an extension portion, wherein the extension portion does not overlap with the second glass substrate along a direction perpendicular to a plane where the first glass substrate is located {Fig.6 item 1};
the transmitting antenna array is located on a side of the second glass substrate in the first phase shifter away from the first glass substrate {Fig.6 item 9; Col.4 lines 31-32 (the phase shift device is combined with a radiating element to transmit the RF signal); col.7 line 39 (antenna patch 9)};
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the combination of Kanehachi (‘542), Hwang (‘428), Yoshida (‘375), and Yamazaki (‘268) with the teachings of Jakoby (‘620) {use RF circuit (e.g. patch antenna) and liquid crystal phase shifter device on a side away from a glass layer on an additional layer } to use RF circuit (e.g. patch antenna) and liquid crystal phase shifter device on a side away from a glass layer on an additional layer. Doing so would provide for a favorable phase shift device with low response time as well as with a high performance so as to comprises both features simultaneously in a compact and planar configuration, as recognized by Jakoby (‘620) {col.1 lines 6-8 (This phase shift is frequency independent (phase shifter) or frequency dependent (variable delay line).); col.2 lines 15-19 (provide for a favorable phase shift device with low response time as well as with a high performance, that comprises both features simultaneously in a compact and planar configuration)}.
Regarding claim 7, which depends on claims 1-2 and 6, Kanehachi (‘542), Hwang (‘428), Yoshida (‘375), and Yamazaki (‘268) do not explicitly disclose that “the phase shifter further includes a first electrode and a second electrode, wherein the first electrode is located on a side of the second glass substrate close to the first glass substrate; the circuit layer includes a first metal layer on the side of the circuit layer away from the first glass substrate; and the second electrode is located in the first metal layer”. In the same field of endeavor, Jakoby (‘620) discloses that the phase shifter further includes
a first electrode and a second electrode { Fig.5 item 2 (signal electrode); col.6 lines 25-26 (signal electrode 2)},
wherein the first electrode is located on a side of the second glass substrate close to the first glass substrate { Fig.5 item 2 (signal electrode) on lower side, 3, 3’ (dielectric substrate, glass); col.6 lines 25-26 (signal electrode 2), 45 (non-tunable dielectric substrate 3, glass), 52-53 (a second layer 3' of a non-tunable dielectric substrate.); Examiner’s note: Fig.5 item 3’ is interpreted as “the first glass substrate”};
the circuit layer includes a first metal layer on the side of the circuit layer away from the first glass substrate { Fig.5 items 8 on upper side (control elements) and 9 (antenna) away from item 3’ (substrate); col.6 lines 45 (non-tunable dielectric substrate 3, glass), 52-53 (a second layer 3' of a non-tunable dielectric substrate.), 61 (control elements 8 transmit the bias voltage); col.9 line 6 (9 antenna patch); Examiner’s note: Fig.5 item 8 on upper side is interpreted as “a first metal layer”. Fig.5 item 9 is interpreted as circuit. }; and
the second electrode is located in the first metal layer { Fig.5 item 2 (signal electrode) at upper part is in item 8}.
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the combination of Kanehachi (‘542), Hwang (‘428), Yoshida (‘375), and Yamazaki (‘268) with the teachings of Jakoby (‘620) {use RF circuit (e.g. patch antenna), electrodes, and liquid crystal phase shifter device on a side away from a glass layer on an additional layer } to use RF circuit (e.g. patch antenna), electrodes, and liquid crystal phase shifter device on a side away from a glass layer on an additional layer. Doing so would provide for a favorable phase shift device with low response time as well as with a high performance so as to comprises both features simultaneously in a compact and planar configuration, as recognized by Jakoby (‘620) {col.1 lines 6-8 (This phase shift is frequency independent (phase shifter) or frequency dependent (variable delay line).); col.2 lines 15-19 (provide for a favorable phase shift device with low response time as well as with a high performance, that comprises both features simultaneously in a compact and planar configuration)}.
Regarding claim 9, which depends on claim 1, Kanehachi (‘542) discloses that the sensor further comprising
a transmitting antenna array, a receiving antenna array, and a phase shifter { Fig.1; Fig.2},
wherein:
;
the phase shifter includes a first phase shifter and a second phase shifter { Fig.1 item 15b; page 3 line 19 (phase shifters 15b)};
the transmitting antenna array is located on a side of the second glass substrate {Fig.2; Examiner’s note: “glass substrate” is on phase shifter side, therefore the circuit layout in Fig.2 is “away from” the glass substrate.}.
However, Kanehachi (‘542) does not explicitly disclose (see words with underline) “the phase shifter includes a second glass substrate corresponding to a third glass substrate, a liquid crystal layer located between the third glass substrate and the second glass substrate, a first electrode, and a second electrode”, “wherein the first electrode is located on a side of the second glass substrate close to the third glass substrate and the second electrode is located on a side of the third glass substrate close to the second glass substrate”, and “the transmitting antenna array is located on a side of the second glass substrate in the first phase shifter away from the third glass substrate”. Hwang (‘428), Yoshida (‘375), and Yamazaki (‘268) do not teach the limitations, which Kanehachi (‘542) does not disclose, as well. In the same field of endeavor, Jakoby (‘620) discloses that
the phase shifter includes a second glass substrate corresponding to a third glass substrate, a liquid crystal layer located between the third glass substrate and the second glass substrate, a first electrode, and a second electrode { Fig.5 items 3, 3’ (dielectric substrate), 2 (signal electrode, upper and lower), 7 (liquid crystal material); col.6 lines 25-26 (signal electrode 2, dielectric substrate 3), 45 (non-tunable dielectric substrate 3, glass), 47 (liquid crystal material 7), 52-53 (a second layer 3' of a non-tunable dielectric substrate.) },
wherein the first electrode is located on a side of the second glass substrate close to the third glass substrate { { Fig.5 item 2 (signal electrode) on lower side, 3, 3’ (dielectric substrate, glass); col.6 lines 25-26 (signal electrode 2), 45 (non-tunable dielectric substrate 3, glass), 52-53 (a second layer 3' of a non-tunable dielectric substrate.); Examiner’s note: Fig.5 item 3’ is interpreted as “the third glass substrate”} } and the second electrode is located on a side of the third glass substrate close to the second glass substrate { Fig.5 item 2 (signal electrode) at upper part};
the transmitting antenna array is located on a side of the second glass substrate in the first phase shifter away from the third glass substrate {Fig.6 item 9; Col.4 lines 31-32 (the phase shift device is combined with a radiating element to transmit the RF signal); col.7 line 39 (antenna patch 9)};
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the combination of Kanehachi (‘542), Hwang (‘428), Yoshida (‘375), and Yamazaki (‘268) with the teachings of Jakoby (‘620) {use RF circuit (e.g. patch antenna) and liquid crystal phase shifter device on a side away from a glass layer } to use RF circuit (e.g. patch antenna) and liquid crystal phase shifter device on a side away from a glass layer. Doing so would provide for a favorable phase shift device with low response time as well as with a high performance so as to comprises both features simultaneously in a compact and planar configuration, as recognized by Jakoby (‘620) {col.1 lines 6-8 (This phase shift is frequency independent (phase shifter) or frequency dependent (variable delay line).); col.2 lines 15-19 (provide for a favorable phase shift device with low response time as well as with a high performance, that comprises both features simultaneously in a compact and planar configuration)}.
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Kanehachi (‘542), Hwang (‘428), Yoshida (‘375), Yamazaki (‘268), and Jakoby (‘620) as applied to claim 9 above, and further in view of Paulotto et al . (US 20200321690, hereafter Paulotto).
Regarding claim 10, which depends on claims 1 and 9, Kanehachi (‘542) discloses that in the sensor,
the third glass substrate in the first phase shifter is provided with a first radio frequency connector electrically connected to the transmitting antenna array { Fig.2 (see mark below)};
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the third glass substrate in the second phase shifter is provided with a second radio frequency connector electrically connected to the receiving antenna array { Fig.2 (see mark above)};
the side of the circuit layer away from the first glass substrate is provided with a third radio frequency connector and a fourth radio frequency connector { Fig.2 (see mark above)}; and
the first radio frequency connector is electrically connected to the third radio frequency connector { Fig.2 (see mark above)}, and
the second radio frequency connector is electrically connected to the fourth radio frequency connector { Fig.2 (see mark above)}.
However, Kanehachi (‘542), Hwang (‘428), Yoshida (‘375), Yamazaki (‘268), and Jakoby (‘620) do not disclose connecting (see words with underline) connecting radio frequency connectors “through a second coaxial cable”. In the same field of endeavor, Paulotto (‘690) discloses that
connecting radio frequency connectors through a second coaxial cable { Fig.4 item 32 (coaxial cable); [0044] lines 4-5 (radio - frequency transmission line path 32 may include a coaxial cable) };
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the combination of Kanehachi (‘542), Hwang (‘428), Yoshida (‘375), Yamazaki (‘268), and Jakoby (‘620) with the teachings of Paulotto (‘690) {use coaxial cable in radio - frequency transmission line path} to use coaxial cable in radio - frequency transmission line path. Doing so would provide a radio - frequency transmission line path coupled between transceivers and the antennas so as to support millimeter and centimeter wave communications, as recognized by Paulotto (‘690) {[0003] lines 5-6 (Radio - frequency transmission line paths are coupled between the wireless transceivers and the antennas); [0005] lines 3-4 (supports millimeter and centimeter wave communications)}.
Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Kanehachi (‘542), Hwang (‘428), Yoshida (‘375), and Yamazaki (‘268) as applied to claim 1 above, and further in view of Toyao et al. (US 7,002,511, hereafter Toyao).
Regarding claim 12, which depends on claim 1, Kanehachi (‘542), Hwang (‘428), Yoshida (‘375) and Yamazaki (‘268) do not explicitly disclose that “a resistance module, a capacitive device module, a power supply module, and an I/O chip, wherein: the resistance module, the capacitive device module, the power supply module, and the I/O chip are all electrically connected to the radio frequency processing chip”. In the same field of endeavor, Toyao (‘511) discloses that the sensor further comprising
a resistance module, a capacitive device module, a power supply module, and an I/O chip {Fig.9},
wherein:
the resistance module, the capacitive device module, the power supply module, and the I/O chip are all electrically connected to the radio frequency processing chip { Fig.2; Fig.9}.
A person of ordinary skill in the art before the effective filing date of the claimed invention would have recognized that applying a known technique (e.g. sensor (e.g. radar) with related electronic elements (resistors, capacitors, I/O, etc.) for sensor functionality) to a known device (e.g. radar) ready for improvement to yield predictable results (e.g. radar performs radar function) and result in an improved system (e.g. radar performs radar function as designed, as recognized by Toyao (‘511) {Fig.2; col.3 lines 23-24 (Fig.2, a millimeter wave (MMW) pulsed radar system in)}).
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Kanehachi (‘542), Hwang (‘428), Yoshida (‘375), and Yamazaki (‘268) as applied to claim 1 above, and further in view of Haziza (US 10,505,280, hereafter Haziza).
Regarding claim 14, which depends on claim 1, Kanehachi (‘542) discloses that in the sensor,
;
the plurality of signal wires is electrically connected to the radio frequency processing chip {Fig.2 (see mark below)};
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.
However, Kanehachi (‘542) does not disclose (see words with underline) “the circuit layer includes a plurality of signal wires and a plurality of ground wires” and “a vertical projection of one of the plurality of signal wires on the first glass substrate is located within a vertical projection of a corresponding one of the plurality of ground wires on the first glass substrate”. In the same field of endeavor, Hwang (‘428) discloses that
the circuit layer includes a plurality of signal wires and a plurality of ground wires { Fig.1 items 211 (ground plane), 340 (interconnect layer); [0049] lines 1-2 (the interconnect layer 340 comprises a transmission); [0050] line 2 (ground plane 211)};
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the combination of Kanehachi (‘542), Yoshida (‘375), and Yamazaki (‘268) with the teachings of Hwang (‘428) {use multi-layer circuit board with wire layers and insulation layers} to use multi-layer circuit board with wire layers and insulation layers. Doing so would providing integrated coupling elements in proximity to the feeding terminal so as to significantly improve system performance, as recognized by Hwang (‘428) {[0003] lines 3-5 (microstrip lines on a dielectric substrate backed by a metallic ground plane and fed by a metal via through an aperture on the ground plane); [0042] lines 8-12 (providing the integrated coupling element in proximity to the feeding terminal, performance is significantly improved.)}.
However, Hwang (‘428) does not explicitly disclose (see words with underline) “a vertical projection of one of the plurality of signal wires on the first glass substrate is located within a vertical projection of a corresponding one of the plurality of ground wires on the first glass substrate”. In the same field of endeavor, Haziza (‘280) discloses that
a vertical projection of one of the plurality of signal wires on the first glass substrate is located within a vertical projection of a corresponding one of the plurality of ground wires on the first glass substrate {Fig.6D}.
A person of ordinary skill in the art before the effective filing date of the claimed invention would have recognized that applying a known technique (e.g. circuit board used in a sensor (e.g. radar) with multiple layers distributed grounding lines and signal lines for sensor functionality) to a known device (e.g. radar) ready for improvement to yield predictable results (e.g. radar performs radar function) and result in an improved system (e.g. radar performs radar function as designed, as recognized by Haziza (‘280) (‘511) {col.2 lines 55-59 ( the variable dielectric layer directly beneath the RF line and that the RF line is activated by an AC voltage through a BiasT, that is to provide a strong impact line as well as two layers for two different corporate feeding networks)}).
Allowable Subject Matter
Claims 4-5 objected to as being dependent upon a rejected base claims 1-3 but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Please see the Office Action filed on 12/02/2025 for details regarding the allowability of the objected claims 4-5 above over the prior art of record.
Claim 8 objected to as being dependent upon a rejected base claims 1-2 and 6-7 but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim 11 objected to as being dependent upon a rejected base claims 1 and 9-10 but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claims 8 and 11, the closest prior art of record is represented by Kanehachi (‘542), Jakoby (‘620), Nishida (US12,170,411, hereafter Nishida), and Garcia et al. (US 9,806,422, hereafter Garcia).
Regarding claim 8, which depends on claims 1-2 and 6-7, Kanehachi (‘542) discloses that the sensor further comprising
a transmitting antenna power amplifier and a low noise amplifier { Fig.1 item 19 (amplifier), 21 (LNA) ; page 3 lines 14-15 (amplifier circuit 19), 22 (the LNA circuit 21)},
wherein:
the transmitting antenna power amplifier and the low noise amplifier are both located on the side of the circuit layer away from the extension portion {Fig.2 item 43 (RF_IC); page 3 line 11 (a RF-IC 43); Examiner’s note: “the extension portion” is on phase shifter, therefore “away from the extension portion”};
the transmitting antenna power amplifier is electrically connected to the transmitting antenna array through a first wiring {Fig.1}, and is electrically connected to the radio frequency processing chip through a second wiring {Fig.1; Fig.2};
the low noise amplifier is electrically connected to the receiving antenna array through a third wiring {Fig.1}, and is electrically connected to the radio frequency processing chip through a fourth wiring {Fig.1; Fig.2};
.
Jakoby (‘620) discloses that
the circuit layer further includes a second metal layer between the first metal layer and the first glass substrates {Fig.5 item 8 at power part between item 8 at upper part and item 3’(substrate, glass); col.6 line 45 (non-tunable dielectric substrate, glass), 47 (liquid crystal material 7), 52-53 (a second layer 3' of a non-tunable dielectric substrate.), 61 (control elements 8 transmit the bias voltage)};
However, Kanehachi (‘542), Jakoby (‘620), Nishida (‘411), and Garcia (‘422), either alone or in combination, do not disclose (see words with underline)
the first wiring and the third wiring are located in the first metal layer; and
the second wiring and the fourth wiring are located in the second metal layer.
Regarding claim 11, which depends on claims 1, and 9-10, similar to claim 8, Kanehachi (‘542), Jakoby (‘620), Nishida (‘411), and Garcia (‘422), either alone or in combination, do not disclose (see words with underline)
the first wiring and the third wiring are located in the first metal layer; and
the second wiring and the fourth wiring are located in the second metal layer.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
JP 6167006 discloses that “a film layer roughness of the wirings in the circuit layer is on an order of tens of nanometers” {page 4 line 1 from bottom (improve the adhesion between); page 5 lines 1-4 (the lower conductor 16 and the dielectric substrate, provide a film such as titanium (Ti), as an adhesion layer (not shown), the Ti or Cr film is preferably about 40 nm)}, which further support the rejection of claim 1.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to YONGHONG LI whose telephone number is (571)272-5946. The examiner can normally be reached 8:30am - 5:00pm.
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/YONGHONG LI/ Examiner, Art Unit 3648
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