DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are:
Additional CMP process condition generator: claims 1, 2, 5 and 12-15
[0010-0011], [0014], [0021-0024], [0078], [00139]
Wafer image acquiring unit: claims 2, 5, 14, and 15
[0011]
Residue Type determining unit: claims 2 and 14
[0011]
Additional CMP process condition output unit: claims 2, 4, and 14
[0011]
Machine learning unit: claims 5, 6, 7, 9, 15, and 16
[0014]
Learning data acquiring unit: claims 7, 9 and 16
[0016]
Model training unit: claims 7, 10, 16 and 17
[0016]
Learning data selecting unit: claim 9
[0018]
Index Unit: claim 11
[0055] and figure 1
Chemical mechanical polishing unit: claims 11-13 and 18
[0021] The chemical mechanical polishing unit includes a polishing platen; a polishing pad which is located on the polishing platen and includes a polishing surface; a slurry supplier which supplies a slurry to the polishing pad; a polishing head which is located above the polishing pad and configured to mount a wafer thereon; and an additional CMP process condition generator which generates an additional chemical mechanical polishing (CMP) process condition according to a type of residue to output the additional CMP process condition to the operation controller when there is a residue on a wafer after the CMP process is performed on the wafer.
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
If applicant is of the opinion that the written description of the specification already implicitly or inherently discloses the corresponding structure, material, or acts and clearly links them to the function so that one of ordinary skill in the art would recognize what structure, material, or acts perform the claimed function, applicant should clarify the record by either:
(a) Amending the written description of the specification such that it expressly recites the corresponding structure, material, or acts for performing the claimed function and clearly links or associates the structure, material, or acts to the claimed function, without introducing any new matter (35 U.S.C. 132(a)); or
(b) Stating on the record what the corresponding structure, material, or acts, which are implicitly or inherently set forth in the written description of the specification, perform the claimed function. For more information, see 37 CFR 1.75(d) and MPEP §§ 608.01(o) and 2181.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-10 and 12-20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter (Additional CMP process condition generator, Wafer image acquiring unit, Residue Type determining unit, Additional CMP process condition output unit, Machine learning unit, Learning data acquiring unit, Model training unit, Learning data selecting unit, all interpreted under 35 USC 112(f) as described above) which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. The applicant has failed to describe the algorithm and adequate structure to functionally operate the process condition generator, described simply as being “[00139] implemented by a computer device 900.”
Claim limitations Additional CMP process condition generator, Wafer image acquiring unit, Residue Type determining unit, Additional CMP process condition output unit, Machine learning unit, Learning data acquiring unit, Model training unit, and Learning data selecting unit invoke 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. However, the written description fails to disclose the corresponding structure, material, or acts for performing the entire claimed function and to clearly link the structure, material, or acts to the function.
Additional CMP process condition generator: Specification recites, “the additional CMP process condition generator includes a wafer image acquiring unit which acquires a wafer macro image captured by a camera after the CMP process is performed on the wafer; and a machine learning unit which constructs a machine learning model by performing the machine learning based on the wafer macro image acquired by the wafer image acquiring unit, digitally converted data from the wafer macro image, and an optimal additional CMP process condition corresponding to each macro image.” The components the generator is comprised of are “units”, which also fail the written description requirements. As presented within the specification, whether these “units” are hardware or software are unclear, and further the algorithm or process by which the process condition generator unit executes the claimed function is not recited.
Wafer image acquiring unit: Specification recites “[0011]: a wafer image acquiring unit configured to acquire a wafer macro image captured by a camera after the CMP process is performed on the wafer…” The unit is simply described as unit with an intended use that is configured to accomplish that intended use. No structure is provided as to what the unit is, whether a piece of hardware or software, and further no algorithm provided as to how it would approach acquiring the data to be used.
Residue Type determining unit: Specification recites “[0011]: a residue type determining unit which determines a type of residue based on the digital data converted by the image converter… [0089] The residue type determining unit 330 identifies a region (position and size) and a thickness (corresponding to a luminance) of the residue from the digital data converted by the image converter 320 to determine the type of residue. For example, the residue type determining unit 330 identifies a region (position and size) of the residue existing on the wafer through a partition in which the converted digital data value is equal to or higher than a predetermined reference value (for example, 4 or higher) and identifies a film thickness of the residue by inquiring a converted value (intensity value) belonging…” No structure is provided as to what the unit is, whether a piece of hardware or software.
Additional CMP process condition output unit: “[0011]:… an additional CMP process condition output unit which determines a wafer which requires an additional CMP process based on the type of residue determined by the residue type determining unit and outputs the additional CMP process condition corresponding to the determined wafer… [0091] The additional CMP process condition output unit 340 outputs the customized CMP process condition for every wafer, with respect to wafers which require the additional CMP process, to the operation controller 14, based on the type (residue region and thickness) of the residue determined by the residue type determining unit 330…” The unit is simply described as unit with an intended use that is configured to accomplish that intended use. No structure is provided as to what the unit is, whether a piece of hardware or software, and further no algorithm provided as to how it would approach acquiring the data to be used. Reciting that the unit “outputs the customized CMP process condition for every wafer…based on the type of the residue determined” doesn’t constitute an algorithm a skilled artisan would be able to adapt in order to properly use the claimed apparatus.
Machine learning unit: “[0014]:… a machine learning unit which constructs a machine learning model by performing the machine learning based on the wafer macro image acquired by the wafer image acquiring unit, digitally converted data from the wafer macro image, and an optimal additional CMP process condition corresponding to each macro image…. [00113] Referring to FIG. 9, the machine learning unit 350 includes learning data acquiring unit 351, a learning data pre-processor 352, a learning data selecting unit 353, a model training unit 354, a model evaluating unit 355, and a model updating unit 356…” No structure is provided as to what the unit is, whether a piece of hardware or software, and further no algorithm provided as to how it would approach acquiring the data to be used.
Further, elements that are sub-units of the “machine learning unit” are also considered to lack a clear written description:
[00131] At least one of the learning data acquiring unit 351, the learning data pre- processor 352, the learning data selecting unit 353, the model training unit 354, the model evaluating unit 355, and the model updating unit 356 of the machine learning unit 350 is manufactured as at least one hardware chip to be mounted in the chemical mechanical polishing apparatus 10. For example, at least one of the learning data acquiring unit 351, the learning data pre-processor 352, the learning data selecting unit 353, the model training unit 354, the model evaluating unit 355, and the model updating unit 356 may be manufactured as an exclusive hardware chip for artificial intelligence (AI) or may be manufactured as a part of the general purpose process (for example, a CPU or an
application processor) or a graphic use only processor (for example, GPU) to be mounted
in the above described chemical mechanical polishing apparatus 10.
With regards to the claimed machine learning unit, learning data acquiring unit, Model training unit learning data selecting unit, as the specification is written, it is unclear how the respective units engage and interact if at least/only one of them is a hardware chip. This further brings into question if each single unit is to be hardware, software, or it can be either, how the system would function given the possible combination of different embodiments.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-10 and 12-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim limitations “Additional CMP process condition generator, Wafer image acquiring unit, Residue Type determining unit, Additional CMP process condition output unit, Machine learning unit, Learning data acquiring unit, Model training unit, and Learning data selecting unit” invokes 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. However, the written description fails to disclose the corresponding structure, material, or acts for performing the entire claimed function and to clearly link the structure, material, or acts to the function. See citations regarding the claimed limitations within the 112(b) rejection set forth.
With regards to the Additional CMP process condition generator, Wafer image acquiring unit, Residue Type determining unit, Additional CMP process condition output unit, Machine learning unit, Learning data acquiring unit, Model training unit, and Learning data selecting unit, mere reference to a general purpose computer with appropriate programming without providing an explanation of the appropriate programming, or simply reciting "software" without providing detail about the means to accomplish a specific software function, would not be an adequate disclosure of the corresponding structure to satisfy the requirements of 35 U.S.C. 112(b) or pre-AIA 35 U.S.C. 112, second paragraph. Aristocrat, 521 F.3d at 1334, 86 USPQ2d at 1239; Finisar, 523 F.3d at 1340-41, 86 USPQ2d at 1623. In addition, merely referencing a specialized computer (e.g., a "bank computer"), some undefined component of a computer system (e.g., "access control manager"), "logic," "code," or elements that are essentially a black box designed to perform the recited function, will not be sufficient because there must be some explanation of how the computer or the computer component performs the claimed function. Blackboard, Inc. v. Desire2Learn, Inc., 574 F.3d 1371, 1383-85, 91 USPQ2d 1481, 1491-93 (Fed. Cir. 2009); Net MoneyIN, Inc. v. VeriSign, Inc., 545 F.3d 1359, 1366-67, 88 USPQ2d 1751, 1756-57 (Fed. Cir. 2008); Ex parte Rodriguez, 92 USPQ2d 1395, 1405-06 (Bd. Pat. App. & Inter. 2009).
Therefore, the claim is indefinite and is rejected under 35 U.S.C. 112(b) or pre-AIA 35 U.S.C. 112, second paragraph.
Applicant may:
(a) Amend the claim so that the claim limitation will no longer be interpreted as a limitation under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph;
(b) Amend the written description of the specification such that it expressly recites what structure, material, or acts perform the entire claimed function, without introducing any new matter (35 U.S.C. 132(a)); or
(c) Amend the written description of the specification such that it clearly links the structure, material, or acts disclosed therein to the function recited in the claim, without introducing any new matter (35 U.S.C. 132(a)).
If applicant is of the opinion that the written description of the specification already implicitly or inherently discloses the corresponding structure, material, or acts and clearly links them to the function so that one of ordinary skill in the art would recognize what structure, material, or acts perform the claimed function, applicant should clarify the record by either:
(a) Amending the written description of the specification such that it expressly recites the corresponding structure, material, or acts for performing the claimed function and clearly links or associates the structure, material, or acts to the claimed function, without introducing any new matter (35 U.S.C. 132(a)); or
(b) Stating on the record what the corresponding structure, material, or acts, which are implicitly or inherently set forth in the written description of the specification, perform the claimed function. For more information, see 37 CFR 1.75(d) and MPEP §§ 608.01(o) and 2181.
Claims 2-4, 6-10, and 14 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
The claims 2 (line 24), 6 (line 1) and 14 (line 6) recite in part: “…to determine a wafer…” As all of these claims are dependent claims, there has been an initial wafer that has been recited in the independent claim from which these depend. As a result, it creates confusion as to whether the wafer “being determined” is a physical, different wafer, or rather a wafer condition as a result to processes that have previously occurred. With a “wafer condition” or “status” (complete, incomplete, dirty, clean, etc) known by the system, then subsequent processes would be determinable. For examination purposes, this limitation is being understood as generally “determine a wafer condition”.
As claims 3-4 depend upon claim 2, and claims 7-10 depend upon claim 6, they are similarly rejected.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-4, 11-14, and 18 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Li (US PG Pub No. 20220314395).
In regards to claim 1, Li discloses
a chemical mechanical polishing apparatus, comprising:
a polishing platen (platen 120, fig. 1b-1c);
a polishing pad (polishing pad 130, fig. 1b-1c) which is located on the polishing platen (platen 120, fig. 1b-1c) and includes
a polishing surface (polishing surface 131, fig. 1b-1c);
a slurry supplier (spray bar 134, fig. 1b-1c; [0029]) configured to supply a slurry to the polishing pad (polishing pad 130, fig. 1b-1c);
[0029] Each polishing station 124 of the polishing apparatus 100 includes a spray bar 134 to dispense polishing fluid, such as abrasive slurry, onto the polishing pad 130 as shown in more detail in FIG. 1B.
a polishing head (carrier head 126, fig. 1b-1c); [0021]) which is located above the polishing pad (polishing pad 130, fig. 1b-1c) and configured to mount a wafer thereon; and
[0021] The polishing apparatus 100 also includes a plurality of carrier heads 126, each of which is configured to carry a substrate. The number of carrier heads can be a number equal to or greater than the number of polishing stations, e.g., four carrier heads or six carrier heads.
an additional CMP process condition generator (method 200, [0007], [0057-0065]) configured to generate an additional chemical mechanical polishing (CMP) process condition according to a type of residue ([0061]: uniform and non/uniform residue; [0003]: dried residues) when there is a residue on a wafer after a CMP process is performed on the wafer.
[0007] In one embodiment, a substrate polishing apparatus includes a surface coated at least in part with a fluorescent material, a light source configured to illuminate the surface, an image sensor configured to image the surface, and a processor coupled to the image sensor and configured to monitor slurry buildup on the surface using data supplied from the image sensor.
[0057] FIG. 2 is a diagram illustrating a method 200 for monitoring slurry buildup. The method 200 may be performed by the controller 190. In one example, the controller 190 includes a non-transitory computer readable medium having instructions stored thereon for performing the method 200.
[0064] At activity 212, cleaning of the surface including the area of interest is scheduled and/or initiated based on the alert. In some embodiments, cleaning is performed while the polishing apparatus 100 remains online. For example…
In regards to claim 2, Li discloses
the chemical mechanical polishing apparatus of claim 1, wherein the additional CMP process condition generator (method 200, [0007], [0057-0065]) includes:
a wafer image acquiring unit ([0048], [0059]) configured to acquire a wafer macro image captured by a camera after the CMP process is performed on the wafer;
[0059] At activity 206, when the area of interest 304 is illuminated, a fluorescent intensity of the area of interest is measured using a sensor, such as image sensor 310. The fluorescent intensity may correspond to an amount of slurry buildup 301 on the area of interest 304. In some embodiments, the sensor may be calibrated to work optimally with a specific type of fluorescent material and lighting being implemented. In some embodiments, sensor measurements may be normalized to a fluorescent intensity of the fluorescent material in a clean state. In the illustrated embodiments with the image sensor 310, measurement of the fluorescent intensity includes capturing an image of the surface using the image sensor 310. In one example, the light source 308 and image sensor 310 are comprised in a camera such as one of the cameras 151-156 shown in FIGS. 1B and 1C. Although an image sensor is depicted in the illustrated embodiments, any suitable fluorescence measurement sensor may be used.
an image converter configured to convert the wafer macro image acquired by the wafer image acquiring unit ([0048], [0059]) into digital data to deduce an intensity value (fluorescent intensity [0061]) for each of a plurality of partitions of the wafer macro image (as the cameras provide the image and are connected to the controller, it would require digitization of the information);
[0048] In order to monitor the buildup of slurry 135 on a surface, the polishing apparatus 100 includes at least one light source for illuminating the surface, at least one sensor for measuring fluorescent intensity of an area of interest on the surface, and a processor for monitoring slurry buildup on the surface…Further, each of the cameras are coupled to and controlled by the controller 190 (FIG. 1A).
[0031] The controller 190 includes a programmable central processing unit (CPU) 192, which is operable with a memory 194 (e.g., non-volatile memory) and support circuits 196. The support circuits 196 are conventionally coupled to the CPU 192 and comprise cache, clock circuits, input/output subsystems, power supplies, and the like, and combinations thereof coupled to the various components of the polishing apparatus 100.
[0032] In some embodiments, the CPU 192 is one of any form of general purpose computer processor used in an industrial setting, such as a programmable logic controller (PLC), for controlling various monitoring system component and sub-processors. The memory 194, coupled to the CPU 192, is non-transitory and is typically one or more of readily available memory such as random access memory (RAM), read only memory (ROM), floppy disk drive, hard disk, or any other form of digital storage, local or remote.
[0061] At activity 208, the fluorescent intensity is compared to a first range. The first range may include a lower limit of fluorescent intensity in the area of interest below which the area of interest is considered in need of cleaning. In other words, measured fluorescent intensity within the first range may be considered “clean,” whereas measured fluorescent intensity outside the first range may be considered “dirty.” For example, the lower limit of the first range may correspond to a threshold level for residue thickness, percent residue coverage, and/or residue non-uniformity in the area of interest.
a residue type determining unit ([0061]: comparing limits of the fluorescent intensity) configured to determine a type ([0061]) of residue based on the digital data converted by the image converter; and
an additional CMP process condition output unit (determining clean or dirty; [0061]; [0063]) configured to determine a wafer
[0061]:…In other words, measured fluorescent intensity within the first range may be considered “clean,” whereas measured fluorescent intensity outside the first range may be considered “dirty.” For example, the lower limit of the first range may correspond to a threshold level for residue thickness, percent residue coverage, and/or residue non-uniformity in the area of interest.
which requires an additional CMP process based on the type of residue determined by the residue type determining unit ([0061]: comparing limits of the fluorescent intensity) and output the additional CMP process condition corresponding to the determined wafer ([0063]).
[0063] At activity 210, an alert is created if the fluorescent intensity is outside the first range or satisfies a threshold condition associated with the first range. The alert may include a user message indicating there is a need for cleaning. The alert may specify a particular surface in need of cleaning, such as the surface corresponding to the area of interest which is identified as being outside the first range. The alert may include a summary screen to show the user one or more ratings representing slurry buildup on different surfaces of the polishing apparatus 100.
In regards to claim 3, Li discloses
the chemical mechanical polishing apparatus of claim 2, wherein the type of residue is determined based on a region of the residue and a thickness of the residue ([0060-0061]).
[0060] In some embodiments, the sensor measurements include data representing fluorescence which is outside the area of interest 304. For example, the image sensor 310 may capture an image of an area 312 which includes the area of interest 304 and regions surrounding the area of interest 314. In such embodiments, data processing is performed in order to select the area of interest 304 before determining the fluorescent intensity. For example, when the captured image includes regions surrounding the area of interest 314, the area of interest 304 may be selected by applying a computer algorithm to the image. In order to provide an actionable indication of slurry buildup, it may be desirable to convert the fluorescent intensity of the area of interest 304 to a number that represents the amount of slurry buildup 301.
[0061] At activity 208, the fluorescent intensity is compared to a first range. The first range may include a lower limit of fluorescent intensity in the area of interest below which the area of interest is considered in need of cleaning. In other words, measured fluorescent intensity within the first range may be considered “clean,” whereas measured fluorescent intensity outside the first range may be considered “dirty.” For example, the lower limit of the first range may correspond to a threshold level for residue thickness, percent residue coverage, and/or residue non-uniformity in the area of interest.
In regards to claim 4, Li discloses
the chemical mechanical polishing apparatus of claim 3, wherein the additional CMP process condition output unit (determining clean or dirty; [0061], [0063]) further includes an intensity-thickness matching table in which the intensity value (fluorescent intensity [0061]) deduced by the image converter and the thickness of the residue ([0060-0061]) match and are stored (as there is a range of values that the fluorescent values are compared to, performed on/by a controller with a CPU ([0031]), a skilled artisan would recognize Li providing a correlation of values in a range between the fluorescent intensity and thickness of the residue).
In regards to claim 11, Li discloses
a chemical mechanical polishing equipment comprising:
a chemical mechanical polishing apparatus (polishing stations 124, fig. 1a-1c) which includes at least one chemical mechanical polishing unit (polishing station 124a) which individually performs a chemical mechanical polishing (CMP) process on a wafer ([0020]);
[0020] FIG. 1A is a plan view of a polishing apparatus 100, such as a chemical mechanical polishing (CMP) tool for processing one or more substrates. The polishing apparatus 100 includes a polishing platform, or base 102 that at least partially supports and houses a plurality of polishing stations 124. For example, the polishing apparatus 100 shown includes four polishing stations 124a, 124b, 124c and 124d. Each polishing station 124 is adapted to polish a substrate that is retained in a carrier head 126.
an index unit (transfer station 122, fig. 1a; [0022]) configured to provide a space in which a cassette (load cups 123, fig. 1a; [0022])
a transport robot (transfer robot 110, fig. 1a) configured to transport the wafer between the chemical mechanical polishing apparatus (polishing stations 124, fig. 1a-1c) and the index unit (transfer station 122, fig. 1a; [0022]);
[0022] The polishing apparatus 100 also includes a transfer station 122 for loading and unloading substrates from the carrier heads 126. The transfer station 122 can include a plurality of load cups 123, e.g., two load cups 123a and 123b, adapted to facilitate transfer of a substrate between the carrier heads 126 and a factory interface (not shown) or other device (not shown) by a transfer robot 110. The load cups 123 generally facilitate transfer between the robot 110 and each of the carrier heads 126.
a cleaning apparatus (ports used for spraying deionized water; [0041]) configured to remove a contaminated material remaining on a wafer after the CMP process is performed on the wafer; and
[0041] Each spray bar 134 delivers polishing fluid, such as slurry 135, to an associated polishing pad 130 to facilitate the substrate polishing operation. In addition, the spray bar 134 can deliver a cleaning fluid, e.g., deionized water, to the polishing pad 130 to rinse polishing byproducts from the polishing surface 131. The spray bar 134 includes an arm 136 having a plurality of fluid dispensing ports (not shown) in a distal end for spraying fluid
an operation controller (controller 190; [0030-0036], [0048], [0057]) configured to generate a control signal according to an additional CMP process condition ([0063]) according to a type of residue when there is a residue on a wafer after the CMP process is performed on the wafer and to transmit the control signal to the chemical mechanical polishing apparatus (polishing stations 124, fig. 1a-1c).
In regards to claim 12, Li discloses
the chemical mechanical polishing equipment of claim 11, wherein the chemical mechanical polishing unit includes:
a polishing platen (platen 120, fig. 1b-1c);
a polishing pad (polishing pad 130, fig. 1b-1c) which is located on the polishing platen (platen 120, fig. 1b-1c) and includes a polishing surface (polishing surface 131, fig. 1b-1c);
a slurry supplier (spray bar 134, fig. 1b-1c; [0029]) configured to supply a slurry to the polishing pad (polishing pad 130, fig. 1b-1c);
a polishing head (carrier head 126, fig. 1b-1c); [0021]) which is located above the polishing pad (polishing pad 130, fig. 1b-1c) and configured to mount a wafer thereon; and
an additional CMP process condition generator (method 200, [0007], [0057-0065]) configured to generate an additional chemical mechanical polishing (CMP) process condition ([0061]) according to a type of residue to output the additional CMP process condition to the operation controller (controller 190; [0030-0036], [0048], [0057]) when there is a residue on a wafer after the CMP process is performed on the wafer.
In regards to claim 13, Li discloses
the chemical mechanical polishing equipment of claim 12, wherein the operation controller (controller 190; [0030-0036], [0048], [0057]) transmits a control signal corresponding to individual CMP process conditions to the chemical mechanical polishing unit ([0030-0031], [0057]).
[0030] A controller 190, such as a programmable computer, is connected to respective motors to independently control the rotation rate of the platen 120 and the carrier heads 126 as described in more detail below. For example, each motor can include an encoder that measures the angular position or rotation rate of the associated drive shaft. Similarly, the controller 190 is connected to an actuator in each carriage 108 to independently control the lateral motion of each carrier head 126. For example, each actuator can include a linear encoder that measures the position of the carriage 108 along the overhead track 128.
[0031] The controller 190 includes a programmable central processing unit (CPU) 192, which is operable with a memory 194 (e.g., non-volatile memory) and support circuits 196. The support circuits 196 are conventionally coupled to the CPU 192 and comprise cache, clock circuits, input/output subsystems, power supplies, and the like, and combinations thereof coupled to the various components of the polishing apparatus 100.
In regards to claim 14, Li discloses
the chemical mechanical polishing equipment of claim 12, wherein the additional CMP process condition generator (method 200, [0007], [0057-0065]) includes:
a wafer image acquiring unit ([0048], [0059]) configured to acquire a wafer macro image captured by a camera after the CMP process is performed on the wafer;
an image converter configured to convert the wafer macro image into digital data to deduce an intensity value (fluorescent intensity [0061]) for each of a plurality of partitions of the wafer macro image;
a residue type determining unit ([0061]: comparing limits of the fluorescent intensity) configured to determine a type of residue based on the digital data converted by the image converter; and
an additional CMP process condition output unit (determining clean or dirty; [0061], [0063]) configured to determine a wafer which requires an additional CMP process based on the type of residue determined by the residue type determining unit ([0061]: comparing limits of the fluorescent intensity) and output the additional CMP process condition corresponding to the determined wafer ([0063]).
In regards to claim 18, Li discloses
a chemical mechanical polishing method which is
a chemical mechanical polishing method performed by a chemical mechanical polishing apparatus (polishing stations 124, fig. 1a-1c) including at least one chemical mechanical polishing unit (polishing station 124a) configured to individually perform a chemical mechanical polishing (CMP) process on a wafer, the method comprising:
acquiring a wafer macro image after the CMP process is performed on a wafer ([0048], [0059]);
determining an additional CMP process condition corresponding to a wafer which requires an additional CMP process (method 200, [0007], [0057-0065]), based on a type of a residue ([0061]) determined from the wafer macro image ([0048], [0059], [0061]);
transmitting a control signal corresponding to the determined additional CMP process condition to the chemical mechanical polishing unit ([0030-0036], [0048], [0057]); and
performing the additional CMP process ([0061], [0063]) on the wafer by the chemical mechanical polishing unit based on the transmitted control signal ([0030-0036], [0048], [0057], .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 5-6 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Li in view of Dhandapani (US PG Pub No. 20210407066).
In regards to claim 5, Li discloses
the chemical mechanical polishing apparatus of claim 1, wherein the additional CMP process condition generator (method 200, [0007], [0057-0065]) includes:
a wafer image acquiring unit ([0048], [0059]) configured to acquire a wafer macro image captured by a camera after the CMP process is performed on the wafer; and
But fails to disclose “a machine learning unit configured to construct a machine learning model by performing the machine learning based on the wafer macro image acquired” by the wafer image acquiring unit ([0048], [0059]), digitally converted data from the wafer macro image, and “an optimal additional CMP process condition corresponding to each macro image.”
Dhandapani discloses a neural network is trained for use in a substrate thickness measurement system by obtaining ground truth thickness measurements of a top layer of a calibration substrate at a plurality of locations, each location at a defined position for a die being fabricated on the substrate. A plurality of color images of the calibration substrate are obtained, each color image corresponding to a region for a die being fabricated on the substrate (abstract).
Li and Dhandapani are considered to be analogous to the claimed invention because they are in the same field of substrate processing involving a slurry, polishing pad, and residue detection imaging.
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Li in view of Dhandapani and provide a neural network with deep learning algorithms in order to detect a thickness of residue on the a substrate, in light of low cost due to increased efficiency: “[0020] … the usage of machine learning can enable measurement of a thickness of a film on a substrate with reduced time. By training a deep neural network using color images of dies from a substrate and associated thickness measurements by other reliable metrology systems, film thicknesses of dies can be measured by applying an input image to the neural network. This system can be used as a high throughput and economical solution, e.g., for low-cost memory applications. Aside from the thickness inferences, this technique can be used to classify levels of residue on the substrate using the image segmentation.”
In regards to claim 6, Li as modified discloses
the chemical mechanical polishing apparatus of claim 5, wherein the machine learning unit applies the macro image of the wafer after the CMP process to the constructed machine learning model to determine a wafer (state/condition) which requires the additional CMP process and generate the additional CMP process condition (Dhandapani [0062], [0079-0080]) corresponding to the determined wafer ([0063]).
[0062] The thickness measurement generated at the output node 326 is fed to a process control module 330. The process control module can adjust, based on the thickness measurements of one or more regions, the process parameters, e.g., carrier head pressure, platen rotation rate, etc. The adjustment can be performed for a polishing process to be performed on the substrate or a subsequent substrate.
[0079] In general, data can be used to control one or more operation parameters of the CMP apparatus. Operational parameters include, for example, platen rotational velocity, substrate rotational velocity, the polishing path of the substrate, the substrate speed across the plate, the pressure exerted on the substrate, slurry composition, slurry flow rate, and temperature at the substrate surface. Operational parameters can be controlled real-time and can be automatically adjusted without the need for further human intervention.
[0080] As used in the instant specification, the term substrate can include, for example, a product substrate (e.g., which includes multiple memory or processor dies), a test substrate, a bare substrate, and a gating substrate. The substrate can be at various stages of integrated circuit fabrication, e.g., the substrate can be a bare wafer, or it can include one or more deposited and/or patterned layers. The term substrate can include circular disks and rectangular sheets.
In regards to claim 15, Li discloses
the chemical mechanical polishing equipment of claim 12, wherein the additional CMP process condition generator (method 200, [0007], [0057-0065]) includes:
a wafer image acquiring unit ([0048], [0059]) configured to acquire a wafer macro image captured by a camera after the CMP process is performed on the wafer; and
“a machine learning unit configured to construct a machine learning model by performing the machine learning based on the wafer macro image acquired” by the wafer image acquiring unit ([0048], [0059]), digitally converted data from the wafer macro image, and “an optimal additional CMP process condition corresponding to each macro image.”
Dhandapani discloses a neural network is trained for use in a substrate thickness measurement system by obtaining ground truth thickness measurements of a top layer of a calibration substrate at a plurality of locations, each location at a defined position for a die being fabricated on the substrate. A plurality of color images of the calibration substrate are obtained, each color image corresponding to a region for a die being fabricated on the substrate (abstract).
Li and Dhandapani are considered to be analogous to the claimed invention because they are in the same field of substrate processing involving a slurry, polishing pad, and residue detection imaging.
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Li in view of Dhandapani and provide a neural network with deep learning algorithms in order to detect a thickness of residue on the a substrate, in light of low cost due to increased efficiency: “[0020] … the usage of machine learning can enable measurement of a thickness of a film on a substrate with reduced time. By training a deep neural network using color images of dies from a substrate and associated thickness measurements by other reliable metrology systems, film thicknesses of dies can be measured by applying an input image to the neural network. This system can be used as a high throughput and economical solution, e.g., for low-cost memory applications. Aside from the thickness inferences, this technique can be used to classify levels of residue on the substrate using the image segmentation.”
Allowable Subject Matter
Claims 7-10 and 16-17 and 19-20 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
In regards to claim 7, Li as modified fails to disclose or render obvious that the machine learning unit includes a model training unit configured to input the “wafer macro image and the residue type” to the machine learning model “to predict an additional CMP process condition”. Li in view of Dhandapani relies on the input of images to convert into a residue type (thickness) value. As the limit is recited, the claim requires both values input for the “prediction” of an “additional” CMP process condition. Dhandapani teaches predicting a thickness, but not a CMP process condition.
Claims 8-10 are dependent upon claim 7, and would be similarly considered allowable.
In regards to claim 16, Li as modified fails to disclose or render obvious that the machine learning unit includes a model training unit configured to input the “wafer macro image and the residue type” to the machine learning model “to predict an additional CMP process condition”. Li in view of Dhandapani relies on the input of images to convert into a residue type (thickness) value. As the limit is recited, the claim requires both values input for the “prediction” of an “additional” CMP process condition. Dhandapani teaches predicting a thickness, but not a CMP process condition.
Claim 17 is dependent upon claim 16, and would be similarly considered allowable.
In regards to claim 19, Li as modified fails to disclose or render obvious that the machine learning unit includes a model training unit configured for “predicting a customized additional CMP process condition with respect to a wafer which requires the additional CMP process by applying the macro image of the wafer to the constructed machine learning model”. Li in view of Dhandapani relies on the input of images to convert into a residue type (thickness) value. Dhandapani teaches predicting a thickness, but not a CMP process condition.
Claim 20 is dependent upon claim 19, and would be similarly considered allowable.
Conclusion
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/JASON KHALIL HAWKINS/Examiner, Art Unit 3723