Prosecution Insights
Last updated: April 19, 2026
Application No. 18/228,462

METHODS AND APPARATUS TO DIFFERENTIALLY UPDATE PROGRAMMABLE CIRCUITRY

Non-Final OA §103
Filed
Jul 31, 2023
Examiner
BOURZIK, BRAHIM
Art Unit
2191
Tech Center
2100 — Computer Architecture & Software
Assignee
Texas Instruments Incorporated
OA Round
3 (Non-Final)
65%
Grant Probability
Favorable
3-4
OA Rounds
3y 7m
To Grant
99%
With Interview

Examiner Intelligence

Grants 65% — above average
65%
Career Allow Rate
245 granted / 376 resolved
+10.2% vs TC avg
Strong +45% interview lift
Without
With
+45.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 7m
Avg Prosecution
34 currently pending
Career history
410
Total Applications
across all art units

Statute-Specific Performance

§101
13.0%
-27.0% vs TC avg
§103
62.8%
+22.8% vs TC avg
§102
4.3%
-35.7% vs TC avg
§112
8.1%
-31.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 376 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claims 1-20 are pending on this application. Claims 1-7, 9-11 and 17-18 are amended. Response to Arguments Applicant’s arguments with respect to claims 1-21 filled 01/14/2026 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. New reference Meller is used for deleting old data that is exclude or discard the old data in the update. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-21 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al US20200233659A1 in view of Meller et al US20050027758 1. As per claim 1, Kim discloses an apparatus comprising: interface circuitry; machine-readable instructions; and programmable circuitry configurable to at least one of instantiate: [0029]”According to various embodiments, components of the electronic device 20 may include a hardware block designed through logic synthesis, a software block including a series of instructions, a processing unit including at least one processor executing a series of instructions, and combinations thereof.”; or execute the machine-readable instructions to: determine a number of memory sectors shift by a number of memory sector an original image based on a length of extra data in an updated image in differential image data: Fig. 4 and [0056] “The values of the ordered_pos field may be identical to the priv_pos field of the second swap block swap block 2. In another example, when the length of the first extra block extra block 1 is about 100 and the length of the second extra block extra block 2 is about 50, the third area may be moved to increase the relative address by 150. This is because a new data of a length of about 100 and a new data of a length of about 50 are respectively added to the first area and the second area, which are arranged ahead of the third area. Thus, a value of the ordered_pos field of a third swap block swap block 3 may be greater than the value of the priv_pos of the third swap block swap block 3 by 150”; the differential image data including the extra data, control data, and differential data: [0040] Referring to FIG. 2, the first delta file 210 may include a header 211, a control block group 212, a difference block group 213, and an extra block group 214”; [0048]“For example, the first unit block 222 may include the first control block ctrl block 1, the first difference block diff block 1, and the first extra block extra block 1, which correspond to the first area among the plurality of update areas. The electronic device 20 may identify the first area of the first version firmware by parsing the first control block ctrl block 1, perform the update by loading the identified first area and performing an XOR operation with the first difference block diff block 1, and perform the update for the first area by adding data of the first extra block extra block 1 behind the first area”; shift the original image by the number of memory sectors to create a swap area, the swap area including the number of memory sectors; Fig. 4 and [0056] “Thus, a value of the ordered_pos field of a third swap block swap block 3 may be greater than the value of the priv_pos of the third swap block swap block 3 by 150. Data in the swap size field may indicate a length of a block to be moved. The length of the block to be moved may correspond to the length of each of the plurality of update areas. For example, the value of the swap size field of the second swap block swap block 2 may indicate the length of the second area.” and construct the updated image based on the differential image data and the original image: [0073] “The electronic device 20 may perform the firmware update for the plurality of update areas by using the plurality of unit blocks (S260). The electronic device 20 may parse the first control block ctrl block 1 and obtain the relative address to which the data of the first difference block diff block 1 among the first version firmware is required to be applied. The electronic device 20 may set the obtained relative address as the start address and apply the data included in the first difference block diff block 1.” But not explicitly: the control data including values indicative of lengths of data in the original image to exclude from the updated image; Meller discloses: the control data including values indicative of lengths of data in the original image to exclude from the updated image: [0078] Reverting now to the update package 201, it is divided into two sections, a commands section 214 and a data section 215. The commands section includes commands, while the data section includes data entries. [0081] As shown, the first command included in the commands section 214 is for deleting five items, that is, deleting five items from the position pointed to by the old pointer 218, thereby deleting block 204”; It would have obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to combine the teachings of cited references. One of ordinary skill in the art before the effective filling date of the claimed invention would have been motivated to incorporate the teachings of Meller into teachings of Kim to declare the new erase block as being merged, updating the sector block management table and freeing erase blocks that stored the current erase block of interest. Furthermore, to increase the relative address value of the third area to prevent conflict and to prevent an error of performing the operation on the added data and the difference block.[Kim-0034]. As per claim 2, the rejection of claim 1 is incorporated and furthermore Kim discloses: a first memory and a second memory, the first memory configurable to store the original image and the differential image data, the second memory configurable to store one or more portions of the updated image: [0036] “The buffer 204 may temporarily store at least some of the delta file or the first version firmware while the electronic device 20 performs the firmware update. For example, the buffer 204 may temporarily store each of unit blocks obtained by partially decompressing the delta file. The first unit block may be temporarily stored, and the firmware update for the first area among the plurality of update areas may be performed by using data of the temporarily stored first unit block. [0037] “The memory 205 may include a nonvolatile memory. For example, the memory 205 may be implemented in a flash memory. The memory 205 may store the firmware. For example, the memory 205 may store the first version firmware before performing the firmware update, and after performing the firmware update, may store the second version firmware”; As per claim 3, the rejection of claim 1 is incorporated and furthermore Kim discloses: wherein the differential image data includes extra data, differential data, and control data: [0040]”Referring to FIG. 2, the first delta file 210 may include a header 211, a control block group 212, a difference block group 213, and an extra block group 214” the control data including a plurality of control blocks, each control block of the plurality of control blocks having first data, second data, and third data, wherein the first data specifies a first number of sequential bytes of the original image and sequential bytes of the differential data, the second data specifies a number of sequential bytes of the extra data, the second data specifies a number: [0046] Referring to Table 2 above, the first through fourth control blocks ctrl block 1 through ctrl block 4 may include information required for the electronic device 20 to perform the update for the plurality of update areas. Data of the diff_length field may indicate the length of the difference block corresponding to the current control block. For example, the first control block ctrl block 1 may indicate a length of a first difference block diff block 1. The first difference block diff block 1 may include data that is changed through the firmware update in the first area among the plurality of update areas. Data of the extra_length field may indicate a length of an extra block corresponding to the current control block. For example, the first control block ctrl block 1 may indicate a length of a first extra block extra block 1. The first extra block extra block 1 may indicate the length of the first extra block extra block 1 that includes data to be added behind the first area. Data of the skip_off field may indicate the relative address of a next update area in the next order. The skip_off field data of the first control block ctrl block 1 may indicate a length for jumping to an absolute address of the second area. See also [0048]. wherein the programmable circuitry is configurable to: determine the first data and the second data of a control block of the control data; generate a first portion of the updated image by XORing a first number of bytes from the differential data with the first number of bytes from the original image, the first number of bytes based on the first data; and generate a second portion of the updated image as a second number of bytes from the extra data, the second number of bytes based on the second data. [0073]“The electronic device 20 may parse the first control block ctrl block 1 and obtain the relative address to which the data of the first difference block diff block 1 among the first version firmware is required to be applied. The electronic device 20 may set the obtained relative address as the start address and apply the data included in the first difference block diff block 1. For example, the electronic device 20 may perform the XOR operation between the data included in the first area and the data included in the first difference block diff block 1 to change a result thereof to the data of the second version firmware. The electronic device 20 may add the data of the first extra block extra block 1 after applying the data included in the first difference block diff block 1 to the first area”; But not explicitly: and the third data specifies a third number of sequential bytes to exclude from the original image. Meller discloses: and the third data specifies a third number of sequential bytes to exclude from [0078] Reverting now to the update package 201, it is divided into two sections, a commands section 214 and a data section 215. The commands section includes commands, while the data section includes data entries. [0081] As shown, the first command included in the commands section 214 is for deleting five items, that is, deleting five items from the position pointed to by the old pointer 218, thereby deleting block 204 It would have obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to combine the teachings of cited references. One of ordinary skill in the art before the effective filling date of the claimed invention would have been motivated to incorporate the teachings of Meller into teachings of Kim to declare the new erase block as being merged, updating the sector block management table and freeing erase blocks that stored the current erase block of interest. Furthermore, to increase the relative address value of the third area to prevent conflict and to prevent an error of performing the operation on the added data and the difference block.[Kim-0034]. As per claim 4, the rejection of claim 3 is incorporated and furthermore Kim discloses: wherein the programmable circuitry is configurable to: determine a length of the first portion of the updated image and the second portion of the updated image; determine if the length is greater than or equal to a sector size, the sector size being a number of bytes in a sector of memory; and write the number of bytes in a sector of memory of the first portion of the updated image and the second portion of the updated image responsive to determining the length is greater than or equal to a length of a sector of memory.: [0034] “For example, when a length of data to be added to a first area of the plurality of update areas is about 100, a relative address value of a second area may be increased by 100. In another example, when a length of data to be added to the second area is about 50, the firmware reposition unit 202 may increase a relative address value of a third area by 150. Since the length of data to be added to the first area is about 100 and the length of data to be added to the second area is about 50, the firmware reposition unit 202 may increase the relative address value of the third area by 150 to prevent a conflict in which an area different from an area to be updated is loaded and data is changed”; As per claim 5, the rejection of claim 1 is incorporated and furthermore Kim does not explicitly disclose: wherein the programmable circuitry is configurable to shift the swap area by clearing a sector of memory of the original image responsive to a determination that pointers to the sector of memory are no longer needed: Meller discloses: wherein the programmable circuitry is configurable to shift the swap area by clearing a sector of memory of the original image responsive to a determination that pointers to the sector of memory are no longer needed: [0081] As shown, the first command included in the commands section 214 is for deleting five items, that is, deleting five items from the position pointed to by the old pointer 218, thereby deleting block 204. The old pointer 218 moves to point to the beginning of block 205, i.e., it points to item 207. Next, the update package includes a command for copying five hundreds items to the current position of the new pointer 219, thereby shifting the block 205 five items backwards, giving rise to block 205'. The old pointer 218 moves to point to item 206, while the new pointer 219 moves to point to the position where item 206' will be positioned in accordance with the example below. It would have obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to combine the teachings of cited references. One of ordinary skill in the art before the effective filling date of the claimed invention would have been motivated to incorporate the teachings of Meller into teachings of Kim to declare the new erase block as being merged, updating the sector block management table and freeing erase blocks that stored the current erase block of interest. Furthermore, to increase the relative address value of the third area to prevent conflict and to prevent an error of performing the operation on the added data and the difference block.[Kim-0034]. As per claim 6, the rejection of claim 1 is incorporated and furthermore Kim discloses: wherein the programmable circuitry is configurable to track the construction of the updated image using a plurality of records, the plurality of records includes a record for each sector of memory of the swap area and the original image, the record to identify one of a first value or a second value: [0056] “For example, in the case of the first area, since there is no data to be newly added ahead of the first area, the relative address may not be changed. Thus, a value of the ordered_pos field of the first swap block swap block 1 may be identical to the value of the priv_pos field. In another example, when the length of the first extra block extra block 1 is about 100, the second area may be moved to increase the relative address by 100. Thus, a value of the ordered_pos field of the second swap block swap block 2 may be greater than the value of the priv_pos of the second swap block swap block 2 by 100.”; As per claim 7, the rejection of claim 1 is incorporated and furthermore Kim discloses: wherein the programmable circuitry is configurable to swap portions of the original image with the updated image based on the construction of portions of the updated image: [0073] “The electronic device 20 may add the data of the first extra block extra block 1 after applying the data included in the first difference block diff block 1 to the first area. Since the second area among the plurality of update areas is moved to the absolute address indicated by the second swap block swap block 2, the data of the first version firmware corresponding to the second area may not be damaged even though the data of the first extra block extra block 1 is added. As per claim 8, the rejection of claim 1 is incorporated and furthermore Kim discloses: wherein the differential image data includes extra data that is to be added to the original image to construct the updated image: [0046] “For example, the first control block ctrl block 1 may indicate a length of a first extra block extra block 1. The first extra block extra block 1 may indicate the length of the first extra block extra block 1 that includes data to be added behind the first area.” and the differential image data includes differential data that represents a difference between bits of the original image and the updated image: [0072] “In other words, the first unit block 222 may include the first control block ctrl block 1 indicating the first area among the plurality of update areas, the first difference block diff block 1 including data on a difference value of the first area among difference values of the first version firmware and the second version firmware, and the first extra block extra block 1 including data to be added behind the first area.’; As per claim 21, the rejection of claim 1 is incorporated and furthermore Kim discloses: create the swap area from memory sectors originally associated with the original image, the swap area including the number of memory sectors and followed by memory sectors storing the original image; and construct the updated image by overwriting the memory sectors of the swap area and adding new memory sectors to the swap area that were originally allocated to the original image: Fig. 4 and [0055]”Referring to Table 3, each of the plurality of swap blocks 401 may include information for moving the plurality of update areas included in the first version firmware. Data of the priv_pos field may indicate a relative address in the old firmware. The relative address may correspond to a physical address value of the memory 205. For example, the priv_pos field of the first swap block swap block 1 may indicate the relative address of the first area. In other words, a value of the priv_pos field of each of the plurality of swap blocks 401 may indicate a start address of the corresponding update area. See also Kim[0056] and Meller fig. 5. Claims 9, 10, 11, 12, 13, 14, 15, 16 are the non-transitory computer readable storage medium claim corresponding to apparatus claims 1, 2, 3, 4, 5, 6, 7, 8 and rejected under the same rational set forth in connection with the rejection of claims 1, 2, 3, 4, 5, 6, 7, 8 above. Claims 17, 18, 19, 20 are the method claims corresponding to apparatus claims 1, 3, 4, 5 and rejected under the same rational set forth in connection with the rejection of claims 1, 3, 4, 5 above. Pertinent arts: US8438558B1: Such modifications may be performed for the purpose of reducing the number of differences between the updated version and the base version for updating a firmware using the difference file. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRAHIM BOURZIK whose telephone number is (571)270-7155. The examiner can normally be reached Monday-Friday (8-4:30). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Wei Y Mui can be reached at 571-270-2738. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /BRAHIM BOURZIK/Examiner, Art Unit 2191 /WEI Y MUI/Supervisory Patent Examiner, Art Unit 2191
Read full office action

Prosecution Timeline

Jul 31, 2023
Application Filed
Jul 29, 2024
Response after Non-Final Action
Sep 04, 2024
Response after Non-Final Action
Apr 16, 2025
Non-Final Rejection — §103
Jul 23, 2025
Response Filed
Oct 08, 2025
Final Rejection — §103
Jan 14, 2026
Examiner Interview Summary
Jan 14, 2026
Applicant Interview (Telephonic)
Jan 14, 2026
Request for Continued Examination
Jan 26, 2026
Response after Non-Final Action
Mar 19, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
65%
Grant Probability
99%
With Interview (+45.0%)
3y 7m
Median Time to Grant
High
PTA Risk
Based on 376 resolved cases by this examiner. Grant probability derived from career allow rate.

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