Prosecution Insights
Last updated: July 17, 2026
Application No. 18/228,479

METHODS AND APPARATUS TO DETECT PARASITIC RESISTANCES USING DRIVER CIRCUITRY

Final Rejection §103§112
Filed
Jul 31, 2023
Priority
Dec 14, 2022 — IN 202241072188
Examiner
PRETLOW, DEMETRIUS R
Art Unit
2858
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Texas Instruments Incorporated
OA Round
2 (Final)
87%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allowance Rate
604 granted / 696 resolved
+18.8% vs TC avg
Moderate +8% lift
Without
With
+7.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
28 currently pending
Career history
735
Total Applications
across all art units

Statute-Specific Performance

§101
3.5%
-36.5% vs TC avg
§103
71.3%
+31.3% vs TC avg
§102
4.7%
-35.3% vs TC avg
§112
18.9%
-21.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 696 resolved cases

Office Action

§103 §112
CTFR 18/228,479 CTFR 78344 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Response to Arguments Applicant’s arguments with respect to claims 8, 9 , 10, 12-15 and 16 have been considered but are moot due to new grounds of rejection. Information Disclosure Statement 06-49 AIA The information disclosure statement filed 7/31/2023 fails to comply with the provisions of 37 CFR 1.97, 1.98 and MPEP § 609 because the Publication number doesn’t correspond to the Applicant’s name. It is unclear which is correct . It has been placed in the application file, but the information referred to therein has not been considered as to the merits. Applicant is advised that the date of any re-submission of any item of information contained in this information disclosure statement or the submission of any missing element(s) will be the date of submission for purposes of determining compliance with the requirements based on the time of filing the statement, including all certification requirements for statements under 37 CFR 1.97(e). See MPEP § 609.05(a). Claim Rejections - 35 USC § 112 07-30-02 AIA The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. 07-34-01 Claims 19 and 20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claims 19 and 20 are dependent on cancelled claim. It is unclear as to what claim claims 19 and 20 should depend from. Claim Rejections - 35 USC § 103 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim s 15 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Liang et al. (US 20160081148) in view of Yamaguchi et al. (US 20150280620) . Regarding claim 15, Liang et al. teach A device comprising: a first switch having a terminal; (100, Fig. 3) and a control terminal (gate Fig. 3); and detection circuitry (120, Fig. 3) including: a second switch (130, Fig. 3) having a first terminal and a second terminal, the first terminal of the second switch coupled to the terminal of the first switch (100, Fig. 3); Examiner’s position is that all of the elements of Fig. 3 are coupled together . current source circuitry (Iref, Fig. 3) having a first terminal and a second terminal, the first terminal of the current source circuitry coupled to the second terminal of the second switch (130, Fig. 3); Examiner’s position is that all of the elements of Fig. 3 are coupled together . and a comparator (105, Fig. 3) having an input and an output, the input of the comparator coupled to the terminal of the first switch (100, Fig. 3) and the first terminal of the second switch (130, Fig. 3). Examiner’s position is that all of the elements of Fig. 3 are coupled together . Liang et al. does not teach controller circuitry having a first terminal, a second terminal, and a third terminal, the first terminal of the controller circuitry coupled to the control terminal of the first switch, the second terminal of the controller circuitry coupled to the control terminal of the second switch, and the third terminal of the controller circuitry coupled to the output of the comparator. Yamaguchi et al. teach controller circuitry (78, Fig. 2) having a first terminal, a second terminal, and a third terminal, (Note controller 78m Fig. 2 has three terminals) the first terminal of the controller circuitry coupled to the control terminal of the first switch (44a, 44b, 44c, 44d, 44e, Fig. 2), the second terminal of the controller circuitry coupled to the control terminal of the second switch, and the third terminal of the controller circuitry coupled to the output of the comparator (106, Fig. 2). Examiner’s position is that all of the elements of Fig. 2 are coupled together . Therefore it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify Liang et al. to include the teaching of controller circuitry having a first terminal, a second terminal, and a third terminal, the first terminal of the controller circuitry coupled to the control terminal of the first switch, the second terminal of the controller circuitry coupled to the control terminal of the second switch, and the third terminal of the controller circuitry coupled to the output of the comparator to provide a motor drive device capable of detecting a power source current value with high precision and suitably avoiding overload using a simple configuration. (Note Yamaguchi et al. par. 0010) Regarding claim 16, Liang et al. teach a light emitting diode (LED) (110, Fig. 3) having a terminal, the terminal of the LED coupled to the terminal of the first switch (100, Fig. 3) , the first terminal of the second switch (130, Fig. 3) and the input of the comparator (105, Fig. 3). Examiner’s position is that all of the elements of Fig. 3 are coupled together . 07-21-aia AIA Claim (s) 8-9 are rejected under 35 U.S.C. 103 as being unpatentable over Johnson et al. (US 20070257623) in view of Shim et al. (WO 2016190523A1, using US 20180143231) further in view of Zhang et al. (US 20190159311) . Regarding claim 8, Johnson et al. teach A system comprising: a power supply terminal (Connection of the current source 204 is interpreted as a terminal), a switch (208, Fig. 2) having a first terminal, a second , and a control terminal (gate; a light emitting diode (LED) (106, Fig. 2) having a first terminal and a second terminal, the first terminal of the LED coupled to the terminal of the switch; (Note Fig. 2. terminals of 106 coupled to switch 208) such that the switch is coupled between the power supply terminal and the LED and Johnson et al. does not teach detection circuitry having a terminal coupled to the second terminal of the LED, the detection circuitry configured to detect a parasitic resistance at the second terminal of the LED; wherein , when the switch is in a nonconducting state, the first terminal is isolated from the power supply. Shim et al. teach detection circuitry (110, Fig. 1) having a terminal coupled to the second terminal of the LED, the detection circuitry configured to detect a parasitic resistance at the second terminal of the LED. (Note that all elements of Fig. 1 ate connected to each other, the Examiner interprets the resistance measurement device is connected to the second terminal of the LED.) Therefore it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify Johnson et al. to include the teaching of a terminal coupled to the second terminal of the LED, the detection circuitry configured to detect a parasitic resistance at the second terminal of the LED to determine the efficiency of the light-emitting diode element itself and determining whether a problem is due to a problem in the circuit of the product in which the light-emitting diode is mounted or a problem in the light-emitting diode element itself. (par. 0004) Zhang et al. teach wherein , when the switch (K2, Fig. 1) is in a nonconducting state, the first terminal is isolated from the power supply. (Note L1 and L2 are isolated from power supply which is suggested by voltage input, Fig. 1) (Note also par. 0081) Therefore it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify Johnson et al. to include the teaching of when the switch is in a nonconducting state, the first terminal is isolated from the power supply to stop providing voltage to the LED. Regarding claim 9, Johnson et al. teach wherein the switch is a first switch (208, Fig. 2), further comprising: a second switch (212, Fig. 2) having a first terminal and a second terminal, the first terminal of the second switch coupled to the second terminal of the LED and the terminal of the detection circuitry; and current source circuitry (204, Fig. 2) having a first terminal and a second terminal, the first terminal of the current source circuitry coupled to the second terminal of the second switch (212, Fig. 2) , the second terminal of the current source circuitry coupled to a common potential (Note ground, Fig. 2). Regarding claim 21, Johnson et al. does not teach wherein the first terminal of the switch, the second terminal of the switch, and the LED are arranged in series with one another. Zhang et al. teach wherein the first terminal of the switch, the second terminal of the switch, (Note k2, Fig. 1) and the LED are arranged in series with one another. (Note L1 or L2) Therefore it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify Johnson et al. to include the teaching of wherein the first terminal of the switch, the second terminal of the switch, and the LED are arranged in series with one another because it would require less connections than parallel connections . 07-21-aia AIA Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Johnson et al. (US 20070257623) in view of Shim et al. (WO 2016190523A1, using equivalent US 20180143231) in view of in view of Zhang et al. (US 20190159311) further in view of Liang et al. (US 20160081148) . Regarding claim 10, Johnson et al. as modified does not teach the detection circuitry including: a second switch having a first terminal and a second terminal, the first terminal of the second switch coupled to the second terminal of the LED; current source circuitry having a terminal coupled to the second terminal of the second switch; and a comparator having an input coupled to the second terminal of the LED and the first terminal of the second switch. Liang et al. teach the detection circuitry (120, Fig. 3) including: a second switch (130, Fig. 3) having a first terminal and a second terminal, the first terminal of the second switch coupled to the second terminal of the LED (110, Fig. 3); current source circuitry(Note Iref, Fig. 3) having a terminal coupled to the second terminal of the second switch (130, Fig. 3); and a comparator (105, Fig. 3) having an input coupled to the second terminal of the LED (110, Fig. 3) and the first terminal of the second switch (130, Fig. 3). Examiner’s position is that all elements are coupled together. Therefore it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify Johnson et al. to include the teaching of detection circuitry including: a second switch having a first terminal and a second terminal, the first terminal of the second switch coupled to the second terminal of the LED; current source circuitry having a terminal coupled to the second terminal of the second switch; and a comparator having an input coupled to the second terminal of the LED and the first terminal of the second switch to detect short fault detection and open fault detection of an LED. (Note Liang et al. par. 0004) 07-21-aia AIA Claim (s) 12 is rejected under 35 U.S.C. 103 as being unpatentable over Johnson et al. (US 20070257623) in view of Shim et al. (WO 2016190523A1, using equivalent US 20180143231) further in view of Zhang et al. (US 20190159311) further in view of Davidovic et al. (US 20160295649) . Johnson et al. teach the instant invention except the following claim limitations. Regarding claim 12, Johnson et al. does not teach the terminal of the detection circuitry is a first terminal and the detection circuitry further has a second terminal, the system further including; controller circuitry having a first terminal and a second terminal, the first terminal of the controller circuitry coupled to the control terminal of the switch, the second terminal of the controller circuitry coupled to the second terminal of the detection circuitry. Shim et al. teach the terminal of the detection circuitry (110, Fig. 1) is a first terminal and the detection circuitry further has a second terminal. (Note connections on top and bottom of 110 which are interpreted as terminals) Therefore it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify Johnson et al. to include the teaching of teach the terminal of the detection circuitry is a first terminal and the detection circuitry further has a second terminal to receive and output data. Davidovic et al. teach controller circuitry (105, Fig. 2) having a first terminal and a second terminal, the first terminal of the controller circuitry coupled to the control terminal of the switch, the second terminal of the controller circuitry coupled to the second terminal of the detection circuitry (Note 145, Fig. 1). Therefore it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify Johnson et al to include the teaching of the controller circuitry having a first terminal and a second terminal, the first terminal of the controller circuitry coupled to the control terminal of the switch, the second terminal of the controller circuitry coupled to the second terminal of the detection circuitry to detect the presence of a resistor. (Note par. 0021) Allowable Subject Matter 12-151-08 AIA 07-43 12-51-08 Claim s 11, 14, 17 -20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Regarding claim 11, detection circuitry is configured to: pull-up the second terminal of the LED; determine a voltage of the second terminal of the LED; and detect the parasitic resistance based on a comparison of the voltage of the second terminal of the LED to a threshold voltage. Regarding claim 14, disable the switch when the detection circuitry detects a parasitic resistance at the second terminal of the LED. Regarding claim 17, wherein the detection circuitry is configured to: pull-up the terminal of the first switch; determine a voltage of the terminal of the first switch; and detect a parasitic resistance based on a comparison of the voltage of the terminal of the first switch to a threshold voltage. Regarding claim 18, wherein the first switch further has a control terminal, the second switch further has a control terminal, the comparator further having an output, further including controller circuitry having a first terminal, a second terminal, and a third terminal, the first terminal of the controller circuitry coupled to the control terminal of the first switch, the second terminal of the controller circuitry coupled to the control terminal of the second switch, the third terminal of the controller circuitry coupled to the output of the comparator. 12-151-07 AIA 07-97 12-51-07 Claim s 1-7 are allowed. Upon conclusion of a comprehensive search of the pertinent prior art, the Office indicates that the claims are allowable. Regarding independent claim 1, patentability exists, at least in part, with the claimed features of: controller circuitry having a first terminal and a second terminal, the first terminal of the controller circuitry coupled to the control terminal of the first switch and the control terminal of the second switch, the second terminal of the controller circuitry coupled to second terminal of the detection circuitry, and the controller circuitry configured to disable the first switch and the second switch responsive to detection of the parasitic resistance as claimed in combination with all other limitations of claim 1. Conclusion 07-40 AIA Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL . See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DEMETRIUS R PRETLOW whose telephone number is (571)272-3441. The examiner can normally be reached M-F, 5:30-1:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lee Rodak can be reached at 571-270-5628. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DEMETRIUS R PRETLOW/Examiner, Art Unit 2858 /LEE E RODAK/Supervisory Patent Examiner, Art Unit 2858 Application/Control Number: 18/228,479 Page 2 Art Unit: 2858 Application/Control Number: 18/228,479 Page 3 Art Unit: 2858 Application/Control Number: 18/228,479 Page 4 Art Unit: 2858 Application/Control Number: 18/228,479 Page 5 Art Unit: 2858 Application/Control Number: 18/228,479 Page 6 Art Unit: 2858 Application/Control Number: 18/228,479 Page 7 Art Unit: 2858 Application/Control Number: 18/228,479 Page 8 Art Unit: 2858 Application/Control Number: 18/228,479 Page 9 Art Unit: 2858 Application/Control Number: 18/228,479 Page 11 Art Unit: 2858
Read full office action

Prosecution Timeline

Jul 31, 2023
Application Filed
Nov 28, 2025
Non-Final Rejection mailed — §103, §112
Feb 27, 2026
Response Filed
Jun 04, 2026
Final Rejection mailed — §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
87%
Grant Probability
95%
With Interview (+7.8%)
2y 5m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 696 resolved cases by this examiner. Grant probability derived from career allowance rate.

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