DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed 3/11/2026 have been fully considered but they are not persuasive.
Applicant argues that “a hole diameter of the connection hole is less than 0.30 mm” is not or rendered obvious by the Kobayashi reference (see specifically page 6, ¶1 of the reply). To this point, Applicant argues “Kobayashi is concerned with sizing the through hole collection, not with achieving the small hold diameters recited in the claims.
Applicant argues the amended limitation “a meltable conductive solder disposed on the pin, wherein the meltable conductive solid is configured to be melted and solidified when the pin is placed in the connection hole- to fasten the pin and the connection hole” is not met by the Kobayashi reference. Note that this section of the claim was amended to remove the alternative “or in the connection hole”
Regarding argument (1), Kobayashi teaches a connection hole with a diameter of less than 1.2 mm, which is an overlapping range. MPEP §2144.05 states: “In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990)” (emphasis added). The MPEP additionally states: "Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.” In the instant cases, the ranges incorporated from the Key reference overlap the claimed ranges are considered to provide a prima facie case of obviousness. (MPEP §2144.05) Further, applicant hasn’t shown criticality of the specific narrower range and failed to show the specific narrower range is critical or amounts to more than optimization within the skill of an ordinary artisan.
Regarding argument 2, the application discloses an apparatus wherein a “meltable conductive solder” (claim 1 lines 6-7) and “a pin connected to the connection hole” (claim 1 line 4) to “fasten the pin and connection hole” (claim 1 line 8) In short, the structure of the claimed invention is a pin connected to the connection hole via a solder that is melted and subsequently solidified. Kobayashi teaches the pin (12 board connection portion) is attached to a connection hole (B1 hole) via solder that is melted and subsequently solidified (B3 solder). At the end of the method taught by Kobayashi, the device has a solder which attaches the pin to the connection hole, therefore the solder must also be disposed on the pin. As this claim is for a device (the apparatus for interface board interconnection) not a method of production, the order in which the solder is applied and connects the pin to the connection hole does not preclude Kobayashi as relevant art in establishing a prima facie case of obviousness.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-3, 7-9, 11-13, and 17-19 are rejected under 35 U.S.C. 103 as being unpatentable over Kobayashi (US 9203201 B2)
Regarding claim 1, Kobayashi teaches an apparatus for interface board interconnection (10 terminal), comprising: a connector (11 connector portion) having a pin (12 board connection portion) disposed on the connector (col 4 lines 20-30); a printed circuit board (B board) having a connection hole (B1 hole) disposed on the PCB (col 4 lines 20-30), wherein the pin is connected to the connection hole (Fig 8); wherein a hole diameter of the connection hole is less than 0.30 mm (col 4 lines 29-30); and a meltable conductive solder (B3 solder) disposed on the pin (Fig 8, the device has a solder which attaches the pin to the connection hole, therefore the solder must also be disposed on the pin.), wherein the meltable conductive solid is configured to be melted and solidified when the pin is placed in the connection hole (col 5 lines 23-39), to fasten the pin and the connection hole. (col 5 lines 23-39)
Kobayashi fails to explicitly teach a range of less than 0.30 mm. However, Kobayashi teaches a range of less than 1.2 mm. MPEP §2144.05 states: “In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990)” and “Generally, differences in concentration or temperature will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such concentration or temperature is critical.” In the instant cases, the ranges incorporated from the Key reference overlap the claimed ranges are considered to provide a prima facie case of obviousness. Further, it would have been obvious to optimize the result of having a secure connection while taking up less space to maximize the space on the PCB. (MPEP §2144.05)
Regarding claim 2, Kobayashi teaches the apparatus according to claim 1, wherein the meltable conductive solder (B3 solder) is a solder paste or a conductive adhesive (col 5 lines 23-39).
Regarding claim 3, Kobayashi teaches the apparatus according to claim 2, wherein the conductive adhesive (B3 solder paste) is a glue material comprising copper, silver, or gold (material is copper, col 3 lines 60-65).
Regarding claim 7, Kobayashi teaches the apparatus according to claim 1, wherein the pin (12 board connection portion) is in a curved structure, a spring structure, or a tapered structure (Fig 8 shows pin is tapered at one end).
Regarding claim 8, Kobayashi teaches the apparatus according to claim 1, wherein the connection hole (B1 hole) is a through hole or a stepped hole (Fig 8 shows B1 hole is a through hole).
Regarding claim 9, Kobayashi teaches the apparatus according to claim 1, wherein a cross section of the pin (12 board connection pin) is in a shape of a circle, an ellipse, a waist drum, a square, a rectangle, or a teardrop (Fig 5, col 4 lines 31-35).
Regarding claim 11, Kobayashi teaches an electronic device, comprising: an interface board interconnection apparatus interconnection (10 terminal), comprising: a connector (11 connector portion) having a pin (12 board connection portion) disposed on the connector (col 4 lines 20-30), a connection hole (B1 hole) disposed on a printed circuit board (PCB) (col 4 lines 20-30), wherein the pin is connected to the connection hole (Fig 8), and a meltable conductive solder (B3 solder) disposed on the pin (Fig 8), wherein a hole diameter of the connection hole is less than 0.30 mm (col 4 lines 29-30); wherein the meltable conductive solid is configured to be melted and solidified when the pin is placed in the connection hole (col 5 lines 23-39), to fasten the pin and the connection hole. (col 5 lines 23-39)
Kobayashi fails to explicitly teach a range of less than 0.30 mm. However, Kobayashi teaches a range of less than 1.2 mm. MPEP §2144.05 states: “In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990)” and “Generally, differences in concentration or temperature will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such concentration or temperature is critical.” In the instant cases, the ranges incorporated from the Key reference overlap the claimed ranges are considered to provide a prima facie case of obviousness. Further, it would have been obvious to optimize the result of having a secure connection while taking up less space to maximize the space on the PCB. (MPEP §2144.05)
Regarding claim 12, Kobayashi teaches the electronic device according to claim 11, wherein the meltable conductive solder (B3 solder) is a solder paste or a conductive adhesive (col 5 lines 23-39).
Regarding claim 13, Kobayashi teaches the electronic device according to claim 12, wherein the conductive adhesive (B3 solder paste) is a glue material comprising copper, silver, or gold (material is copper, col 3 lines 60-65).
Regarding claim 17, Kobayashi teaches electronic device according to claim 11, wherein the pin (12 board connection portion) is in a curved structure, a spring structure, or a tapered structure (Fig 8 shows pin is tapered at one end).
Regarding claim 18, Kobayashi teaches the electronic device according to claim 11, wherein the connection hole (B1 hole) is a through hole or a stepped hole (Fig 8 shows B1 hole is a through hole).
Regarding claim 19, Kobayashi teaches the electronic device according to claim 11, wherein a cross section of the pin (12 board connection pin) is in a shape of a circle, an ellipse, a waist drum, a square, a rectangle, or a teardrop (Fig 5, col 4 lines 31-35).
Claims 4, 6, 14 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Kobayashi in view of Kim et. al (US 9245770 B2) hereafter referred to as Kim.
Regarding claim 4, Kobayashi teaches the apparatus according to claim 2.
Kobayashi fails to teach the solder paste is a low-temperature solder paste, a medium-temperature solder paste, or a high-temperature solder paste. However, Kim teaches the solder paste is a low-temperature solder paste, a medium-temperature solder paste, or a high-temperature solder paste (160 bonding material is a low temperature solder, col 9 line 36-40). Kobayashi and Kim are both in the industry of solder connections in electronic devices therefore it would have been obvious to a person having ordinary skill in the art to modify the teachings of Kobayashi to include the solder paste of Kim in order to function as a temporary bond (col 9 line 45-50).
Regarding claim 6, Kobayashi teaches the apparatus according to claim 1.
Kobayashi fails to teach the meltable conductive solder is melted at a low temperature, a medium temperature, or a high temperature. However, Kim teaches the meltable conductive solder is melted at a low temperature, a medium temperature, or a high temperature (160 bonding material is a low temperature solder, col 9 line 36-40). Kobayashi and Kim are both in the industry of solder connections in electronic devices therefore it would have been obvious to a person having ordinary skill in the art to modify the teachings of Kobayashi to include the solder of Kim in order to function as a temporary bond (col 9 line 45-50).
Regarding claim 14, Kobayashi teaches the electronic device according to claim 12,
Kobayashi fails to teach the solder paste is a low-temperature solder paste, a medium-temperature solder paste, or a high-temperature solder paste. However, Kim teaches the solder paste is a low-temperature solder paste, a medium-temperature solder paste, or a high-temperature solder paste (160 bonding material is a low temperature solder, col 9 line 36-40). Kobayashi and Kim are both in the industry of solder connections in electronic devices therefore it would have been obvious to a person having ordinary skill in the art to modify the teachings of Kobayashi to include the solder paste of Kim in order to function as a temporary bond (col 9 line 45-50).
Regarding claim 16, Kobayashi teaches the electronic device according to claim 11.
Kobayashi fails to teach the meltable conductive solder is melted at a low temperature, a medium temperature, or a high temperature. However, Kim teaches the meltable conductive solder is melted at a low temperature, a medium temperature, or a high temperature (160 bonding material is a low temperature solder, col 9 line 36-40). Kobayashi and Kim are both in the industry of solder connections in electronic devices therefore it would have been obvious to a person having ordinary skill in the art to modify the teachings of Kobayashi to include the solder of Kim in order to function as a temporary bond (col 9 line 45-50).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/ALLEN L PARKER/Supervisory Patent Examiner, Art Unit 2841
/E.S./ Examiner, Art Unit 2841
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