DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
This is in response to applicant’s amendment/response filed on 06/09/2026, which has been entered and made of record. Claims 1 and 9 have been amended. No Claim has been cancelled. No Claim has been added. Claims 1-16 are pending in the application.
Response to Arguments
Applicant’s arguments (Remarks, p. 7-11) with respect to the independent claims 1, 9, and the dependent claims have been considered but are moot because the arguments do not apply to any of the references being used in the current rejection.
Applicant’s arguments directed to amended limitation have been addressed in the detail rejection below with new reference by Ansari et al.
The arguments regarding dependent claims for the virtue of their dependency are moot because the independent claims are not allowable.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-2, 5-6, 9-10, and 13-14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Xiao (WO 2021259249 A1), in view of Ansari et al. (US 20190325844 A1).
Regarding Claim 9, Xiao discloses A display device, signally connected to a source (ABST reciting “a data display processing method and apparatus”. Fig. 6 showing a structural diagram of an electronic device, a computer device), the display device comprising:
an image processor, configured to store a current image frame provided by the source in a memory when receiving a notification signal from the source to switch a display format; (Fig. 5 sowing processor and memory. ¶73 reciting “The computer device may be a terminal, and its internal structure diagram may be as shown in FIG5 . The computer device includes a processor, a memory, a communication interface, a display screen and an input device connected via a system bus.” Fig. 2, step 202: “Obtain a resolution switching request” (¶19). Further, ¶22 reciting “The terminal calls a preset thread according to the resolution switching request. . . The frame buffer corresponding to the display device is adjusted through a preset thread. . . A framebuffer is a two-dimensional array of pixels located in kernel space. Each storage unit in the frame buffer may correspond to a pixel on the screen of the display device, and the data to be displayed in the entire frame buffer may correspond to a frame of image, i.e., a screen picture displayed on the display device. The frame buffer is used to store data to be displayed and provide display data to the display device. The current display area may be a display ratio of the original data to be displayed corresponding to the area where the displayed data is located.”) and
a panel module (Fig. 5 showing a display. ¶73 reciting “The computer device may be a terminal, and its internal structure diagram may be as shown in FIG5 . The computer device includes . . ., a display screen”), electrically connected to the image processor, wherein the image processor provides the current image frame to the panel module, so that the panel module displays the current image frame; and
the image processor continuously provides the current image to the panel module for display simultaneously until the image processor receives a new image frame provided and transmit the new image frame to the panel module. (Fig. 5. ¶22 disclosing the current image frame is displayed on the screen via a frame buffer, and reciting “The terminal calls a preset thread according to the resolution switching request. . . A framebuffer is a two-dimensional array of pixels located in kernel space. Each storage unit in the frame buffer may correspond to a pixel on the screen of the display device, and the data to be displayed in the entire frame buffer may correspond to a frame of image, i.e., a screen picture displayed on the display device. The frame buffer is used to store data to be displayed and provide display data to the display device. The current display area may be a display ratio of the original data to be displayed corresponding to the area where the displayed data is located.”)
However, Xiao does not explicitly disclose the image processor is re-handshaking with the source and the panel module and the image processor continuously provides the current image from the memory to the panel module for display simultaneously until the image processor receives a new image frame provided by the source and transmit the new image frame to the panel module, so that the panel module displays the new image frame instead of the current image frame, wherein the image processor maintains display of the current image frame without interruption until the new image frame becomes available for display.
Ansari teaches “systems and methods of maintaining source device to sink device synchronization in systems in which the source device enters a Panel Self-Refresh (PSR/PSR2) mode and the sink device enables adaptive synchronization with the source device. . . synchronization between the source device and the sink device may be interrupted upon the source device entering the PSR/PSR2 operating mode and may be re-established upon the source device exiting the PSR/PSR2 operating mode.” (ABST) As shown in Fig. 1, the control circuitry 160 having instructions 162 communicatively coupled display device 152 (¶20). Further, Ansari recites “Where the display image data in consecutive frames 132 remains unchanged or minimally changed, the graphics circuitry 112 may place the system 100 in a PSR/PSR2 operational mode that: stores image data carried by a current frame 132A in the frame buffer 172 of the sink memory circuitry 170 and replays the display image stored in the frame buffer 172 on the display device 152 until the graphics circuitry 112 exits the PSR/PSR2 operating mode.” (¶23). Furthermore, ¶91 recites “synchronization between the source device and the sink device may be interrupted upon the source device entering the PSR/PSR2 operating mode and may be re-established upon the source device exiting the PSR/PSR2 operating mode.”
It would have been obvious to one with ordinary skill, before the effective filing date of the claimed invention, to combine the teachings from Xiao and Ansari and to obtain image data from a frame buffer and maintains displaying the current frame until a new image available (taught by Ansari). The suggestions/motivations would have been to “reduce power consumption of the device.” (¶2), and to apply a known technique to a known device (method, or product) ready for improvement to yield predictable results.
Regarding Claim 10, Xiao in view of Ansari discloses The display device according to claim 9,
wherein the switching of the display format comprises switching of display timing, version switching of DP interface, version switching of HDMI interface, switching from HDMI 2.1 TMDS mode to HDMI 2.1 FRL mode, switching from DP HBR2 to HBR3, on/off switching of Freesync or on/off switching of HDR.
(Xiao discloses to switch a display format (e.g. display resolution). The examples of switching display format disclosed in this claim are well known in that art, which would have switched display resolution.)
Regarding Claim 13, Xiao in view of Ansari discloses The display device according to claim 9, wherein the switching of the display format is realized through an application program of an operating system or an on-screen display (OSD) menu of the display device in the source. (Xiao, Fig. 2 showing a method of switching of display resolution. ¶18-25. Further, ¶72 reciting “The specific definition of the data display and processing device can be found in the above definition of the data display and processing method, which will not be repeated here. Each module in the above data display processing device can be fully or partially implemented by software, hardware or a combination thereof. The above modules can be embedded in or independent of the processor in the computer device in the form of hardware, or can be stored in the memory of the computer device in the form of software, so that the processor can call and execute the operations corresponding to the above modules.”)
Regarding Claim 14, Xiao in view of Ansari discloses The display device according to claim 13, wherein completion of the switching of the display format is confirmed through the operating system or the display device. (Xiao, ¶23-25 disclosing a new image frame (with a second resolution) is transmitted to the panel module and reciting “After the resolution switching is completed, the adjusted display data is displayed on the display device after the resolution switching.” (¶25) In other words, the switching of display resolution is confirmed by the display device.)
Claim 1, has similar limitations as of Claim(s) 9, therefore it is rejected under the same rationale as Claim(s) 9.
Claim 2, has similar limitations as of Claim(s) 10, therefore it is rejected under the same rationale as Claim(s) 10.
Claim 5, has similar limitations as of Claim(s) 13, therefore it is rejected under the same rationale as Claim(s) 13.
Claim 6, has similar limitations as of Claim(s) 14, therefore it is rejected under the same rationale as Claim(s) 14.
Claim(s) 3, 7-8, 11, and 15-16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Xiao in view of Ansari, and further in view of Weng et al. (TW 201016002 A)
Regarding Claim 11, Xiao in view of Ansari discloses The display device according to claim 9.
However, Xiao in view of Ansari does not explicitly disclose wherein the panel module further comprises a timing controller, and the panel module handshakes with the image processor through the timing controller.
Weng teaches a timing controller 290 shown in Figs. 2A and 2B. Further, ¶18 recites “The clock controller 290 is coupled to the scaler 270, and outputs a data signal Data to the source driving unit 220 according to the digital image output signal, so that the source driving unit 220 drives the panel 210 according to the data signal Data.”
It would have been obvious to one with ordinary skill, before the effective filing date of the claimed invention, to modify the device (taught by Xiao in view of Ansari) to include a timing controller that outputs the image signal from the processor to the display panel (taught by Weng). The suggestions/motivations would have been for a multi-interface image signal processing system with “small size and low cost” (¶6), and to apply a known technique to a known device (method, or product) ready for improvement to yield predictable results.
Regarding Claim 15, Xiao in view of Ansari and Weng discloses The display device according to claim 9, wherein the memory is built in the image processor. (Weng, ¶12 reciting “122 The multi-interface image signal processing system 240 is substantially packaged in a single chip, which includes a data input processing unit 250, a scaler 270, a line buffer 280, and a timing controller 290. The data input processing unit 250 includes an analog to digital converter (ADC) 252 , a decoder 254 , and a switching device 260 .” The suggestions/motivations would have been the same as that of Claim 11 rejections.)
Regarding Claim 16, Xiao in view of Ansari and Weng discloses The display device according to claim 9, wherein the image processor is a scaler IC. (Weng, ¶12 reciting “122 The multi-interface image signal processing system 240 is substantially packaged in a single chip, which includes a data input processing unit 250, a scaler 270, a line buffer 280, and a timing controller 290. The data input processing unit 250 includes an analog to digital converter (ADC) 252 , a decoder 254 , and a switching device 260 .” The suggestions/motivations would have been the same as that of Claim 11 rejections.)
Claim 3, has similar limitations as of Claim(s) 11, therefore it is rejected under the same rationale as Claim(s) 11.
Claim 7, has similar limitations as of Claim(s) 15, therefore it is rejected under the same rationale as Claim(s) 15.
Claim 8, has similar limitations as of Claim(s) 16, therefore it is rejected under the same rationale as Claim(s) 16.
Claim(s) 4 and 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Xiao in view of Ansari, and further in view of Verbeure et al. (US 20150109286 A1)
Regarding Claim 12, Xiao in view of Ansari discloses The display device according to claim 9.
Xiao in view of Ansari does not explicitly disclose wherein the panel module further comprises a backlight module, and when the panel module sequentially displays the current image frame and the new image frame, the panel module does not turn off the backlight module.
Verbeure teaches a display system (ABST). More specifically, ¶26 teaches a constant illumination with the backlight staying on, and recites “a constant illumination is provided by the backlight for each of the image frames, during the first mode of operation.” Further, ¶99 recites “when a new frame was expected at the location of the dashed arrow, but didn't arrive, the display logic decided to disable the low motion blur mode and switch to the variable refresh rate with constant backlight mode immediately”. In other words, ¶99 and Fig. 9 teach a constant backlight mode between image frames.
It would have been obvious to one with ordinary skill, before the effective filing date of the claimed invention, to modify the device (taught by Xiao in view of Ansari) to use a constant backlight mode between image frames (taught by Verbeure). The suggestions/motivations would have been “for error compensation when operating a display with a variable refresh rate and flashing backlight” (¶98), and to apply a known technique to a known device (method, or product) ready for improvement to yield predictable results.
Claim 4, has similar limitations as of Claim(s) 12, therefore it is rejected under the same rationale as Claim(s) 12.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to YI WANG whose telephone number is (571)272-6022. The examiner can normally be reached 9am - 5pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jason Chan can be reached at (571)272-3022. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/YI WANG/Primary Examiner, Art Unit 2619
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