DETAILED ACTION
This Office Action is in response to the application filed on 02 August 2023.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 4-6, and 10 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Shin et al. (US 2021/0257499 A1; hereinafter Shin).
In regards to claim 1, Shin teaches a semiconductor device comprising:
an active pattern (e.g. fig. 3) including a lower pattern (105) [0019] and a plurality of sheet patterns (124) [0019], wherein the lower pattern extends in a first direction (2nd direction) ([0018], [0021]), and the plurality of sheet patterns are spaced apart from the lower pattern in a second direction (3rd direction) ([0018], [0021]) crossing the first direction;
a gate structure (330) disposed on the lower pattern and including a gate electrode (320) [0027], a gate insulating film (300) [0027] and a gate spacer (290) [0027]; and
a source/drain pattern (220) [0019] disposed on the lower pattern, and connected to each of the plurality of sheet patterns (fig. 3),
wherein the plurality of sheet patterns include a first sheet pattern (annotated fig. 3: middle instance of (124)) and a second sheet pattern (annotated fig. 3: e.g. bottom instance of (124)) adjacent to each other in the second direction (the middle and bottom instance of (124) do not have intervening instances of (124) between each other in the 3rd direction),
the second sheet pattern is disposed between the first sheet pattern and the lower pattern (e.g. fig. 3: the bottom instance of (124) is between the middle instance of (124) and (105)), each of the first sheet pattern and the second sheet pattern includes an upper surface and a bottom surface opposite to each other in the second direction (annotated fig. 3),
the bottom surface of the first sheet pattern faces the upper surface of the second sheet pattern (annotated fig. 3),
a first upper width, in the first direction, of the upper surface of the first sheet pattern is greater than a first lower width, in the first direction, of the bottom surface of the first sheet pattern (annotated fig. 3), and
a second upper width, in the first direction, of the upper surface of the second sheet pattern is smaller than a second lower width, in the first direction, of the bottom surface of the second sheet pattern (annotated fig. 3).
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Annotated Fig. 3
In regards to claim 4, Shin teaches the limitations discussed above in addressing claim 1. Shin further teaches the limitations wherein a point at which the source/drain pattern has a maximum width in the first direction is positioned between the bottom surface of the first sheet pattern and the upper surface of the second sheet pattern (second annotated fig. 3: e.g. the point where the upper source/drain meets the lower source/drain).
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Second Annotated Fig. 3
In regards to claim 5, Shin teaches the limitations discussed above in addressing claim 1. Shin further teaches the limitations wherein the plurality of sheet patterns further includes a third sheet pattern (fig. 3: uppermost (124)) disposed on the first sheet pattern (e.g. bottommost (124)), wherein the third sheet pattern is disposed at as uppermost sheet pattern among the plurality of sheet patterns,
a bottom surface of the third sheet pattern faces the lower pattern (fig. 3: the bottom surface of the uppermost (124) faces (105)),
a third upper width, in the first direction, of an upper surface of the third sheet pattern is greater than a third lower width, in the first direction, of the bottom surface of the third sheet pattern (fig. 3: e.g. the uppermost (124) is wider at the top than at the bottom).
In regards to claim 6, Shin teaches the limitations discussed above in addressing claim 1. Shin further teaches the limitations wherein the plurality of sheet patterns further includes a third sheet pattern (second annotated fig. 3: e.g. multiple sheet patterns (124)) disposed between the lower pattern (105) and the second sheet pattern, wherein a bottom surface of the third sheet pattern faces the lower pattern (second annotated fig. 3: e.g. multiple sheet patterns (124)),
wherein a third upper width of an upper surface, in the first direction, of an upper surface of the third sheet pattern is smaller than a third lower width, in the first direction, of the bottom surface of the third sheet pattern (second annotated fig. 3: e.g. multiple sheet patterns (124)).
In regards to claim 10, Shin teaches the limitations discussed above in addressing claim 1. Shin further teaches the limitations wherein the gate structure includes an inner gate structure disposed between the first sheet pattern and the second sheet pattern, and the inner gate structure includes the gate electrode and the gate insulating film, and wherein the source/drain pattern contacts the gate insulating film of the inner gate structure (second annotated fig. 3).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 2, 3, and 7-9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shin as respectively applied to claims 1 and 6 above.
In regards to claim 2, Shin teaches the limitations discussed above in addressing claim 1. Shin appears to be silent as to the limitation wherein the first sheet pattern is disposed as an uppermost sheet pattern among the plurality of sheet patterns; however, Shin teaches the limitations of multiple arrangement of sheet patterns (figs. 3-39) and absent persuasive evidence, it would have been obvious to one having ordinary skill in the art at the time the application at hand was filed to find that the configuration of an element is a matter of choice. In re Dailey, 357 F. 2d 669, 149 USPQ 47 (CCPA 1966).
In regards to claim 3, Shin teaches the limitations discussed above in addressing claim 1. Shin appears to be silent as to the limitation wherein a difference between the first upper width and the first lower width is greater than a difference between the second lower width and the second upper width; however, Shin teaches the limitations of multiple arrangement of sheet patterns (figs. 3-39) and absent persuasive evidence, it would have been obvious to one having ordinary skill in the art at the time the application at hand was filed to find that the configuration of an element is a matter of choice. In re Dailey, 357 F. 2d 669, 149 USPQ 47 (CCPA 1966).
In regards to claim 7, Shin teaches the limitations discussed above in addressing claim 1. Shin further teaches the limitations wherein the third sheet pattern (second annotated fig. 3: e.g. multiple sheet patterns (124)) is disposed as a bottommost sheet pattern among the plurality of sheet patterns, the gate spacer (290) includes an inner sidewall, which faces the gate electrode (330), and an outer sidewall, which is opposite to the inner sidewall of the gate spacer (second annotated fig. 3), and
a gate spacer extension line extending from the outer sidewall of the gate spacer in the second direction does not meet the third sheet pattern (second annotated fig. 3).
In regards to claim 8, Shin teaches the limitations discussed above in addressing claim 1. Shin further teaches the limitations wherein the third sheet pattern (second annotated fig. 3: e.g. multiple sheet patterns (124)) is disposed as a bottommost sheet pattern among the plurality of sheet patterns, the gate spacer (290) includes an inner sidewall, which faces the gate electrode (330), and an outer sidewall, which is opposite to the inner sidewall of the gate spacer, and
a gate spacer extension line extending from the outer sidewall of the gate spacer in the second direction meets the third sheet pattern (second annotated fig. 3).
In regards to claim 9, Shin teaches the limitations discussed above in addressing claim 1. Shin further teaches the limitations wherein the third sheet pattern (second annotated fig. 3: plurality of (124)) is adjacent to the second sheet pattern, the gate structure includes an inner gate structure (second annotated fig. 3) disposed between the second sheet pattern and the third sheet pattern, and the inner gate structure includes the gate electrode (330) and the gate insulating film (300),
the inner gate structure includes an upper surface in contact with the bottom surface of the second sheet pattern, and a bottom surface in contact with the upper surface of the third sheet pattern (second annotated fig. 3),
the inner gate structure has a middle width, in the first direction, at a middle point, with respect to a thickness direction, of the inner gate structure (second annotated fig. 3), and
the middle width of the inner gate structure is smaller than a width, in the first direction, of the upper surface of the inner gate structure (second annotated fig. 3),
the middle width of the inner gate structure is smaller than a width, in the first direction, of the bottom surface of the inner gate structure (second annotated fig. 3).
Claim(s) 11-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shin in view of Liao et al. (US 2023/0361184 A1; hereinafter Liao).
In regards to claim 11, Shin teaches a semiconductor device comprising:
an active pattern (e.g. fig. 3) including a lower pattern (105) [0019] and a plurality of sheet patterns (124) [0019], wherein the lower pattern extends in a first direction (2nd direction) ([0018], [0021]), and the plurality of sheet patterns are spaced apart from the lower pattern in a second direction (3rd direction) ([0018], [0021]) crossing the first direction;
a gate structure (330) disposed on the lower pattern and including a gate electrode (320) [0027], a gate insulating film (300) [0027] and a gate spacer (290) [0027]; and
a source/drain pattern (220) [0019] disposed on the lower pattern, and connected to each of the plurality of sheet patterns (fig. 3),
wherein the source/drain pattern includes a lower source/drain area and an upper source/drain area, wherein the lower source/drain area is in contact with the lower pattern, and the upper source/drain area is disposed on the lower source/drain area (see second annotated fig. 3),
the source/drain pattern is in contact with the gate insulating film of the inner gate structure (see second annotated fig. 3),
the upper source/drain area includes an upper source/drain outer side surface in contact with the plurality of sheet patterns and the inner gate structure (see second annotated fig. 3),
the lower source/drain area includes a lower source/drain outer side surface in contact with the plurality of sheet patterns and the inner gate structure and directly connected to the upper source/drain outer side surface (see second annotated fig. 3),
a sign of a slope of the upper source/drain outer side surface is opposite to a sign of a slope of the lower source/drain outer side surface (see second annotated fig. 3), and
an intersection at which the upper source/drain outer side surface and the lower source/drain outer side surface meet each other is in contact with the inner gate structure (see second annotated fig. 3).
Shin appears to be silent as to, but does not preclude, the limitations wherein the gate structure includes an inner gate structure disposed between the lower pattern and a bottommost sheet pattern (106b) of the plurality of sheet patterns, and between adjacent sheet patterns, wherein the inner gate structure includes the gate electrode and the gate insulating film. Liao teaches the limitations the gate structure includes an inner gate structure (2502/2404/1504) disposed between the lower pattern (103) and a bottommost sheet pattern (106b) of the plurality of sheet patterns, and between adjacent sheet patterns (106), wherein the inner gate structure includes the gate electrode (2502) and the gate insulating film (2404) ([0045-0047]; figs. 16). It would have been obvious to one having ordinary skill in the art at the time the application at hand was filed to modify the limitations taught by Shin with the aforementioned limitations taught by Liao such that the inner gate structure is arranged to be in the location taught by Liao to have smaller devise allowing for higher device densities (Liao [0002]).
In regards to claim 12, the combination of Shin and Liao teaches the limitations discussed above in addressing claim 11. The combination of Shin and Liao appears to be silent as to the limitation wherein a magnitude of the slope of the upper source/drain outer side surface is smaller than a magnitude of the slope of the lower source/drain outer side surface; however, Shin teaches the limitations of multiple arrangement of sheet patterns (figs. 3-39) and absent persuasive evidence, it would have been obvious to one having ordinary skill in the art at the time the application at hand was filed to find that the configuration of an element is a matter of choice. In re Dailey, 357 F. 2d 669, 149 USPQ 47 (CCPA 1966).
In regards to claim 13, the combination of Shin and Liao teaches the limitations discussed above in addressing claim 11. Shin further teaches the limitations wherein the plurality of sheet patterns (124) include a first sheet pattern and a second sheet pattern adjacent to each other in the second direction, the second sheet pattern is disposed between the first sheet pattern and the lower pattern (105) (second annotated fig. 3),
each of the first sheet pattern and the second sheet pattern includes an upper surface and a bottom surface opposite to each other in the second direction (second annotated fig. 3),
the bottom surface of the first sheet pattern faces the upper surface of the second sheet pattern (second annotated fig. 3), and
the intersection at which the upper source/drain outer side surface and the lower source/drain outer side surface meet each other is positioned between the bottom surface of the first sheet pattern and the upper surface of the second sheet pattern (second annotated fig. 3).
In regards to claim 14, the combination of Shin and Liao teaches the limitations discussed above in addressing claim 13. The combination of Shin and Liao appears to be silent as to the limitation wherein the first sheet pattern disposed as an uppermost sheet pattern among the plurality of sheet patterns; however, Shin teaches the limitations of multiple arrangement of sheet patterns (figs. 3-39) and absent persuasive evidence, it would have been obvious to one having ordinary skill in the art at the time the application at hand was filed to find that the configuration of an element is a matter of choice. In re Dailey, 357 F. 2d 669, 149 USPQ 47 (CCPA 1966).
In regards to claim 15, the combination of Shin and Liao teaches the limitations discussed above in addressing claim 13. The combination of Shin and Liao appears to be silent as to the limitation wherein the plurality of sheet patterns further includes a third sheet pattern disposed on the first sheet pattern and adjacent to the first sheet pattern, and wherein the third sheet pattern is disposed as an uppermost sheet pattern among the plurality of sheet patterns (second annotated fig. 3: plurality of (124)); however, Shin teaches the limitations of multiple arrangement of sheet patterns (figs. 3-39) and absent persuasive evidence, it would have been obvious to one having ordinary skill in the art at the time the application at hand was filed to find that the configuration of an element is a matter of choice. In re Dailey, 357 F. 2d 669, 149 USPQ 47 (CCPA 1966).
In regards to claim 16, the combination of Shin and Liao teaches the limitations discussed above in addressing claim 11. The combination of Shin and Liao appears to be silent as to the limitation wherein the plurality of sheet patterns includes a bottommost sheet pattern adjacent to the lower pattern, the gate spacer includes an inner sidewall, which faces the gate electrode, and an outer sidewall, which is opposite to the inner sidewall of the gate spacer, and a gate spacer extension line extending from the outer sidewall of the gate spacer in the second direction meets the bottommost sheet pattern; however, Shin teaches the limitations of multiple arrangement of sheet patterns (figs. 3-39) and absent persuasive evidence, it would have been obvious to one having ordinary skill in the art at the time the application at hand was filed to find that the configuration of an element is a matter of choice. In re Dailey, 357 F. 2d 669, 149 USPQ 47 (CCPA 1966).
In regards to claim 17, Shin teaches a semiconductor device comprising:
an active pattern (e.g. fig. 3) including a lower pattern (105) [0019] and a plurality of sheet patterns(124) [0019], wherein the lower pattern extends in a first direction (2nd direction) ([0018], [0021]), and the plurality of sheet patterns are spaced apart from the lower pattern in a second direction (3rd direction) ([0018], [0021]) crossing the first direction;
a gate structure (330) disposed on the lower pattern and including a gate electrode (320) [0027], a gate insulating film (300) [0027] and a gate spacer (290) [0027]; and
a source/drain pattern (220) [0019] disposed on the lower pattern, and connected to each of the plurality of sheet patterns (fig. 3),
the source/drain pattern is in contact with the gate insulating film of the inner gate structure (see second annotated fig. 3),
the plurality of sheet patterns include a first sheet pattern (annotated fig. 3: middle instance of (124)) and a second sheet pattern (annotated fig. 3: e.g. bottom instance of (124)) adjacent to each other in the second direction (the middle and bottom instance of (124) do not have intervening instances of (124) between each other in the 3rd direction),
each of the first sheet pattern and the second sheet pattern includes a sidewall in contact with the source/drain pattern (annotated fig. 3 and second annotated fig. 3: first sheet pattern and second sheet pattern sidewalls correspond to indicated source/drain sidewalls),
a sign of a slope of the sidewall of the first sheet pattern is opposite to a sign of a slope of the sidewall of the second sheet pattern (annotated fig. 3 and second annotated fig. 3: first sheet pattern and second sheet pattern sidewalls correspond to indicated source/drain sidewalls),
each of the first sheet pattern and the second sheet pattern includes an upper surface and a bottom surface opposite to each other in the second direction (annotated fig. 3),
the bottom surface of the first sheet pattern faces the upper surface of the second sheet pattern (annotated fig. 3), and
a point at which the source/drain pattern has a maximum width in the first direction is positioned between the bottom surface of the first sheet pattern and the upper surface of the second sheet pattern (second annotated fig. 3: e.g. the point where the upper source/drain meets the lower source/drain).
Shin appears to be silent as to, but does not preclude, the limitations wherein the gate structure includes an inner gate structure disposed between the lower pattern and a bottommost sheet pattern of the plurality of sheet patterns, and between adjacent sheet patterns, wherein the inner gate structure includes the gate electrode and the gate insulating film. Liao teaches the limitations the gate structure includes an inner gate structure (2502/2404/1504) disposed between the lower pattern (103) and a bottommost sheet pattern (106b) of the plurality of sheet patterns, and between adjacent sheet patterns (106), wherein the inner gate structure includes the gate electrode (2502) and the gate insulating film (2404) ([0045-0047]; figs. 16). It would have been obvious to one having ordinary skill in the art at the time the application at hand was filed to modify the limitations taught by Shin with the aforementioned limitations taught by Liao such that the inner gate structure is arranged to be in the location taught by Liao to have smaller devise allowing for higher device densities (Liao [0002]).
The combination of Shin and Liao appears to be silent as to the limitation the first sheet pattern is disposed as an uppermost sheet pattern among the plurality of sheet patterns; however, Shin teaches the limitations of multiple arrangement of sheet patterns (figs. 3-39) and absent persuasive evidence, it would have been obvious to one having ordinary skill in the art at the time the application at hand was filed to find that the configuration of an element is a matter of choice. In re Dailey, 357 F. 2d 669, 149 USPQ 47 (CCPA 1966).
In regards to claim 18, the combination of Shin and Liao teaches the limitations discussed above in addressing claim 17. Shin further teaches the limitations wherein a width, in the first direction, of the upper surface of the first sheet pattern is greater than a width, in the first direction, of the bottom surface of the first sheet pattern, and a width, in the first direction, of the upper surface of the second sheet pattern is smaller than a width, in the first direction, of the bottom surface of the second sheet pattern (see annotated fig. 3: e.g. the upper surface of 1st sheet pattern is wider than the bottom surface of 1st sheet pattern and the upper surface of 2nd sheet pattern is narrower than the bottom surface of 2nd sheet pattern).
In regards to claim 19, the combination of Shin and Liao teaches the limitations discussed above in addressing claim 17. The combination of Shin and Liao appears to be silent as to the limitation wherein a magnitude of a slope of the sidewall of the first sheet pattern is different from a magnitude of a slope of the sidewall of the second sheet pattern; however, Shin teaches the limitations of multiple arrangement of sheet patterns (figs. 3-39) and absent persuasive evidence, it would have been obvious to one having ordinary skill in the art at the time the application at hand was filed to find that the configuration of an element is a matter of choice. In re Dailey, 357 F. 2d 669, 149 USPQ 47 (CCPA 1966).
In regards to claim 20, the combination of Shin and Liao teaches the limitations discussed above in addressing claim 17. Shin further teaches the limitations wherein the plurality of sheet patterns further includes a third sheet pattern disposed between the lower pattern and the second sheet pattern, the third sheet pattern includes a sidewall in contact with the source/drain pattern, and a sign of a slope of the sidewall of the third sheet pattern is a same as the sign of the slope of the sidewall of the second sheet pattern (second annotated fig. 3: e.g. multiple sheet patterns (124)).
Conclusion
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CALVIN CHOI
Patent Examiner
Art Unit 2812
/CALVIN Y CHOI/Patent Examiner, Art Unit 2812