DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-10 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an Abstract without significantly more.
With respect to claim 1 the limitation(s):
An apparatus for measuring current in a power converter comprising:
a state space observer configured to provide a statistically most probable state of the power converter; and
an analog digital converter comprising:
a comparator configured to compare a first state space observer current approximation to a real time current input signal to determine if the first state space observer current approximation is too high or too low; and
a counter configured to be incremented or decremented based on a result of a comparison at the comparator,
wherein an output of the counter is input to the state space observer and added to the first state space observer current approximation to calculate a second state space observer current approximation that will be one count closer to a final correct value.
These limitation(s) highlighted in (bold) is/are directed to an abstract idea and would fall within the “Mental Processes” and “Mathematical Concepts” groupings of abstract ideas. The above portion(s) of the claim(s) constitute(s) an abstract idea because:
The limitation(s) regarding “a state space observer configured to provide a statistically most probable state of the power converter”, as drafted, is an act of observation and evaluation that, under its broadest reasonable interpretation, covers performance of the limitation(s) in the mind. That is, other than reciting “an analog digital converter,” nothing in the claim language precludes the Step(s) from practically being performed in the mind. For example, but for the “an analog digital converter” language, “provide” in the context of this claim encompasses the user manually determining a statistically probable state of a device.
The limitation(s) regarding “a comparator configured to compare a first state space observer current approximation to a real time current input signal to determine if the first state space observer current approximation is too high or too low”, as drafted, is an act of observation and evaluation that, under its broadest reasonable interpretation, covers performance of the limitation(s) in the mind. That is, other than reciting “an analog digital converter,” nothing in the claim language precludes the Step(s) from practically being performed in the mind. For example, but for the “an analog digital converter” language, “compare” in the context of this claim encompasses the user manually comparing an approximated current to a measured current.
Further, the limitation regarding “a comparator configured to compare a first state space observer current approximation to a real time current input signal to determine if the first state space observer current approximation is too high or too low”, as drafted, falls within the “Mathematical Concepts” groupings of abstract ideas. This interpretation is supported by the recitation of a mathematical operation acting on one or more variables to determine another. It is important to note that a mathematical concept need not be expressed in mathematical symbols, because "[w]ords used in a claim operating on data to solve a problem can serve the same purpose as a formula." In re Grams, 888 F.2d 835, 837 and n.1, 12 USPQ2d 1824, 1826 and n.1 (Fed. Cir. 1989).
The limitation(s) regarding “a counter configured to be incremented or decremented based on a result of a comparison at the comparator”, as drafted, is an act of observation and evaluation that, under its broadest reasonable interpretation, covers performance of the limitation(s) in the mind. That is, other than reciting “an analog digital converter,” nothing in the claim language precludes the Step(s) from practically being performed in the mind. For example, but for the “an analog digital converter” language, “incremented or decremented” in the context of this claim encompasses the user manually incrementing a counter.
The limitation(s) regarding “wherein an output of the counter is input to the state space observer and added to the first state space observer current approximation to calculate a second state space observer current approximation that will be one count closer to a final correct value”, as drafted, is an act of observation and evaluation that, under its broadest reasonable interpretation, covers performance of the limitation(s) in the mind. That is, other than reciting “an analog digital converter,” nothing in the claim language precludes the Step(s) from practically being performed in the mind. For example, but for the “an analog digital converter” language, “calculate” in the context of this claim encompasses the user manually calculating a current approximation.
Further, the limitation regarding “wherein an output of the counter is input to the state space observer and added to the first state space observer current approximation to calculate a second state space observer current approximation that will be one count closer to a final correct value”, as drafted, falls within the “Mathematical Concepts” groupings of abstract ideas. This interpretation is supported by the recitation of a mathematical operation acting on one or more variables to determine another. It is important to note that a mathematical concept need not be expressed in mathematical symbols, because "[w]ords used in a claim operating on data to solve a problem can serve the same purpose as a formula." In re Grams, 888 F.2d 835, 837 and n.1, 12 USPQ2d 1824, 1826 and n.1 (Fed. Cir. 1989).
Further, referring to the MPEP 2106.04, the claim limitations are analogous to a claim to "collecting information, analyzing it, and displaying certain results of the collection and analysis," where the data analysis steps are recited at a high level of generality such that they could practically be performed in the human mind, Electric Power Group v. Alstom, S.A., 830 F.3d 1350, 1353-54, 119 USPQ2d 1739, 1741-42 (Fed. Cir. 2016).
If a claim limitation, under its broadest reasonable interpretation, covers performance of the limitation in the mind but for the recitation of generic computer components, then it falls within the “Mental Processes” grouping of abstract ideas. Further, if a claim limitation, under its broadest reasonable interpretation, recites mathematical relationships, mathematical formulas or equations, and mathematical calculations, then it fall within the “Mathematical Concepts” groupings of abstract ideas. Accordingly, the claim recites an abstract idea.
This judicial exception is not integrated into a practical application because the non- abstract additional elements of the claims do not impose meaningful limits on practicing the abstract idea(s) recited in the preceding claim(s). In particular, the claims recited the additional elements of:
The limitation(s) regarding “a power converter” does/do not integrate the abstract idea into a practical application, because it is recited at such a high-level of generality that it is viewed as generally linking the use of the judicial exception to power converters. Generally linking the use of the judicial exception to a particular technological environment or field of use, fails to integrate the abstract ideas into a practical application, because the claim does not specify what practical application the claim is directed to.
The limitation(s) regarding “a real time current input signal” does/do not integrate the abstract idea into a practical application because the claim does not specify what practical application the claim is directed to. Rather the limitation is recited at such a high-level of generality that it amounts to no more than adding insignificant extra- solution activity to the judicial exception, i.e. data gathering. Accordingly, these additional elements do not integrate the abstract idea into a practical application because they are regarded as data gathering steps necessary or routine to implement the abstract idea.
The limitation(s) regarding “an analog digital converter” does/do not integrate the abstract idea into a practical application because the claim limitation is a generic computer component performing the generic computer function of receiving, storing, and comparing data such that it amounts to no more than mere instruction to apply the exception using a generic computer component.
As such Examiner does NOT view that the claims:
-Improve the functioning of a computer, or to any other technology or technical field;
-Apply the judicial exception with, or by use of, a particular machine - see MPEP 2106.05(b);
-Effect a transformation or reduction of a particular article to a different state or thing - see MPEP 2106.05(c); or
-Apply or use the judicial exception in some other meaningful way beyond generally linking the use of the judicial exception to a particular technological environment, such that the claim as a whole is more than a drafting effort designed to monopolize the exception – see MPEP 2106.05(e) and Vanda Memo.
The claim(s) does/do not include additional elements that are sufficient to amount to significantly more than the judicial exception because the additional elements amount to no more than mere instructions to apply the exception using a generic computer component, or are well-understood, routine, and conventional (WURC) data gathering functions.
As discussed above with respect to integration of the abstract idea into a practical application, the additional element of “a power converter” is/are seen as generally linking the use of the judicial exception to a particular technological environment. Linking a judicial exception to a technological environment cannot provide an inventive concept. Similarly, with regards to the additional element(s) of “a real time current input signal” is/are viewed as insignificant extra-solution activity, such as mere data gathering in a conventional way and, therefore, does not provide an inventive concept. Similarly, with regards to the additional element(s) of “an analog digital converter” is/are view as a generic computer component performing the generic computer function of receiving, storing, and comparing data such that it amounts to no more than mere instruction to apply the exception using a generic computer component. Mere instructions to apply an exception using a generic computer component cannot provide an inventive concept.
Examiner further notes that such additional elements are viewed to be well- understood, routine, and conventional (WURC) as evidenced by: Harrison (US 20150009055 A1); Fernald (US 7589514 B1); Ye (US 20130003420 A1); Iqal et al. (US 20230421168 A1); Krishnamurthy et al. (US 20220374060 A1); Chapuis et al. (US 20080042632 A1); Zane et al. (US 20150349649 A1); Daly et al. (US 20140340939 A1); and Lawrence et al. (US 20220069702 A1).
Considering the claim as a whole, one of ordinary skill in the art would not know the practical application of the present invention since the claims do not apply or use the judicial exception in some meaningful way. As currently claimed, Examiner views that the additional elements do not apply, rely on, or use the judicial exception in a manner that imposes a meaningful limit on the judicial exception, because the claims fails to recite clearly how the judicial exception is applied in a manner that does not monopolize the exception because the limitation regarding “a power converter,” “current input signal,” and “an analog digital converter” can be viewed as a field of use, necessary data gathering, and any device and do not impose a meaningful limitation describing what problem is being remedied or solved.
The Independent claim(s) 6 is also rejected under 35 USC 101, because they contain limitations substantially similar to the independent claim 1.
Dependent claims 2-5 and 7-10 when analyzed as a whole are held to be patent ineligible under 35 U.S.C. 101 because the additionally recited limitation(s) fail(s) to establish that the claim(s) is/are not directed to an abstract idea, as detailed below: there are no additional element(s) in the dependent claims that adds a meaningful limitation to the abstract idea to make the claims significantly more than the judicial exception (abstract idea).
Claims 2-3 and 7-8 recite limitations regarding data gathering steps and insignificant application necessary or routine to implement the abstract idea and thus are not significantly more than the abstract idea and viewed to be well known routine and conventional as evidenced by the prior art shown above.
Claims 3 and 8 further limit the abstract idea with an abstract idea, such as an “Mental Process”, and thus the claims are still directed to an abstract idea without significantly more.
Claim 2, 4-5, 7, and 9-10 recites limitation regarding generally linking the use of a judicial exception to a field of use or technological environment. Generally linking the use of the judicial exception to a particular technological environment or field of use, fails to integrate the abstract ideas into a practical application, because the claim does not specify what practical application the claim is directed to.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 4, 6, and 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Harrison (US 20150009055 A1) in view of Fernald (US 7589514 B1).
Regarding Claims 1 and 6. Harrison teaches:
An apparatus for measuring current in a power converter comprising:
a state space observer configured to provide a statistically most probable state of the power converter (See Fig. 4, para[0022] – para[0023], and para[0028]: The power converters 302 convert the DC input power to AC power. Within a power converter 302, the ADC 200 may be part of a state space observer (SSO) used in control circuitry for controlling the power conversion.); and
an analog digital converter (See Fig. 2, Fig. 4, and para[0016]: an analog to digital converter (ADC) 200.) comprising:
a comparator configured to compare a first state space observer current approximation to a real time current input signal to determine if the first state space observer current approximation is too high or too low (See Fig. 2, Fig. 4, para[0016]- para[0017]: The comparator 202 compares the analog input signal IN to the analog signal from the DAC 210.).
Harrison is silent as to the language of:
a counter configured to be incremented or decremented based on a result of a comparison at the comparator,
wherein an output of the counter is input to the state space observer and added to the first state space observer current approximation to calculate a second state space observer current approximation that will be one count closer to a final correct value.
Nevertheless Fernald teaches:
a counter configured to be incremented or decremented based on a result of a comparison at the comparator (See Fig. 13 and Col. 11 lines 35 – 50: Up/Down counter 804 may count up when comparator 556 indicates that the sense voltage corresponding to load current 955 is greater than the output of DAC 810, and may count down when the sense voltage corresponding to load current 955 is below the output of DAC 810.),
wherein an output of the counter is input to the state space observer and added to the first state space observer current approximation to calculate a second state space observer current approximation that will be one count closer to a final correct value (See Fig. 13, Fig. 15, Col. 5 lines 22 – 43, Col. 9 lines 20 – 32, and Col. 11 lines 35 - 65: The estimated average value may then be adjusted based on a sample of the comparator output, the estimated average value thereby tracking the load current over time. As suggested by equation 1, the output of Up/Down counter 804 may be multiplied by Gain 952 to produce the error, which may be added (950) to the present value of Average register 818 to obtain the corrected expected value.).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Harrison by a counter configured to be incremented or decremented based on a result of a comparison at the comparator, wherein an output of the counter is input to the state space observer and added to the first state space observer current approximation to calculate a second state space observer current approximation that will be one count closer to a final correct value such as that of Fernald. Fernald teaches, “For example, if counter 804 ends with a large positive or negative value, most comparator samples would indicate that the estimate was either too large or too small. This information may be used to make a larger correction to the estimate in an attempt to track to the actual mean load current quicker, as will be further discussed below” (See Col. 9 lines 20 – 32). One of ordinary skill would have been motivated to modify Harrison, because incrementing a counter based on a comparison would have helped to more quickly estimate a load current, as recognized by Fernald.
Regarding Claims 4 and 9. Harrison teaches:
The apparatus of claim 1, or the method of claim 6,
wherein the state space observer and the analog digital converter are disposed on the same application specific integrated circuit (See para[0018]: the ADC 200 may be a combined ADC and state space observer (SSO) used in control circuitry for various applications.).
Claim(s) 2 and 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Harrison (US 20150009055 A1) in view of Fernald (US 7589514 B1) as applied to claims 1 and 6 above, and further in view of Ye (US 20130003420 A1).
Regarding Claims 2 and 7. Harrison is silent as to the language of:
The apparatus of claim 1, or the method of claim 6,
further comprising an external current transformer configured to provide an external current transformer differential output to the comparator and a current steering digital to analog converter configured to provide a current steering digital to analog converter differential output to the comparator.
Nevertheless Ye teaches:
an external current transformer configured to provide an external current transformer differential output to the comparator and a current steering digital to analog converter configured to provide a current steering digital to analog converter differential output to the comparator (See Fig. 2, para[0006], and para[0021] – para[0022]: a controller for a DC/DC converter includes a first error analog to digital converter (EADC) configured to detect a primary voltage from a secondary side of a transformer and generate a first error signal corresponding to the primary voltage. The voltage Vo is sampled by differential amplifier 270 having a digital to analog converter (DAC) 274 providing a second reference voltage. Output of the differential amplifier 270 is sampled by an analog to digital converter (ADC) 280.).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Harrison an external current transformer configured to provide an external current transformer differential output to the comparator and a current steering digital to analog converter configured to provide a current steering digital to analog converter differential output to the comparator such as that of Ye. Ye teaches, “Such improvements are realized by both feedback and feedforward controls because the transformer primary and converter output voltages are directly sampled/detected by fast analog to digital converters and controllers as opposed to a conventional converter with a single feedback control loop“ (See para[0016]). One of ordinary skill would have been motivated to modify Harrison, because comparing the output of a current transformer and a digital to analog converter would have helped to sample a current transformer output, as recognized by Ye.
Claim(s) 3 and 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Harrison (US 20150009055 A1) in view of Fernald (US 7589514 B1) and Ye (US 20130003420 A1) as applied to claims 2 and 7 above, and further in view of Iqal et al. (US 20230421168 A1).
Regarding Claims 3 and 8. Harrison is silent as to the language of:
The apparatus of claim 2, or the method of claim 7,
wherein an imbalance between the external current transformer differential output and the current steering digital to analog converter differential output results in a voltage that is monitored by a voltage comparator, and wherein a polarity of the voltage indicates which of the external current transformer differential output and the current steering digital to analog converter differential output is the larger and which is the smaller.
Nevertheless Iqal teaches:
wherein an imbalance between the external current transformer differential output and the current steering digital to analog converter differential output results in a voltage that is monitored by a voltage comparator, and wherein a polarity of the voltage indicates which of the external current transformer differential output and the current steering digital to analog converter differential output is the larger and which is the smaller (See Fig. 1, para[0018], and para[0022]: hen the sampling signal is active, the multiplexer array transmits the positive differential voltage and the negative differential voltage to the comparator to output a differential voltage polarity. Comparator output V.sub.COM simply indicates the polarity of the differential input voltage, i.e., whether Vin_p is larger or smaller than Vin_n.).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Harrison wherein an imbalance between the external current transformer differential output and the current steering digital to analog converter differential output results in a voltage that is monitored by a voltage comparator, and wherein a polarity of the voltage indicates which of the external current transformer differential output and the current steering digital to analog converter differential output is the larger and which is the smaller such as that of Iqal. Iqal teaches, “causing the comparator to output a differential voltage polarity; and the DAC output and the reference voltage for transmission to the comparator, causing the comparator to output an approximated bit for the DAC output” (See para[0004]). Iqal further teaches, “Other circuits similarly may include duplicate hardware for processing of positive and negative input voltages. Such hardware occupies significant surface area” (See para[0002]). One of ordinary skill would have been motivated to modify Harrison, because using the polarity of a comparator would have helped to approximate a bit thereby saving surface area, as recognized by Iqal.
Claim(s) 5 and 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Harrison (US 20150009055 A1) in view of Fernald (US 7589514 B1) as applied to claims 1 and 6 above, and further in view of Krishnamurthy et al. (US 20220374060 A1).
Regarding Claims 5 and 10. Harrison is silent as to the language of:
The apparatus of claim 1, or the method of claim 6,
wherein the state space observer is external to the analog digital converter.
Nevertheless Krishnamurthy teaches:
wherein the state space observer is external to the analog digital converter (See Fig. 1, para[0015], and para[0020] – para[0021]: the current sensor comprises an analog-to-digital converter (ADC) coupled to the DC-DC converter, wherein the ADC is to provide digital representations of one or more parameters of the DC-DC converter to the first Kalman filter.).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Harrison s wherein the state space observer is external to the analog digital converter such as that of Krishnamurthy. Krishnamurthy teaches, “ADC 104a is an apparatus that converts continuous physical quantities (e.g., 6 voltages) to digital numbers that represent the amplitude of the physical quantities” (See para[0020]). One of ordinary skill would have been motivated to modify Harrison, because using a separate analog digital converter and state space observer would have helped to convert an analog signal to a digital signal for input into a state space model, as recognized by Krishnamurthy.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Zane et al. (US 20150349649 A1) discloses using the polarity of a comparison between two voltages to indicate power flow (See para[0269]).
Daly et al. (US 20140340939 A1) discloses using the difference between current peak values to determine an unbalanced condition of a current transformer (See para[0030].)
Lawrence et al. (US 20220069702 A1) discloses using a Kalman filter as a state space model to estimate current of a power converter (See Fig. 23A-23B and para[0114]).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CARTER W FERRELL whose telephone number is (571)272-0551. The examiner can normally be reached Monday - Friday 10 am - 8 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Catherine T. Rastovski can be reached at (571)270-0349. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/CARTER W FERRELL/ Examiner, Art Unit 2863
/Catherine T. Rastovski/ Supervisory Primary Examiner, Art Unit 2863