DETAILED ACTION
Claims 1-3, 5-15 are pending.
Notice of Pre-AIA or AIA Status
This Office Action is sent in response to Applicant’s Communication received on 10/20/2025 for application number 18/230,622.
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1 and 15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Okamoto et al. (US 2015/0058642 A1).
Regarding claim 1, Okamoto teaches an electronic device (devices of Figures 1-3, 8) comprising:
a connector including a plurality of first terminals that are connected to a plurality of second terminals of a connecting device (“the USB socket 111 includes a Vbus terminal, a D+ terminal, a D− terminal, an ID terminal, and a GND terminal.” Par 0060 and Figure 3), the plurality of first terminals including:
one or more power supply terminals to supply direct-current power to the connecting device (“The Vbus terminal is a terminal to which the power supply signal of 5 V is transmitted.” Par 0060 and Figure 3); and
a single, dedicated, detection terminal pin distinct from the one or more power supply terminals (“The ID terminal is a terminal specified by the USB OTG standard, and is used to determine whether the other connected device is a USB host or a USB device.” Par 0060 and “The device determination circuit 113 determines whether a USB 3.0 device is connected, based on the potential of the ID terminal, and notifies the PMU 122 of the determination result.” Par 0065 and Figures 8-10); and
a power feed circuit (Figure 3, power supply unit 120 and device determination circuit 113) configured to:
perform, when the connecting device is connected to the connector, a determination based on a voltage detected at the single dedicated detection terminal pin whether a second terminal, among the plurality of second terminals, connected to the single dedicated detection terminal pin is a specific terminal (“The device determination circuit 113 determines whether a USB 3.0 device is connected, based on the potential of the ID terminal, and notifies the PMU 122 of the determination result.” Par 0065 and “The ID terminal is a terminal specified by the USB OTG standard, and is used to determine whether the other connected device is a USB host or a USB device.” Par 0060) [this maps to detection process based on potential/ voltage detected at ID terminal and determination of specific terminal (whether a USB 3.0 device/host is connected)], and
supply direct-current supply power having a voltage value set based on a result of the determination to the connecting device via the one or more power supply terminals of the connector (“The CPU 101, when determining that ID=0, executes the process of Step S18” par 0138 and “[Step S18] The CPU 101 instructs the PMU 122 to output the power-supply voltage from the Vbus terminal… Then, the electric power of 0.5 V and 0.5 A is supplied to the other device through the Vbus terminal from the charging IC 121.” Par 0139 and “when the information processing apparatus 100 operates as a USB host, the charging IC 121 supplies a power-supply voltage… of 5 V to the other device from the Vbus terminal.” Par 0062 and Figure 14) [the device uses the ID terminal to determine if it should supply a lower voltage as a USB device or a higher voltage as a USB host],
wherein
when the second terminal connected to the single dedicated detection terminal pin is not the specific terminal, the power feed circuit sets the voltage value of the direct- current supply power to a first voltage value larger than 0 volts and smaller than a specified voltage value (“When the connected OTG device is a USB device, the PHY 112 detects that the potential of the ID terminal is the earth potential (i.e., ID=0)” par 0137 and “The CPU 101, when determining that ID=0, executes the process of Step S18” par 0138 and “[Step S18] The CPU 101 instructs the PMU 122 to output the power-supply voltage from the Vbus terminal… Then, the electric power of 0.5 V and 0.5 A is supplied to the other device through the Vbus terminal from the charging IC 121.” Par 0139), and
when the second terminal connected to the single dedicated detection terminal pin is the specific terminal, the power feed circuit sets the voltage value of the direct- current supply power to a second voltage value larger than the first voltage value (“when the connected OTG device is a USB host, the PHY 112 detects that the potential of the ID terminal is not the earth potential,” par 0137 and “when the information processing apparatus 100 operates as a USB host, the charging IC 121 supplies a power-supply voltage… of 5 V to the other device from the Vbus terminal.” Par 0062).
Claim 15 corresponds to claim 1 and is rejected accordingly.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2, 5, 13, 14 are rejected under 35 U.S.C. 103 as being unpatentable over Okamoto in view of Wada et al. (US 2012/0249119 A1).
Regarding claim 2, Okamoto teaches the electronic device according to Claim 1. However, Okamoto does not explicitly teach wherein the single dedicated detection terminal pin is adjacent to the one or more power supply terminals.
In the analogous art, Wada further teaches wherein the single dedicated detection terminal pin is adjacent to the one or more power supply terminals (Figure 1, ID terminal in the connector device 20 is right below (adjacent) to VBUS terminal (power supply terminal)).
It would have been obvious to a person having ordinary skill in the art, having the teachings of Okamoto and Wada before him before the effective filing date of the claimed invention, to have modified Okamoto to incorporate the teachings of Wada to place the detection pin and power terminals adjacent to each other to reduce the overall circuit scale and power consumption.
Regarding claim 5, Okamoto teaches the electronic device according to Claim 1. However, Okamoto does not explicitly teach wherein based on a voltage value of the single dedicated detection terminal pin, the power feed circuit determines whether the second terminal connected to the single dedicated detection terminal pin is the specific terminal.
In the analogous art, Wada further teaches wherein based on a voltage value of the single dedicated detection terminal pin, the power feed circuit determines whether the second terminal connected to the single dedicated detection terminal pin is the specific terminal (“The identification terminal voltage detecting circuit 13 detects a voltage of an ID terminal and notifies the control unit 15 of the detected voltage. The accessory device has a unique resistance value corresponding to the accessory standard thereof… the identification terminal voltage detecting circuit 13 detects the resistance value as a voltage.” Par 0026 and “By describing a voltage acquired by calculating the product of the resistance RID and the reference current for each accessory device in advance in… Table 1, the accessory device is identified.” Par 0053).
It would have been obvious to a person having ordinary skill in the art, having the teachings of Okamoto and Wada before him before the effective filing date of the claimed invention, to have modified Okamoto to incorporate the teachings of Wada to detect the specific terminal based on the voltage value to choose the appropriate voltage value of the direct-current power supply.
Regarding claim 13, Okamoto teaches a connecting device comprising the plurality of second terminals that are connected to the plurality of first terminals of the connector of the electronic device according to Claim 1 (Figure 8-10, and Figure 1, connector 10).
However, Okamoto does not explicitly teach wherein the plurality of second terminals include: one or more input terminals that are connected to the one or more power supply terminals and receive the direct-current supply power from the electronic device; and an identification terminal that is electrically separated from the one or more input terminals and is connected, as the specific terminal, to the single dedicated detection terminal pin.
In the analogous art, Wada further teaches wherein
the plurality of second terminals include:
one or more input terminals that are connected to the one or more power supply terminals and receive the direct-current supply power from the electronic device (“The micro-USB connector is configured by five terminals (pins) including a power supply terminal (VBUS), a ground terminal (GND), differential pair terminals (D+ and D−), and an identification line terminal (ID).” Par 0019 and “the power of the power supply detecting circuit 12 is supplied from the charger connected to the connector 20 through a VBUS terminal.” Par 0023 and Figure 1); and
an identification terminal that is electrically separated from the one or more input terminals and is connected, as the specific terminal, to the single dedicated detection terminal pin (“a connector including at least an identification terminal that is used for identifying a connected accessory device and an internal circuit to each other” par 0008).
It would have been obvious to a person having ordinary skill in the art, having the teachings of Okamoto and Wada before him before the effective filing date of the claimed invention, to have modified Okamoto to incorporate the teachings of Wada to have input terminals to receive dc power and an electrically separated identification terminal to properly identify the connected device and provide the appropriate level of voltage, increasing overall system efficiency.
Regarding claim 14, Okamoto and Wada teach a device system comprising:
the electronic device according to Claim 1 (Figure 1, Wada); and
the connecting device that is connected to the electronic device, the connecting device including the plurality of second terminals that are connected to the plurality of first terminals of the connector of the electronic device (Figure 1, the five terminals of the connector device 20 are connected to the five terminals of the input-output circuit 10, respectively, Wada).
The remainder of claim 14 repeats the same limitations as recited in claim 13 are is rejected accordingly.
Claims 3, 10-12 are rejected under 35 U.S.C. 103 as being unpatentable over Okamoto in view of Jung et al. (US 2019/0258832 A1).
Regarding claim 3, Okamoto teaches the electronic device according to Claim 1. However, Okamoto does not explicitly teach wherein the plurality of first terminals include one or more power reception terminals that receive direct-current power having the specified voltage value from the connecting device, and the one or more power supply terminals, the single dedicated detection terminal pin, and the one or more power reception terminals are arranged in a row such that the single dedicated detection terminal pin is located between the one or more power supply terminals and the one or more power reception terminals.
In the analogous art, Jung further teaches wherein
the plurality of first terminals include one or more power reception terminals that receive direct-current power having the specified voltage value from the connecting device (“The connector 310 may include one or more signal terminals and one or more power terminals” par 0067 and “the electronic device 301 may be connected to an external electronic device (for example, a charger) which supplies external power through the connector 310” par 0068 and “when the detected value for the VBUS terminal of the connector is about 3.3 V or about 5 V, the electronic device may identify/determine that the external electronic device is a charger (or a USB device capable of supplying power to the electronic device)” par 0128 and Figure 3) [VBUS (power terminals) of the connector receive external power (DC supply) from connected charger at a specified voltage (3.3V/5V)], and
the one or more power supply terminals, the single dedicated detection terminal pin, and the one or more power reception terminals are arranged in a row such that the single dedicated detection terminal pin is located between the one or more power supply terminals and the one or more power reception terminals (“the arrangement of the pins formed on the first side (for example, side A) and the second side (for example, side B) of the contact substrate 1105 may be as shown in Table 1 below,” par 0194 and paragraph 0195 and Figure 11) [VBUS terminals (A4, A9) and ID terminal (A5) are arranged sequentially in the connector row, placing the detection terminal between power terminals A4 and A9, which supply and receive power respectively].
It would have been obvious to a person having ordinary skill in the art, having the teachings of Okamoto and Jung before him before the effective filing date of the claimed invention, to have modified Okamoto to incorporate the teachings of Jung to arrange the terminals in a row to allow the electronic device can be inserted in any direction of the first side and the second side. (Jung, paragraph 193)
Regarding claim 10, Okamoto and Jung teach the electronic device according to Claim 3. Jung further teaches wherein
the plurality of first terminals include a pair of ground terminals (Figure 11 and paragraph 0195) [ground terminals A1 B1 and A12 B12 GND power ground; these are two GND terminals], and
the pair of ground terminals are disposed such that the one or more power supply terminals, the single dedicated detection terminal pin, and the one or more power reception terminals are located between the pair of ground terminals (Figure 11 and paragraph 0195) [Table 1 in paragraph 0195 shows ground pins (A1 and A2) placed at the edges of the pin arrangement, with the VBUS (A4 and A9) and the ID terminal (A5) positioned sequentially between them].
Regarding claim 11, Okamoto and Jung teach the electronic device according to Claim 3. Jung further teaches wherein each of the one or more power supply terminals, the single dedicated detection terminal pin, and the one or more power reception terminals is a contact terminal having a shape that causes the each of the one or more power supply terminals, the single dedicated detection terminal pin, and the one or more power reception terminals to be connected to a corresponding one of the second terminals by contact (Figure 11, the first and second connectors 1110 and 1150 have an ovular shape that allows the first set of terminals to be connected to the second set of terminals when the charger is plugged in).
Regarding claim 12, Okamoto and Jung teach the electronic device according to Claim 11. Jung further teaches wherein
width directions of the one or more power supply terminals, the single dedicated detection terminal pin, and the one or more power reception terminals coincide with a direction that the one or more power supply terminals, the single dedicated detection terminal pin, and the one or more power reception terminals are arranged in (“The contact substrate 1105 may have twelve pins 1110-1, 1110-2, . . . 1110-12 formed on a first side (for example, side A), corresponding to a forward direction, and twelve pins 1120-2, 1120-2, . . . 1120-12 formed on a second side (for example, side B), corresponding to a backward direction.” Par 0192 and paragraph 0195 and Figure 11), and
an interval between the one or more power supply terminals, the single dedicated detection terminal pin, and the one or more power reception terminals is narrower than a width of the one or more power supply terminals, the single dedicated detection terminal pin, and the one or more power reception terminals (paragraphs 1092-0195 and Figure 11) [the figure shows a dense, linear arrangement of the terminals on a contact substrate, corresponding to a tight configuration where pin spacings are narrower than pin dimensions].
Claims 6-9 are rejected under 35 U.S.C. 103 as being unpatentable over Okamoto in view of Wada and in further view of Jung.
Regarding claim 6, Okamoto and Wada teach the electronic device according to Claim 5. Wada further teaches further comprising a power feed path that is connected to the one or more power reception terminals and receives the direct-current power having the specified voltage value (“When a charger is connected to the connector 20, under the control of the charging circuit 32, power is charged in the battery 31 from the charger through a power supply path arranged inside the input-output circuit 10.” Par 0020).
However, Okamoto and Wada do not explicitly teach wherein based on the direct-current power having the specified voltage value and obtained from the power feed path, the power feed circuit supplies the direct-current supply power to the connecting device connected to the connector.
In the analogous art, Jung further teaches wherein based on the direct-current power having the specified voltage value and obtained from the power feed path, the power feed circuit supplies the direct-current supply power to the connecting device connected to the connector (“wherein the control circuit is configured to … output, through the power regulator, a predetermined output voltage to the external electronic device through the one or more power terminals when the type is a device that requires that power be supplied through the power regulator,” par 0011 and “when a USB on-the-go (OTG) device is connected, the power regulator 350 may boost the voltage of the battery to a voltage required by the USB OTG device (for example, 5V) and supply the boosted voltage to the USB OTG device.” Par 0081).
It would have been obvious to a person having ordinary skill in the art, having the teachings of Okamoto, Wada and Jung before him before the effective filing date of the claimed invention, to have modified Okamoto and Wada to incorporate the teachings of Jung to supply the appropriate boosted voltage to the connected device and decrease power consumption. (Jung, paragraph 60)
Regarding claim 7, Okamoto, Wada and Jung teach the electronic device according to Claim 6. Jung further teaches wherein the power feed circuit includes:
a voltage switch circuit (Figure 3, power regulator 350 and Figure 2, power adjustor 220) including:
a DC/DC converter that generates, based on the direct-current power having the specified voltage value and obtained from the power feed path, the direct-current supply power having the first voltage value and outputs the generated direct-current supply power to the one or more power supply terminals (“The power regulator 431 may include an input controller 452, a buck/boost controller 454,” par 0107 and “The buck/boost controller 454 may perform a control to convert the power input by the input controller 452 into a voltage and a current suitable for charging the battery 460 and to convert the power from the battery 460 into a voltage and a current suitable for being used by the electronic device” par 0110 and “wherein the control circuit is configured to … output, through the power regulator, a predetermined output voltage to the external electronic device through the one or more power terminals” par 0011) [boost controller corresponds to DC/DC converter, generating necessary power which then output via power regulator], and
a detection circuit that detects a voltage applied to the single dedicated detection terminal pin (“the serial interface 340 may detect the voltage of at least some of the one or more signal terminals.” Par 0076), and
the detection circuit switches on and off of the switch circuit, based on the voltage value of the single dedicated detection terminal pin (“the control circuit may be configured to… at least temporarily stop outputting the predetermined voltage to the external electronic device through the power regulator 350 when the detected voltage is in a second predetermined range.” Par 0091) [the control circuit includes the serial interface and processor and the power regulator includes the switches].
Wada further teaches a switch circuit connected between the power feed path and the one or more power supply terminals (“The power supply switch 11 is a switch that switches between conduction of power, which is supplied from the charger connected to the connector 20 through the VBUS terminal, to the battery 31 through a VBUSOUT terminal and blocking of the power.” Par 0024).
Regarding claim 8, Okamoto, Wada and Jung teach the electronic device according to Claim 7. Jung further teaches wherein the detection circuit turns off the DC/DC converter and the switch circuit in an initial state (“the electronic device may control the power regulator to not start supplying power to the external electronic device or to stop supplying power in operation 560.” Par 0154 and Figure 5).
Regarding claim 9, Okamoto, Wada and Jung each the electronic device according to Claim 6. Wada further teaches further comprising a power control and supply circuit that charges and discharges a battery to make the electronic device operate (“The power supply circuit 30 includes a battery 31 and a charging circuit 32… When a charger is connected to the connector 20, under the control of the charging circuit 32, power is charged in the battery 31 from the charger through a power supply path arranged inside the input-output circuit 10.” Par 0020) [power supply circuit is responsible for controlling power flow for charging the battery], wherein
based on the direct-current power having the specified voltage value and obtained from the power feed path, the power control and supply circuit charges the battery (“When a charger is connected to the connector 20, under the control of the charging circuit 32, power is charged in the battery 31 from the charger through a power supply path arranged inside the input-output circuit 10.” Par 0020) [when a charger is connected, the detected power flows through a power supply path and battery is charged (this corresponds to power having a specific voltage)].
Response to Arguments
Applicant’s arguments with respect to claims 1-3, 5-15 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
No additional arguments were presented as to the remaining claims. As such, the rejection is maintained.
Conclusion
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/AYMAN FATIMA/Examiner, Art Unit 2176
/JAWEED A ABBASZADEH/Supervisory Patent Examiner, Art Unit 2176