DETAILED ACTION
This action is responsive to the communication filed 8 July 2026.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Election/Restrictions
Applicant’s election without traverse of the Species 1 embodiment in the reply filed on 23 December 2025 is acknowledged.
Accordingly, claims 7 and 14, directed to a nonelected embodiment, are withdrawn from further consideration.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-6, 8-13, and 15-19 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Drawings
The objections to the drawings are withdrawn, responsive to Applicant’s amendment of the claims and the new drawings submitted 8 July 2026.
The drawings were received on 8 July 2026. These drawings are acceptable.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 1 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
“The essential inquiry pertaining to this requirement is whether the claims set out and circumscribe a particular subject matter with a reasonable degree of clarity and particularity. ‘As the statutory language of “particular[ity]” and “distinct[ness]” indicates, claims are required to be cast in clear—as opposed to ambiguous, vague, indefinite—terms. It is the claims that notify the public of what is within the protections of the patent, and what is not.' ” MPEP § 2173.02(II) (quoting In re Packard, 751 F.3d 1307, 1313, 110 USPQ2d 1785, 1788 (Fed. Cir. 2014)).
Regarding Claim 1: Claim 1 states, in relevant part, “wherein the first storage capacitor is disposed in the emission area in which the driving transistor is not disposed and which emits light.” It is unclear whether the phrase “which emits light” refers to either (1) the first storage capacitor, or (2) the emission area in which the driving transistor is not disposed. For the purposes of examination, the claim has been interpreted in accordance with interpretation (2).
Claims 1-6, 8-13, and 15, which depend from claim 1, are rejected under § 112(b) for at least the same reasons as claim 1.
Applicant may cancel the claims, amend the claims, or present a sufficient showing that the claims comply with the statutory requirements.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 1-5, 9, 10, 15-17, and 19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by U.S. Patent Publication No. 2015/0179724 (published June 25, 2015) (hereinafter “Lee”).
Regarding independent claim 1, Lee discloses: A display device, comprising: a
Substrate (FIG. 2, substrate 110, [0033]) including an emission area (FIG. 2, the area under the light emitting diode De, [0010]) and a non-emission area (FIG. 2, the area not under the light emitting diode De), the emission area comprising a sub-pixel (FIG. 2, depicting a pixel region P, [0032]);
a light emitting element in the emission area (FIG. 2, light emitting diode De), the light emitting element configured to emit light (FIG. 2, [0012]: “The light emitting diode De emits light due to the current supplied through the driving thin film transistor Td from the high voltage supply VDD.”);
a driving transistor in the non-emission area (FIG. 2, depicting a portion of the driving tft Td in the area not under the light emitting diode De, [0052]), the driving transistor configured to drive the light emitting element (FIG. 2, [0012]: “The light emitting diode De emits light due to the current supplied through the driving thin film transistor Td from the high voltage supply VDD.”);
a first storage capacitor in the emission area (FIG. 2, e.g., first capacitor C1, at least a portion of which is in the area under the light emitting diode De, [0043]); and
a second storage capacitor in the non-emission area (FIG. 2, e.g., second capacitor C2, at least a portion of which is in the area not under the light emitting diode De, [0043]),
wherein the first storage capacitor is disposed in the emission area in which the driving transistor is not disposed and which emits light (FIG. 2, depicting wherein the capacitor C1 is disposed in an area under the light emitting diode De in which the driving transistor is not disposed).
Regarding claim 2, Lee further discloses a buffer layer on the substrate (FIG. 2, buffer layer 120, [0034]), wherein the first storage capacitor includes a first capacitor electrode between the substrate and the buffer layer (FIG. 2, depicting first capacitor electrode 116 between the insulating substrate 110 and the capacitor electrode 116, [0033]).
Regarding claim 3, Lee further discloses wherein the driving transistor comprises an active layer (FIG. 2, oxide semiconductor layer 122, [0035]), the display device further comprising: a light blocking layer in the non-emission area (FIG. 2, light-blocking layer 112 in the area not under the light emitting diode De, [0035]), the light blocking layer between the substrate and the active layer of the driving transistor (FIG. 2, depicting wherein the light-blocking layer 112 is between the insulating substrate 110 and the oxide semiconductor layer 122), wherein the first storage capacitor is on a same layer as the light blocking layer (FIG. 2, depicting wherein the light blocking layer 112 and the capacitor electrode 116 are on a same layer).
Regarding claim 4, Lee further discloses wherein the first storage capacitor further includes a second capacitor electrode on the buffer layer (FIG. 2, capacitor electrode 136 on the buffer layer 120), the second capacitor electrode overlapping the first capacitor electrode (FIG. 2, depicting wherein the capacitor electrode 136 overlaps the capacitor electrode 116).
Regarding claim 5, Lee further discloses wherein the second capacitor electrode is on a same layer as the active layer of the driving transistor (FIG. 2, depicting wherein the capacitor electrode 136 is on a same layer as the oxide semiconductor layer 122).
Regarding claim 9, Lee further discloses wherein an area of the first capacitor electrode is greater than an area of the second capacitor electrode (FIG. 2, depicting wherein an area of the capacitor electrode 116 is greater than an area of the capacitor electrode 136).
Regarding claim 10, Lee further discloses wherein the second storage capacitor includes: a third capacitor electrode extending from the first capacitor electrode and on a same layer as the first capacitor electrode (FIG. 2, depicting wherein a portion of the capacitor electrode 116, e.g., a left portion, may be considered a “first capacitor electrode” and a portion of the capacitor electrode 116, e.g., a right portion, may be considered a “third capacitor electrode” that extends from and is on a same layer as the left portion); and a fourth capacitor electrode extending from the second capacitor electrode and on a same layer as the second capacitor electrode (FIG. 2, depicting wherein a portion of the capacitor electrode 136, e.g., a left portion, may be considered a “second capacitor electrode” and a portion of the capacitor electrode 136, e.g., a right portion, may be considered a “fourth capacitor electrode” that extends from and is on a same layer as the left portion).
Regarding claim 15, Lee further discloses wherein the second storage capacitor further includes a fifth capacitor electrode (FIG. 2, capacitor electrode 156, [0041]) that overlaps the fourth capacitor electrode and is on a same layer as a gate electrode of the driving transistor (FIG. 2, depicting wherein the capacitor electrode 156 is on a same layer as the gate electrode 132 and overlaps the right portion of the capacitor electrode 136).
Regarding independent claim 16, Lee discloses: A display device, comprising: a substrate (FIG. 2, substrate 110, [0033]) having an emission area (FIG. 2, the area under the light emitting diode De, [0010]) and a non-emission area (FIG. 2, the area not under the light emitting diode De);
a light emitting element on the substrate in the emission area (FIG. 2, light emitting diode De), the light emitting element configured to emit light (FIG. 2, [0012]: “The light emitting diode De emits light due to the current supplied through the driving thin film transistor Td from the high voltage supply VDD.”);
a driving transistor on the substrate in the non-emission area (FIG. 2, depicting a portion of the driving tft Td in the area not under the light emitting diode De, [0052]), the driving transistor configured to drive the light emitting element (FIG. 2, [0012]: “The light emitting diode De emits light due to the current supplied through the driving thin film transistor Td from the high voltage supply VDD.”);
a first electrode on the substrate (FIG. 2, capacitor electrode 116, [0033]), the first electrode having a first portion in the emission area and a second portion in the non-emission area (FIG. 2, depicting wherein a portion of the capacitor electrode 116, e.g., a left portion, may be considered a “first capacitor electrode” and a portion of the capacitor electrode 116, e.g., a right portion, may be considered a “third capacitor electrode” that extends from and is on a same layer as the left portion);
a second electrode on the substrate, the second electrode having a first portion in the emission area and a second portion in the non-emission area (FIG. 2, depicting wherein a portion of the capacitor electrode 136, e.g., a left portion, may be considered a “second capacitor electrode” and a portion of the capacitor electrode 136, e.g., a right portion, may be considered a “fourth capacitor electrode” that extends from and is on a same layer as the left portion),
wherein the first portion of the first electrode and the first portion of the second electrode overlap each other in the emission area such that a first storage capacitor is in the emission area (FIG. 2, depicting wherein the first portions of the capacitor electrodes 116/136 overlap in the area under the light emitting diode De), and the second portion of the first electrode and the second portion of the second electrode overlap each other in the non- emission area such that a second storage capacitor is in the non-emission area (FIG. 2, depicting wherein the second portions of the capacitor electrodes 116/136 overlap in the area not under the light emitting diode De), and
wherein the first storage capacitor is disposed in the emission area in which the driving transistor is not disposed and which emits light (FIG. 2, depicting wherein the capacitor C1 is disposed in an area under the light emitting diode De in which the driving transistor is not disposed).
Regarding claim 17, Lee further discloses wherein the first portion and the second portion of the second electrode are directly on the substrate (FIG. 2, depicting wherein the first and second portions of the capacitor electrode 116 are directly on the insulating substrate 110).
Regarding claim 19, Lee further discloses a gate insulating layer on the first electrode (FIG. 2, gate insulating layer 130, [0036]); and a third electrode on the gate insulating layer in the non-emission area, the third electrode overlapping the second portion of the first electrode (FIG. 2, capacitor electrode 156 on the gate insulating layer 130 and overlapping the second portion of the electrode 116).
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 6, 8, 12, 13, and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Lee in view of U.S. Patent Publication No. 2022/0416195 (filed May 5, 2021) (hereinafter “Zhang”).
Regarding claim 6, Lee does not specifically disclose wherein the second capacitor electrode comprises a transparent oxide layer.
In the same field of endeavor, Zhang discloses a display device including an electrode (FIG. 2, electrode 2, [0068]) comprising a plurality of stacked conductive layers, wherein one conductive layer comprises a light blocking metal material (FIG. 2, top conductive layer 21, [0068]) and another conductive layer comprises a transparent conductive oxide material (FIG. 2, top conductive layer 22, [0068]). Regarding the configuration of the electrode, in [0068], Zhang states: “Therefore, in order to avoid oxidation corrosion of the patterned first electrodes, in the display panel provided by the embodiment of the present disclosure, as shown in FIG. 2 , each first electrode 2 includes two conductive layers arranged in a stacked manner. A material of the top conductive layer 22 may include one or a combination of ITO, IZO, IGZO, TiN or Mo, and a material of the bottom conductive layer 21 may include one or a combination of Al, AlNd, Mo, Ti or TiN.”
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the capacitor electrode 136 of Lee by substituting the electrode configuration of Zhang in order to improve corrosion resistance of the light shielding layer. See Zhang [0068].
Regarding claim 8, Lee does not specifically disclose wherein the first capacitor electrode comprises a transparent conductive material.
In the same field of endeavor, Zhang discloses a display device including an electrode (FIG. 2, electrode 2, [0068]) comprising a plurality of stacked conductive layers, wherein one conductive layer comprises a light blocking metal material (FIG. 2, top conductive layer 21, [0068]) and another conductive layer comprises a transparent conductive oxide material (FIG. 2, top conductive layer 22, [0068]). Regarding the configuration of the electrode, in [0068], Zhang states: “Therefore, in order to avoid oxidation corrosion of the patterned first electrodes, in the display panel provided by the embodiment of the present disclosure, as shown in FIG. 2 , each first electrode 2 includes two conductive layers arranged in a stacked manner. A material of the top conductive layer 22 may include one or a combination of ITO, IZO, IGZO, TiN or Mo, and a material of the bottom conductive layer 21 may include one or a combination of Al, AlNd, Mo, Ti or TiN.”
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the capacitor electrode 116 of Lee by substituting the electrode configuration of Zhang in order to improve corrosion resistance of the light shielding layer. See Zhang [0068].
Further, Lee does not specifically disclose wherein the second capacitor electrode comprises a transparent conductive material.
In the same field of endeavor, Zhang discloses a display device including an electrode (FIG. 2, electrode 2, [0068]) comprising a plurality of stacked conductive layers, wherein one conductive layer comprises a light blocking metal material (FIG. 2, top conductive layer 21, [0068]) and another conductive layer comprises a transparent conductive oxide material (FIG. 2, top conductive layer 22, [0068]). Regarding the configuration of the electrode, in [0068], Zhang states: “Therefore, in order to avoid oxidation corrosion of the patterned first electrodes, in the display panel provided by the embodiment of the present disclosure, as shown in FIG. 2 , each first electrode 2 includes two conductive layers arranged in a stacked manner. A material of the top conductive layer 22 may include one or a combination of ITO, IZO, IGZO, TiN or Mo, and a material of the bottom conductive layer 21 may include one or a combination of Al, AlNd, Mo, Ti or TiN.”
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the capacitor electrode 136 of Lee by substituting the electrode configuration of Zhang in order to improve corrosion resistance of the light shielding layer. See Zhang [0068].
Regarding claim 12, Lee does not specifically disclose wherein the third capacitor electrode comprises a transparent oxide layer and a metal layer that is stacked on the transparent oxide layer.
In the same field of endeavor, Zhang discloses a display device including an electrode (FIG. 2, electrode 2, [0068]) comprising a plurality of stacked conductive layers, wherein one conductive layer comprises a light blocking metal material (FIG. 2, top conductive layer 21, [0068]) and another conductive layer comprises a transparent conductive oxide material (FIG. 2, top conductive layer 22, [0068]). Regarding the configuration of the electrode, in [0068], Zhang states: “Therefore, in order to avoid oxidation corrosion of the patterned first electrodes, in the display panel provided by the embodiment of the present disclosure, as shown in FIG. 2 , each first electrode 2 includes two conductive layers arranged in a stacked manner. A material of the top conductive layer 22 may include one or a combination of ITO, IZO, IGZO, TiN or Mo, and a material of the bottom conductive layer 21 may include one or a combination of Al, AlNd, Mo, Ti or TiN.”
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the capacitor electrode 116 of Lee by substituting the electrode configuration of Zhang in order to improve corrosion resistance of the light shielding layer. See Zhang [0068].
Regarding claim 13, Lee does not specifically disclose wherein the fourth capacitor electrode comprises a transparent oxide layer.
In the same field of endeavor, Zhang discloses a display device including an electrode (FIG. 2, electrode 2, [0068]) comprising a plurality of stacked conductive layers, wherein one conductive layer comprises a light blocking metal material (FIG. 2, top conductive layer 21, [0068]) and another conductive layer comprises a transparent conductive oxide material (FIG. 2, top conductive layer 22, [0068]). Regarding the configuration of the electrode, in [0068], Zhang states: “Therefore, in order to avoid oxidation corrosion of the patterned first electrodes, in the display panel provided by the embodiment of the present disclosure, as shown in FIG. 2 , each first electrode 2 includes two conductive layers arranged in a stacked manner. A material of the top conductive layer 22 may include one or a combination of ITO, IZO, IGZO, TiN or Mo, and a material of the bottom conductive layer 21 may include one or a combination of Al, AlNd, Mo, Ti or TiN.”
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the capacitor electrode 136 of Lee by substituting the electrode configuration of Zhang in order to improve corrosion resistance of the light shielding layer. See Zhang [0068].
Regarding claim 18, Lee discloses wherein the first portion and the second portion of the first electrode are on the semiconductor layer (FIG. 2, depicting wherein the first and second portions of the capacitor electrode 116 are on the oxide semiconductor layer 122).
Lee does not specifically disclose a light blocking layer between the buffer layer and the second electrode in the non-emission area.
In the same field of endeavor, Zhang discloses a display device including an electrode (FIG. 2, electrode 2, [0068]) comprising a plurality of stacked conductive layers, wherein one conductive layer comprises a light blocking metal material (FIG. 2, top conductive layer 21, [0068]) and another conductive layer comprises a transparent conductive oxide material (FIG. 2, top conductive layer 22, [0068]). Regarding the configuration of the electrode, in [0068], Zhang states: “Therefore, in order to avoid oxidation corrosion of the patterned first electrodes, in the display panel provided by the embodiment of the present disclosure, as shown in FIG. 2 , each first electrode 2 includes two conductive layers arranged in a stacked manner. A material of the top conductive layer 22 may include one or a combination of ITO, IZO, IGZO, TiN or Mo, and a material of the bottom conductive layer 21 may include one or a combination of Al, AlNd, Mo, Ti or TiN.”
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the capacitor electrode 136 of Lee by substituting the electrode configuration of Zhang in order to improve corrosion resistance of the light shielding layer. See Zhang [0068].
Moreover, substitution of the capacitor electrode configuration would result in at least one light blocking layer between the buffer layer 120 and other layers of the capacitor electrode 136 in the area not under the light emitting diode De.
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Shim in view of U.S. Patent Publication No. 2018/0061908 (published Mar. 1, 2018) (hereinafter “Shim”).
Regarding claim 11, Lee does not specifically disclose wherein the third capacitor electrode is integrally formed with the light blocking layer.
In the same field of endeavor, Shim discloses a display device including a light blocking layer and a third capacitor electrode, wherein the third capacitor electrode is integrally formed with the light blocking layer. Regarding the configuration of the light shielding layer, in [0053], Shim states: “Alternatively, as shown in FIG. 4, the light shielding layer LS may be disposed below the channel region of the driving transistor DR and below channel regions of the switching transistor SW and the sensing transistor ST.” Shim further states in [0054]: “The light shielding layer LS may be used for shielding the external light as shown in FIG. 3. In addition, the light shielding layer LS may be connected to another electrode or another line and used as an electrode constituting the capacitor, and the like.”
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the capacitor electrode 116 of Lee by substituting the light shielding layer configuration of Shim in order to enable the electrode to shield the device from external light as well as act as a capacitor electrode. See Shim [0053]-[0054].
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ADAM D WEILAND whose telephone number is (703)756-4760. The examiner can normally be reached Monday - Friday 9am-5pm.
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/ADAM D WEILAND/Examiner, Art Unit 2813
/STEVEN B GAUTHIER/Supervisory Patent Examiner, Art Unit 2813
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