DETAILED ACTION
This Final Office action is in response to Applicant’s Amendment filed on 08/12/2025. Claims 1-3 and 6-18 are pending. The effective filing date of the claimed invention is 08/08/2023.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-3, 6-18 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites “an application specific integrated circuit (ASIC)” in line 24, and “the application specific integrated circuit” in line 28-29. Initially, in line 24 Applicant appears to define as “ASIC” thereby signaling that each recitation following will refer to “ASIC” as meaning “an application specific integrated circuit.” However, later, Applicant recites “the application specific integrated circuit” without the previously-recited “ASIC” acronym. This renders the claim indefinite as it is unclear why Applicant has not recited the prior ASIC as the whole term, or included ASIC in line 29, rendering the scope unascertainable. See also, claim 1, last two lines, recites “the application specific integrated circuit.” Appropriate correction is required.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1, 6, 8-10, 12, 13, 17, and 18 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Pat. Pub. No. 2014/0251029 to Gudan (“Gudan”) in view of ON Semiconductor (2014). Using MOSFETs in Load Switch Applications, Publication Order Number AND9093/D, retrieved by the examiner on 101/5/2025 from https://www.onsemi.com/pub/collateral/and9093-d.pdf (referred to as “ON”).
With regard to claim 1, Gudan discloses the claimed shelf power control circuit comprising:
a power source configured to supply power (e.g. [0014], [0045], [0050]);
a status sensor configured to detect a status change of products on a shelf (see e.g. [0050] In one embodiment, the sensor 131 is placed on a shelf, and items on the shelf are placed on top of the sensor 131 so that the sensor 131 is configured to detect presence of the items as described below in more detail with reference to FIG. 2.);
a status detection circuit coupled to the status sensor and the power source, and configured to generate an enabling signal when the status sensor detects the status change of the products (see e.g. [0051] common signal; [0052] For example, the common signal is a low-current low-power signal. It can be sourced continuously, or sourced only when the state of the switches needs to be determined. (emphasis added));
a switch coupled to the power source and the status detection circuit, and configured to be turned on when receiving the enabling signal and turned off when receiving a disabling signal (see e.g. [0067] [0052] [0069] Fig. 3E); and
a control signal detection circuit coupled to the switch, and configured to generate the disabling signal when the control signal detection circuit is activated (see e.g. [0069]; [0072-73] the detection result for a zone includes one or more of a zone ID that identifies the zone, a switch closure status in the zone (e.g., no switch in the zone being closed, at least one switch in the zone being closed, or, all the switches in the zone being closed, etc.), a stock status in the zone (e.g., the stock status is full, the stock status is empty, one or more items are in stock (this can be characterized as having the presence of at least one item in the zone but it is not full), etc.) and an item ID that identifies the item placed on the shelf, etc. In other embodiments, the detection result may include other data associated with the zone. The detection result may also include other data describing the zone and/or items present in the zone. (emphasis added)).
a pressure sensor configured to detect an amount of products on the shelf (see e.g. abstract, and throughout; abstract, The disclosure includes a system and method for implementing a wide-area pressure sensor with reduced power consumption; stock status at e.g. [0054] For example, the stock status application 109 determines a stock status in each zone (e.g., zones 1 and 2 have full stock, zones 3 and 4 have empty stock, etc.). Optionally, the stock status application 109 sends a notification to the server 101 or the client device 105 based on the stock status in each zone.; [0070] etc.); and
an application specific integrated circuit (ASIC) coupled to the switch and the pressure sensor, and configured to convert the amount of products on the shelf to an existing quantity of products on the shelf (see e.g. [0053-54], Figs. 1-2)
a micro control unit (MCU) coupled to the ASIC and the control signal detection circuit, and configured to turn on the control signal detection circuit after receiving the existing quantity of products on the shelf from the application specific integrated circuit (see e.g. [0050-51] [0056] [0067-68] [0092])
As amended, Gudan does not appear to explicitly disclose that when the circuit is turned on, it is configured to generate the disabling signal. ON teaches at e.g. page 2, a standard load-switch control where a small-signal NMOS Q1 is driven by a logic EN input (see ON, page 2, “When EN is HIGH, Q1 turns on and pulls the pass transistor’s gate to ground, so the load switch turns off.” (emphasis added). In other words, turning on the control transistor actively generates the disabling condition for the power pass device. Therefore, it would have been obvious to one of ordinary skill in the circuit art to modify Gudan’s pressure sensor system with circuit, to include the ability to have circuit coupled to switch, and configured to generate the disabling signal when the control signal circuit is turned on, as shown in ON, where this is performed in order to reduce power consumption in a battery powered shelf sensor by adopting known enable/disable circuits from load-switch design. See ON, throughout.
With regard to claim 6, Gudan further discloses: an electronic paper or other display device coupled to the MCU, and configured to receive information of the products from the MCU and display the information of the products ([0048] [0056]).
With regard to claim 8, Gudan further discloses a server linked to the MCU, and configured to receive the existing quantity of products on the shelf from the MCU (see e.g. [0045-49]).
With regard to claim 9, Gudan further discloses where the server is linked to the MCU through Bluetooth (see e.g. [0046] Bluetooth).
With regard to claim 10, Gudan further discloses where the server is linked to the MCU through Wi-Fi (see e.g. [0046-48], [0058-59]).
With regard to claim 12, Gudan further discloses a first resistor having a first end coupled to an output end of the switch, and a second end coupled to an output end of the status detection circuit (see e.g. [0099] the wires that connect switch contact points etc.).
With regard to claim 13, Gudan further discloses where the control signal detection circuit comprises a switch (see e.g. abstract).
With regard to claim 17, Gudan further discloses where the MCU is coupled to an output end of the switch (see e.g. [0006], [0051] etc.).
With regard to claim 18, Gudan further discloses a third resistor coupled between the power source and an output end of the status detection circuit (see above where connected with wires/resistors).
Claim(s) 2-3, 7, and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Gudan, ON, in further view of U.S. Pat. Pub. No. 2019/0087359 to Litichever et al. (“Litichever”).
With regard to claims 2-3, 7, and 11, Gudan does not disclose the limitations of claims 9 and 10. However, these sensors were known at the time of filing. One reference to show that is Litichever. Litichever teaches at e.g. [0252-253] that it would have been obvious to one of ordinary skill in the sensor art to include the ability to use piezoelectric and triboelectric sensors. Further, for claims 71 and 11, Litichever further teaches SPI at [0138] and i2C at many paragraphs such as [0170], where this is beneficial in that the communication can occur over SPI and/or I2C, as shown in Litichever. Therefore, it would have been obvious to one of ordinary skill in the status detection art to use such piezo – tribo- electric sensors, and use such SPI and I2C for better communication, as shown in Litichever, where the added benefit is that the sensors can use such methods to detect changes in status and the use of piezo and tribo electric sensors are more ways to collect such data.
Claim(s) 14-16 are rejected under 35 U.S.C. 103 as being unpatentable over Gudan, ON, in further view of U.S. Pat. Pub. No. 2013/0082742 to Ren et al. (“Ren”).
With regard to claims 14-16, Gudan does not teach claims 14-16. Ren teaches at e.g. [0038] [0046][0047] [0061] that it would have been obvious to include NMOS with drain to connect to other elements as shown in [0038] [0046][0047] [0061], where this is beneficial in that it utilizes the benefits of the NMOS in association with the sensor and other elements, as described in Ren. For claim 16, Gudan further discloses where the wires are the various resistors, as shown above. Therefore, it would have been obvious to one of ordinary skill in the sensor art to include the ability to have an NMOS with drawn connected into the circuit as this provides the inherent benefits of adding an NMOS to the circuit, as shown in Ren at e.g. [0046].
Response to Arguments
Applicant’s arguments with respect to the claims have been considered but are moot because of the new ground of rejection. See where the examiner has converted from 102 to 103 based on the amended language of activated to “turned on.”
Conclusion
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/PETER LUDWIG/Primary Examiner, Art Unit 3627
1 Gudan further discloses where the electronic paper or other display device is coupled to the MCU through a serial peripheral interface (SPI) (see e.g. where all devices are communicatively coupled via the bus 220; [0051] The microcontroller 133 is a computing device implemented on a single integrated circuit that includes a processor, a memory and one or more programmable input/output peripherals.).