DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 11/22/23 was filed in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Arbabi et al. (US 2024/0393628 A1) and Kojima et al. (US 2023/0367997 A1).
Re. Claims 1-5, 9, Arbabi et al. discloses a reconfigurable optical processor for directing multiple optical beams to various output ports, comprising:
a minimum of two input ports 110 designed to accept multiple input beams (Fig. 1(a); [0046]);
a tunable nanophotonic structure, characterized by:
its ability to direct the multiple input beams into at least two distinct beams, wherein each route is tailored to transmit one primary wavelength of the input beams ([0018]; [0054]),
a silicon-on-insulator substrate 108 (Fig. 1(b); [0047]),
a silicon core laid out on the substrate 108 (Fig. 1(b); [0017], [0048]),
an upper layer (e.g., cover; Fig. 1(b)),
supporting structures (e.g., spacers) connecting the substrate 108 to the upper layer (Fig. 1(b)),
a controllable refractive index liquid-crystal layer 112, filling the voids between the substrate, supporting structures, and the upper layer (Fig. 1(b); [0046]); and
a minimum of two output ports 114 for the transmission of the beams directed through their respective routes (Fig. 1(a); [0046]).
Arbabi et al. discloses an arrangement comprising an array of electrode segments to form the varying refractive index distribution across the processor, wherein the electrode segments have the capability to reconfigure the specific routes upon the application of an electric field to the controllable refractive index layer. However, Arbabi et al. does not disclose an alternative arrangement instead comprising a plurality of distinct core segments, a top electrode located on the upper layer, and an electrode which is separated from the top electrode, wherein the core segments have the capability to reconfigure the specific routes upon the application of an electric field to the controllable refractive index layer, utilizing the top electrode and electrode interfacing with the substrate.
Kojima et al. discloses a reconfigurable optical processor (abstract) comprising a plurality of distinct core segments 1220, a top electrode 1230, and an electrode 1200 which is separated from the top electrode 1230, wherein the core segments 1220 have the capability to reconfigure the specific routes upon the application of an electric field to a controllable refractive index layer 1130, utilizing the top electrode 1230 and electrode 1200 interfacing with substrate (Fig. 11B; [0050], [0052]-[0053]).
The claimed arrangement would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention, as Kojima et al. discloses the arrangement comprising a plurality of core segments, top electrode, and substrate electrode achieves a wavelength splitter allows for more sophisticated optimization problems (Kojima et al.: [0003]), and creates a non-volatile device not requiring continuous voltage application (Kojima et al.; [0062]).
Re. Claim 6, Arbabi et al. and Kojima et al. render obvious the reconfigurable optical processor as discussed above. Kojima et al. also discloses a controllable refractive index layer 1130 is covered by an electrode 1230 (Fig. 11B; [0052]). The claimed arrangement would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention for the reasons discussed above.
Re. Claim 7, Arbabi et al. and Kojima et al. render obvious the reconfigurable optical processor as discussed above. Kojima et al. also discloses the controllable refractive index layer 1130 includes of ferroelectric LC 1230 (Fig. 11B; [0052]). The claimed arrangement would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention for the reasons discussed above.
Re. Claim 8, Arbabi et al. and Kojima et al. render obvious the reconfigurable optical processor as discussed above. Kojima et al. also discloses the controllable refractive index layer includes of a chalcogenide material ([0063]). The claimed arrangement would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention for the reasons discussed above.
Re. Claim 10, Arbabi et al. and Kojima et al. render obvious the reconfigurable optical processor as discussed above. Kojima et al. also discloses the waveguide layer 1220 comprises of silicon nitride (Fig. 11B; [0054]). The claimed arrangement would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention for the reasons discussed above.
Re. Claim 11, Arbabi et al. and Kojima et al. render obvious the reconfigurable optical processor as discussed above. Kojima et al. also discloses the signal at each output port is a differential signal at two separate wavelength (Figs. 12A-12B; [0059]-[0060]). The claimed arrangement would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention for the reasons discussed above.
Re. Claim 12, Arbabi et al. and Kojima et al. render obvious the reconfigurable optical processor as discussed above. Kojima et al. also discloses the nanophotonic structure has the size of at least 4.5 µm x 4.5 µm ([0055]). The claimed arrangement would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention for the reasons discussed above.
Re. Claim 13, Arbabi et al. and Kojima et al. render obvious the reconfigurable optical processor as discussed above. Kojima et al. also discloses the inverse design process of the nanophotonic structure includes the evaluation function substantially similar to [T1(λ1) + T2(λ2) - T1(λ2) - T2(λ1)] LC=ON - [T1(λ1) + T2(λ2) - T1(λ2) - T2(λ1)] LC=OFF, where T1 and T2 are the transmission characteristics from one of the input ports to two separate output ports 1 and 2, λ1 and λ2 are the two distinct wavelength, and LC=ON is a state where the liquid state is in the ON state, while LC=OFF is a state where LC is in the OFF state ([0050]-[0051]). The claimed arrangement would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention for the reasons discussed above.
Re. Claim 13, Arbabi et al. and Kojima et al. render obvious the reconfigurable optical processor as discussed above. Kojima et al. also discloses the transmission spectrum from one of the input ports to one of the output ports has at least two valleys while that to another output port has at least two peaks, wherein the peaks and valleys move in the same direction with respect to the wavelength according to the refractive index change of the layer covering the nanophotonic structure (Figs. 12A-12B; [0061]). The claimed arrangement would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention for the reasons discussed above.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. See the attached PTO-892.
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/RHONDA S PEACE/Primary Examiner, Art Unit 2874 9/15/25