DETAILED ACTION
A response was received on 09 June 2026. By this response, Claims 1, 3-6, 8-11, 13, 14, and 17-20 have been amended. Claim 12 has been canceled. No new claims have been added. Claims 1, 3-6, 8-11, 13, 14, and 17-20 are currently pending in the present application.
Response to Arguments
Applicant’s arguments with respect to the rejection of Claims 1, 3-6, 8-14, and 17-20 under 35 U.S.C. 103 have been considered but are moot in view of the new grounds of rejection set forth below.
Claim Objections
Claims 1 and 9 are objected to because of the following informalities:
Claim 1 recites “a boot procedure” in line 5. It appears that this should read “the boot procedure” for antecedent reference to the boot procedure now recited in line 2.
In Claim 1, last line, the comma after “wherein” should be deleted.
Claim 9 recites “the second sub-system” in line 4. There is not clear antecedent basis for this limitation in the claims; it appears that this should read “a second sub-system”.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The rejection of Claims 1 and 3-5 under 35 U.S.C. 112(b) as indefinite is withdrawn in light of the amendments to the claims.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 9, 10, 13, 14, and 17-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 9 recites “restart the timer in response to the register being set to the first value again” in line 9. It is not clear to which time that the register is set to the first value again is being referred; the claims recited setting the register to the first value again in both Claim 6, line 20, and Claim 9, line 7. This ambiguity renders the claim indefinite.
Claim 13 recites “substantially simultaneously” in lines 2-3. This is a relative term; however, neither “substantially” nor “simultaneously” has been clearly defined in the claims or specification, and the specification also does not clearly provide a standard of comparison as to how close in time the actions must occur to be considered to be substantially simultaneous. See also MPEP § 2173.05(b).
Claim 14 recites “and restart the timer” in lines 17 and 27. It is not grammatically clear what this phrase is intended to modify or be coordinated with, and it is not clear what the subject of the verb “restart” is intended to be.
Claim 18 recites “and restart the timer” in line 7. It is not grammatically clear what this phrase is intended to modify or be coordinated with, and it is not clear what the subject of the verb “restart” is intended to be.
Claims not explicitly referred to above are rejected due to their dependence on a rejected base claim.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3-6, 8-11, 13, 14, and 17-20 are rejected under 35 U.S.C. 103 as being unpatentable over Spangler, US Patent 2022/0179960, Miyamoto, US Patent 11188321, Sanchez Diaz et al, US Patent 10719606, and Ozawa et al, US Patent 11657125.
In reference to Claim 1, Spangler discloses a method that includes receiving from a first sub-system and at a second sub-system, a request to verify firmware to be executed in association with a boot procedure (for example, see paragraph 0086, see also paragraph 0016); sending a first signal to the first sub-system to place it into a first state to prevent it from further performing the boot procedure (paragraph 0015); and responsive to verifying the firmware, sending a second signal to the first sub-system to place it into a second state that allows it to execute the firmware (paragraph 0015; see also paragraphs 0048 and 0111). However, Spangler does not explicitly disclose receiving plural requests to verify first and second firmware and verifying the first and second firmware, and further, Spangler does not explicitly disclose setting a register to a first value to place the first sub-system into the first state.
Miyamoto discloses a method that includes receiving requests to verify first and second firmware (column 4, line 65-column 5, line 14, verifying security firmware 8SP; column 6, lines 8-30, verifying other firmware 8 by the security firmware) and sending a first signal to set a register to a first value to place a first sub-system into a first state (see throughout the figures, access disable register 11, as well as other registers in Figures 4 and 9-11; see also column 6, lines 59-64, access disable register specifies whether fetch of firmware is permitted, and column 7, line 49-column 8, line 17, where the access disable register prohibits fetch of the firmware until verification is complete, where setting the access disable register to prohibit fetch constitutes the first value placing the system into the first state). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to repeat the steps of suspending the boot process for each firmware verification (as in Miyamoto, at least two verifications) to prevent execution of potentially corrupted or malicious firmware (see Spangler, paragraph 0073), and it further would have been obvious to set a register to a first value to place the system into the first state as taught by Miyamoto, in order to help prevent unauthorized and malicious software from being executed (see Miyamoto, column 1, lines 62-64).
However, neither Spangler nor Miyamoto explicitly discloses a timer. Sanchez Diaz discloses a method that includes a timer and sending the signal if verification occurred within a particular time period and terminating the boot procedure if verification did not occur within the particular time period (see column 4, line 59-column 5, line 38). Further, Ozawa discloses a method that includes a timer and restarting the timer after completing each step of verification during a boot procedure and terminating the boot procedure if verification did not occur within a particular time period (see Figure 6, watchdog timer 133, and steps S603, start time keeping, and S613, S623, and S 653, restart timekeeping; see also Figures 9 and 11; see further column 10, line 15-column 11, line 34). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to further modify the method of Spangler and Miyamoto to include the timer of Sanchez Diaz, in order to allow performing further actions if there is a problem with authentication (see Sanchez Diaz, column 5, lines 19-38) as well as to include the restarting of the timer for each step of verification as taught by Ozawa, in order to avoid prematurely forcing an unintended reset of the system during the boot procedure (see Ozawa, column 1, lines 47-59; see also column 6, lines 20-39).
In reference to Claim 3, Spangler, Miyamoto, Sanchez Diaz, and Ozawa further disclose a timer included in the second sub-system (see Sanchez Diaz, column 4, line 59-column 5, line 38; and Ozawa, watchdog timer 133).
In reference to Claim 4, Spangler, Miyamoto, Sanchez Diaz, and Ozawa further disclose sending the second signal responsive to verifying the first firmware prior to the timer reaching the limit (see Spangler, paragraph 0015, continuing boot process; see also Sanchez Diaz, column 4, line 59-column 5, line 38, and Ozawa, column 10, line 15-column 11, line 34, verification before timer expires).
In reference to Claim 5, Spangler, Miyamoto, Sanchez Diaz, and Ozawa further disclose terminating the boot procedure if the firmware is not verified prior to the timer reaching the limit (Sanchez Diaz, column 4, line 59-column 5, line 38, and Ozawa, column 10, line 15-column 11, line 34, terminating if timer expires).
In reference to Claim 6, Spangler discloses an apparatus that includes a processor and memory that includes instructions that cause the processor to, in response to a request from a first sub-system to verify firmware to be executed during a boot procedure (for example, see paragraph 0086, see also paragraph 0016), place a first sub-subsystem into a first state to prevent it from further performing the boot procedure (paragraph 0015; see also paragraphs 0048 and 0111); and responsive to verifying the firmware, placing the first sub-system into a second state to allow it to execute the firmware (paragraph 0015; see also paragraphs 0048 and 0111). Although Spangler discloses verifying firmware, Spangler does not explicitly disclose verifying a bootloader, and does not explicitly recite receiving plural requests to verify both the bootloader and secure firmware, and further, Spangler does not explicitly disclose setting a register to a first value to place the first sub-system into the first state.
Miyamoto discloses a method that includes receiving requests to verify first and second firmware (column 4, line 65-column 5, line 14, verifying security firmware 8SP; column 6, lines 8-30, verifying other firmware 8 by the security firmware) and sending a first signal to set a register to a first value to place a first sub-system into a first state (see throughout the figures, access disable register 11, as well as other registers in Figures 4 and 9-11; see also column 6, lines 59-64, access disable register specifies whether fetch of firmware is permitted, and column 7, line 49-column 8, line 17, where the access disable register prohibits fetch of the firmware until verification is complete, where setting the access disable register to prohibit fetch constitutes the first value placing the system into the first state). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to repeat the steps of suspending the boot process for each firmware verification (as in Miyamoto, at least two verifications) to prevent execution of potentially corrupted or malicious firmware (see Spangler, paragraph 0073), and it further would have been obvious to set a register to a first value to place the system into the first state as taught by Miyamoto, in order to help prevent unauthorized and malicious software from being executed (see Miyamoto, column 1, lines 62-64).
However, although Spangler discloses verifying firmware and Miyamoto discloses verifying first and second firmware, neither Spangler nor Miyamoto explicitly discloses verifying a bootloader. Further, neither Spangler nor Miyamoto explicitly discloses a timer. Sanchez Diaz discloses preventing boot until bootloader code is verified in a similar manner as Spangler and Miyamoto disclose preventing boot until secure firmware is verified (see column 3, line 45-column 4, line 35), and Sanchez Diaz also discloses a timer and sending the signal if verification occurred within a particular time period and terminating the boot procedure if verification did not occur within the particular time period (see column 4, line 59-column 5, line 38). Further, Ozawa discloses a method that includes a timer and restarting the timer after completing each step of verification during a boot procedure and terminating the boot procedure if verification did not occur within a particular time period (see Figure 6, watchdog timer 133, and steps S603, start time keeping, and S613, S623, and S 653, restart timekeeping; see also Figures 9 and 11; see further column 10, line 15-column 11, line 34). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to further modify the teachings of Spangler and Miyamoto to repeat the steps of suspending the boot process for verification of both the firmware and the bootloader, to prevent execution of potentially corrupted or malicious firmware (see Spangler, paragraph 0073). Further, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to further modify the method of Spangler and Miyamoto to include the timer of Sanchez Diaz, in order to allow performing further actions if there is a problem with authentication (see Sanchez Diaz, column 5, lines 19-38) as well as to include the restarting of the timer for each step of verification as taught by Ozawa, in order to avoid prematurely forcing an unintended reset of the system during the boot procedure (see Ozawa, column 1, lines 47-59; see also column 6, lines 20-39).
In reference to Claim 8, Spangler, Miyamoto, Sanchez Diaz, and Ozawa further disclose verifying the secure firmware and setting the register to allow the boot procedure to proceed (Miyamoto, column 6, lines 59-64, access disable register specifies whether fetch of firmware is permitted, and column 7, line 49-column 8, line 17, where the access disable register prohibits fetch of the firmware until verification is complete, where setting the access disable register to permit fetch constitutes the second value placing the system into the second state; see also Spangler, paragraphs 0086, 0015-0016, 0048, and 0111; see also Ozawa, column 10, line 15-column 11, line 34).
In reference to Claims 9 and 10, Spangler, Miyamoto, Sanchez Diaz, and Ozawa further disclose further requests to verify open firmware and setting the register to prevent or allow the first sub-system from performing the boot procedure and executing the open firmware, where the timer is reset after each verification and the timer is disabled when boot completes (Spangler, paragraphs 0086, 0015-0016, 0048, and 0111; Miyamoto, column 6, lines 59-64, and column 7, line 49-column 8, line 17; see also Ozawa, column 10, line 15-column 11, line 34).
In reference to Claim 11, Spangler, Miyamoto, Sanchez Diaz, and Ozawa further disclose the processor, timer, and memory included in the second sub-system (see Sanchez Diaz, column 4, line 59-column 5, line 38; and Ozawa, watchdog timer 133; see also processors and memory in each of the cited references).
In reference to Claim 13, Spangler, Miyamoto, Sanchez Diaz, and Ozawa further disclose restarting the timer substantially simultaneously to the register being set to the first value (Ozawa, column 10, line 15-column 11, line 34, restarting timer when each verification process starts; see also Miyamoto, column 6, lines 59-64, and column 7, line 49-column 8, line 17, register set when each verification starts).
Claim 14 is directed to a system having functionality similar to the systems of Claims 6 and 8 in combination, and is rejected by a similar rationale, mutatis mutandis.
In reference to Claim 18, Spangler, Miyamoto, Sanchez Diaz, and Ozawa further disclose further requests to verify second firmware and setting the register to prevent or allow the first sub-system from performing the boot procedure and executing the second firmware (Spangler, paragraphs 0086, 0015-0016, 0048, and 0111; Miyamoto, column 6, lines 59-64, and column 7, line 49-column 8, line 17).
Claims 17, 19, and 20 are directed to systems similar to the apparatus of Claims 9-11 and are rejected by a similar rationale, mutatis mutandis.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Pyle et al, US Patent 5467286, discloses a system in which timers run during firmware validation.
Marnfeldt, US Patent 10819713, discloses techniques in which verification of firmware resets a timer.
Kirschner, US Patent 11436315, discloses a system in which firmware verification is performed and fails if a timer expires.
Bhatia et al, US Patent 12393486, discloses a method in which multiple timers are started to measure different time periods while validating firmware.
Dewan et al, US Patent Application Publication 2019/0325139, discloses a system that verifies firmware if actions are completed before a timer expires.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Zachary A Davis whose telephone number is (571)272-3870. The examiner can normally be reached Monday-Friday, 9:00am-5:30pm, Eastern Time.
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/Zachary A. Davis/Primary Examiner, Art Unit 2492
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