Prosecution Insights
Last updated: October 01, 2026
Application No. 18/237,514

CHARGING CONTROL APPARATUS AND METHOD, AND ELECTRIC VEHICLE

Final Rejection §102
Filed
Aug 24, 2023
Priority
Mar 26, 2021 — continuation of PCTCN2021083418
Examiner
MCNALLY, KERRI L
Art Unit
Tech Center
Assignee
Shenzhen Yinwang Intelligent Technology Co., Ltd.
OA Round
2 (Final)
81%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allowance Rate
856 granted / 1062 resolved
+20.6% vs TC avg
Moderate +11% lift
Without
With
+11.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
13 currently pending
Career history
1068
Total Applications
across all art units

Statute-Specific Performance

§101
5.8%
-34.2% vs TC avg
§103
41.1%
+1.1% vs TC avg
§102
19.4%
-20.6% vs TC avg
§112
19.8%
-20.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1062 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Status of the Claims Claims 1-20 are currently pending. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1, 9, and 15 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US Patent Application Publication No. 2013/0119931 (Klesyk). Regarding claim 1, Klesyk discloses a signal processor configured to receive a first control pilot signal sent by power sourcing equipment; and send a high-level signal of target duration to a wake-up circuit based on the first control pilot signal, wherein the wake-up circuit is configured to wake up a battery management system after duration in which the high-level signal is received reaches the target duration (a control pilot detection circuit (see description paragraphs 33-48, and figures 1 to 6) for use in providing a control pilot wake-up signal to a controller of a vehicle charging system; a control pilot detection circuit 38 includes a connection circuit 80, a wake-up circuit 82, and a latch circuit 84; the connection circuit 80 can be configured to receive a control pilot signal from an EVSE system 22 and to output the received control signal CP _WAKEUP to the wake-up circuit 82; the wake-up circuit 82 can be configured to output a latch signal CP _LATCH to the latch circuit 84; the latch circuit 84 can be configured to output the control pilot wake-up signal CP _WAKE; a first portion 90 of the wake-up circuit 82 can be configured to define a beginning of the pulse outputted to the latch circuit 84, and a second portion 92 of the wake-up circuit 82 can be configured to define an ending of the pulse; with reference to figures 4-6, at time TO, the control pilot signal (equivalent to the first control pilot signal) is in a steady, non-time varying state; once the control pilot signal begins to alternate between a high and low state at a frequency, then at a time T 1, a current is passed to the first portion 90 and the second portion 92 of the wake-up circuit; once the voltage at the CP _LATCH reaches a level sufficient to surpass a turn-on voltage of the latch circuit 84, the latch circuit 84 begins generating a pulse of the control pilot signal CP _WAKE; as the control pilot signal continues in a time-varying state, the second portion 92 of the wake-up circuit 82 begins to increase in voltage until reaching a level sufficient to surpass a turn-on voltage of the MOSFET (Q24), and then the MOSFET causes a portion of the first portion 90 of the wake-up circuit 82 to be shorted; at the time T2, the MOSFET is turned on to short the portion of the first portion 90 of the wake­up circuit 82 (the pulse between Tl-T2 is equivalent to the high-level signal of a target duration)). Regarding claim 9, Klesyk discloses receiving a first control pilot signal, and generating a high-level signal of target duration based on the first control pilot signal; and sending the high-level signal of the target duration to a battery management system, to wake up the battery management system (a control pilot detection circuit (see description paragraphs 33-48, and figures 1 to 6) for use in providing a control pilot wake-up signal to a controller of a vehicle charging system; a control pilot detection circuit 38 includes a connection circuit 80, a wake-up circuit 82, and a latch circuit 84; the connection circuit 80 can be configured to receive a control pilot signal from an EVSE system 22 and to output the received control signal CP _WAKEUP to the wake-up circuit 82; the wake-up circuit 82 can be configured to output a latch signal CP _LATCH to the latch circuit 84; the latch circuit 84 can be configured to output the control pilot wake-up signal CP _WAKE; a first portion 90 of the wake-up circuit 82 can be configured to define a beginning of the pulse outputted to the latch circuit 84, and a second portion 92 of the wake-up circuit 82 can be configured to define an ending of the pulse; with reference to figures 4-6, at time TO, the control pilot signal (equivalent to the first control pilot signal) is in a steady, non-time varying state; once the control pilot signal begins to alternate between a high and low state at a frequency, then at a time T 1, a current is passed to the first portion 90 and the second portion 92 of the wake-up circuit; once the voltage at the CP _LATCH reaches a level sufficient to surpass a turn-on voltage of the latch circuit 84, the latch circuit 84 begins generating a pulse of the control pilot signal CP _WAKE; as the control pilot signal continues in a time-varying state, the second portion 92 of the wake-up circuit 82 begins to increase in voltage until reaching a level sufficient to surpass a turn-on voltage of the MOSFET (Q24), and then the MOSFET causes a portion of the first portion 90 of the wake-up circuit 82 to be shorted; at the time T2, the MOSFET is turned on to short the portion of the first portion 90 of the wake­up circuit 82 (the pulse between Tl-T2 is equivalent to the high-level signal of a target duration)). Regarding claim 15, Klesyk discloses an electric vehicle, comprising: a charging control apparatus comprising: signal processor configured to receive a first control pilot signal sent by power sourcing equipment, and send a high-level signal of target duration to a wake-up circuit based on the first control pilot signal, wherein the wake-up circuit configured to wake up a battery management system after duration in which the high-level signal is received reaches the target duration (a control pilot detection circuit (see description paragraphs 33-48, and figures 1 to 6) for use in providing a control pilot wake-up signal to a controller of a vehicle charging system; a control pilot detection circuit 38 includes a connection circuit 80, a wake-up circuit 82, and a latch circuit 84; the connection circuit 80 can be configured to receive a control pilot signal from an EVSE system 22 and to output the received control signal CP _WAKEUP to the wake-up circuit 82; the wake-up circuit 82 can be configured to output a latch signal CP _LATCH to the latch circuit 84; the latch circuit 84 can be configured to output the control pilot wake-up signal CP _WAKE; a first portion 90 of the wake-up circuit 82 can be configured to define a beginning of the pulse outputted to the latch circuit 84, and a second portion 92 of the wake-up circuit 82 can be configured to define an ending of the pulse; with reference to figures 4-6, at time TO, the control pilot signal (equivalent to the first control pilot signal) is in a steady, non-time varying state; once the control pilot signal begins to alternate between a high and low state at a frequency, then at a time T 1, a current is passed to the first portion 90 and the second portion 92 of the wake-up circuit; once the voltage at the CP _LATCH reaches a level sufficient to surpass a turn-on voltage of the latch circuit 84, the latch circuit 84 begins generating a pulse of the control pilot signal CP _WAKE; as the control pilot signal continues in a time-varying state, the second portion 92 of the wake-up circuit 82 begins to increase in voltage until reaching a level sufficient to surpass a turn-on voltage of the MOSFET (Q24), and then the MOSFET causes a portion of the first portion 90 of the wake-up circuit 82 to be shorted; at the time T2, the MOSFET is turned on to short the portion of the first portion 90 of the wake­up circuit 82 (the pulse between Tl-T2 is equivalent to the high-level signal of a target duration)). Allowable Subject Matter Claims 2-8, 10-14, and 16-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Response to Arguments Applicant's arguments filed 08/05/2026 have been fully considered but they are not persuasive. First, due to Applicant’s amendments to the claims, the previously made 112(f) claim interpretation has been withdrawn. The claims are now being interpreted using broadest reasonable interpretation in light of the specification. Next, Applicant argues that with regards to the previous 102 rejections of claims 1, 9, and 15, Klesyk fails to disclose “receiving a first control pilot signal and generating a high-level signal of target duration based on the first control pilot signal”. This argument is unpersuasive. In Klesyk, with reference to figures 4-6, at time TO, the control pilot signal (equivalent to the first control pilot signal) is in a steady, non-time varying state; once the control pilot signal begins to alternate between a high and low state at a frequency, then at a time T 1, a current is passed to the first portion 90 and the second portion 92 of the wake-up circuit; once the voltage at the CP _LATCH reaches a level sufficient to surpass a turn-on voltage of the latch circuit 84, the latch circuit 84 begins generating a pulse of the control pilot signal CP _WAKE; as the control pilot signal continues in a time-varying state, the second portion 92 of the wake-up circuit 82 begins to increase in voltage until reaching a level sufficient to surpass a turn-on voltage of the MOSFET (Q24), and then the MOSFET causes a portion of the first portion 90 of the wake-up circuit 82 to be shorted; at the time T2, the MOSFET is turned on to short the portion of the first portion 90 of the wake­up circuit 82 (the pulse between Tl-T2 is equivalent to the high-level signal of a target duration) based upon the control pilot signal; see Fig. 4). Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to KERRI L MCNALLY whose telephone number is (571)270-1840. The examiner can normally be reached Monday-Friday, 7:00 am - 3:30 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Brian Zimmerman can be reached at 571-272-3059. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /KERRI L MCNALLY/Primary Examiner, Art Unit 2686
Read full office action

Prosecution Timeline

Aug 24, 2023
Application Filed
Jun 04, 2026
Non-Final Rejection mailed — §102
Aug 05, 2026
Response Filed
Sep 08, 2026
Final Rejection mailed — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
81%
Grant Probability
92%
With Interview (+11.3%)
2y 3m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 1062 resolved cases by this examiner. Grant probability derived from career allowance rate.

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