DETAILED ACTION This action is in response to claims filed 26 August 2023 for application 18238459 filed 26 August 2023. Currently claims 1-11 are pending. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(d): (d) REFERENCE IN DEPENDENT FORMS.—Subject to subsection (e), a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers. The following is a quotation of pre-AIA 35 U.S.C. 112, fourth paragraph: Subject to the following paragraph [i.e., the fifth paragraph of pre-AIA 35 U.S.C. 112], a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers. Claim 5 is rejected under 35 U.S.C. 112(d) or pre-AIA 35 U.S.C. 112, 4th paragraph, as being of improper dependent form for failing to further limit the subject matter of the claim upon which it depends, or for failing to include all the limitations of the claim upon which it depends. Step 3.3 in Claim 4 recites acquiring and converting the spike data in the alternative. Converting is not required by the claim however, is required by claim 5 . Applicant may cancel the claim(s), amend the claim(s) to place the claim(s) in proper dependent form, rewrite the claim(s) in independent form, or present a sufficient showing that the dependent claim(s) complies with the statutory requirements. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis ( i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale , or otherwise available to the public before the effective filing date of the claimed invention. Claim s 1-4 and 6-11 is/are rejected under 35 U.S.C. 102 (A)(1) as being anticipated by Fang et al. (Encoding, model, and architecture: systematic optimization for spiking neural network in FPGAs) . Regarding claim 1, Fang discloses: A computing platform for spiking neural network (SNN) learning and simulation, comprising a neuron dynamics simulation module, a neuron conversion module, an SNN construction and weight learning module, and a neural network level parameter and weight access module (Fig 6 Framework Fang) , wherein the neuron dynamics simulation module is configured to simulate changing features of neurons according to current and/or voltage signals received by an SNN and states of neuron connections (p4 §3.1 Modeling spiking Neuron by filters discloses a neuron model with a synapse, membrane, weight and state that changes parameters based on signal received. A voltage charge greater than the membrane changes aspects of the neuron) ; the neuron conversion module is configured to convert a neuron model to obtain a superposition mode of basic calculations (“Equations 18 to 23 provide general formula of SNNs as a network of IIR filters with neuron non-linearity. They can be decomposed into 3 basic computing primitives : 1) IIR filter (equation 18, 20 21); 2) Dot-product (equation 19), and 3) Thresholding (equation 22, 23).” P6 §4 ¶1) , transform a differential equation of neuron membrane voltage changes into a difference equation (“Equation 18 to 23 provide an explicit way to update the state of SNN based on difference equations, hence it is convenient to implement in FPGAs.” P5§3.2 ¶3, eq18-23 disclose difference equations including membrane potential V[t] measured in voltage) , expand calculation steps of the difference equation (“Equations 18 to 23 provide general formula of SNNs as a network of IIR filters with neuron non-linearity. They can be decomposed into 3 basic computing primitives : 1) IIR filter (equation 18, 20 21); 2) Dot-product (equation 19), and 3) Thresholding (equation 22, 23).” P6 §4 ¶1) , form a calculation graph (“A computation graph is generated from the inference model. Each node indicates a stage in the layer-wise pipeline. Edge direction indicates data dependency. Node’s attributes include hyperparameter such as type, input/output size etc. of corresponding layer.” P7 §4.3 ¶2) , and perform operations on the calculation graph (“The model undergoes performance analysis discussed in section 4.2 to determine the HLS directives.” P7 §4.3 ¶2, see also §4.2 wherein the SNN is iterated) ; the SNN construction and weight learning module is configured to update and iterate connection weights through a built-in algorithm according to spike signals received by the SNN and the states of the neuron connections, for the SNN to learn features of an acquired object (“Each 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛 is defined as executing equation 18 to 23 once to update SNN states. 𝑇𝑖 is the cycles required by the 𝑖𝑡ℎ layer to update the for one step, and 𝐹𝑟𝑒𝑞 is the system clock frequency. At lower level, the resources in each module (i.e. synapse, matrix multiplication and convolution and thresholding) are shared by neurons in the same layer in a time multiplexed way.” P7 §4.2 ¶2) ; and the neural network level parameter and weight access module is configured to store overall network detail parameters after the SNN is trained (Fig 6 software model generates a computation graph, optimized for hardware and then implemented, “After updating the node attributes, template engine takes computation graph as input, and generates headers and C++ source files.” P7 §4.3 ¶2) . Regarding claim 2, Fang discloses: The computing platform for SNN learning and simulation of claim 1, wherein an execution process of the neuron dynamics simulation module comprises following steps: step 1.1, selecting a neuron model; step 1.2, selecting a synapse model, comprising an electrical synapse model or a chemical synapse model; step 1.3, setting a current and/or voltage mode of a network input layer; step 1.4, setting a simulation time; and step 1.5, setting a monitor to monitor parameters of neurons (p5 §3.2 and §3.2 disclose neuron models, training is done for a period of time) . Regarding claim 3, Fang discloses: The computing platform for SNN learning and simulation of claim 1, wherein, in the neuron conversion module, the differential equation of neuron membrane voltage changes is transformed into the difference equation, the calculation steps of the difference equation are expanded into a calculation formula with only a single operator in each step, so as to obtain a calculation graph formed by single-step operations, after the calculation graph is operated sequentially and/or in parallel, a result of the differential equation at this moment is obtained, and an execution process comprises following steps: step 2.1, through finite difference, transforming a time-varying formula of the neuron model into a single-step iterative formula; and step 2.2, transforming an operation comprising a natural constant into a coefficient parameter (“Equation 18 to 23 provide an explicit way to update the state of SNN based on difference equations, hence it is convenient to implement in FPGAs.” P5§3.2 ¶3, “Equations 18 to 23 provide general formula of SNNs as a network of IIR filters with neuron non-linearity. They can be decomposed into 3 basic computing primitives : 1) IIR filter (equation 18, 20 21); 2) Dot-product (equation 19), and 3) Thresholding (equation 22, 23).” P6 §4 ¶1) . Regarding claim 4, Fang discloses: The computing platform for SNN learning and simulation of claim 1, wherein an execution process of the SNN construction and weight learning module comprises following steps: step 3.1, setting an SNN structure, and specifying a number of neurons and connection weights between connected neuron groups; step 3.2, selecting an algorithm, wherein the algorithm is selected when layers of the SNN are generated; step 3.3, directly acquiring spike input, and/or converting data input according to an acquired data type; step 3.4, running the SNN to simulate a process of neuron movement, and updating and iterating the connection weights according to the selected algorithm; step 3.5, acquiring final spiking data, decoding spike output according to a set decoding manner, and converting the decoded spike output into a required data form; and step 3.6, storing a trained network structure and the connection weights (steps 3.1-3.6 are disclosed by the training of the SNN in §3.3, see also Fig 6 “software model”, §5.1 ¶1 discloses encoding types and converting to spike data) . Regarding claim 6, Fang discloses: The computing platform for SNN learning and simulation of claim 4, wherein an execution process of step 3.6 comprises following steps: step 3.6.1, decoding the network, acquiring network level parameters required to rebuild the network by parsing the network structure, recursively decoding components in the network that are labeled as a network base class, and then generating, according to a network level structure, a corresponding empty dictionary for storing parameters; step 3.6.2, decoding the neurons in the network, parsing parameters required to generate the neurons, and storing the parameters in a network structure dictionary; step 3.6.3, decoding synaptic connections in the network, parsing parameters required to generate the synaptic connections inside the network, and storing the parameters in the network structure dictionary; and storing information of the connection weights and recording update information of the connection weights when the synaptic connections are parsed; step 3.6.4, decoding an algorithm used by the network, recording different algorithms selected for different levels, and storing parameters in the network structure dictionary; and step 3.6.5, storing the network structure dictionary as a text file structure according to a user's selection. (“A computation graph is generated from the inference model. Each node indicates a stage in the layer-wise pipeline. Edge direction indicates data dependency. Node’s attributes include hyperparameter such as type, input/output size etc. of corresponding layer. The model undergoes performance analysis discussed in section 4.2 to determine the HLS directives. We defined a set of templates targeting at Vivado HLS. Templates include different filters, PE module, matrix multiplier, top level function. Data types, loop bounds and HLS directives are parameterized. After updating the node attributes, template engine takes computation graph as input, and generates headers and C++ source files.” P7 §4.3 ¶2, see also Fig 6, once the network is trained it is parsed into the computation graph through a template dictionary and converted to a text file in the form of C++ code). Regarding claim 7, Fang discloses: A method for SNN learning and simulation, comprising following steps: step S1: judging whether there is a need to read a network structure from a file, and if yes, directly performing step S5 to construct a network after the network structure is read; and if not, building the network structure anew, setting a network running time, and performing step S2 (Fig 6) ; step S2: constructing an input layer, and adopting different processing manners for input data according to different input manners selected (§3.2 discloses parts of a SNN including input nodes for an input layer, Fig 6 SNN specification) ; step S3: constructing a neuron layer in the form of neuron groups, defining a model used by each neuron group, a number of neurons comprised in the model, and specific model details, converting a differential equation of the neurons, and adding a difference equation obtained after conversion to a calculation graph (§3.2 discloses parts of a SNN including input nodes for an input layer, “Equation 18 to 23 provide an explicit way to update the state of SNN based on difference equations, hence it is convenient to implement in FPGAs.” P5§3.2 ¶3, eq18-23 disclose difference equations, “A computation graph is generated from the inference model. Each node indicates a stage in the layer-wise pipeline. Edge direction indicates data dependency. Node’s attributes include hyperparameter such as type, input/output size etc. of corresponding layer.” P7 §4.3 ¶2) ; step S4: constructing a connection layer, selecting a synapse type, initializing connection weights at the same time, integrating information required to be passed to post-synaptic neurons after connection weight calculation, and adding the integrated information to the calculation graph (§3.2 discloses parts of a SNN including neurons and synapses, “Equation 18 to 23 provide an explicit way to update the state of SNN based on difference equations, hence it is convenient to implement in FPGAs.” P5§3.2 ¶3, eq18-23 disclose synapses and connections weights, A LIF neuron can be made by setting some parameters to 0, “A computation graph is generated from the inference model. Each node indicates a stage in the layer-wise pipeline. Edge direction indicates data dependency. Node’s attributes include hyperparameter such as type, input/output size etc. of corresponding layer.” P7 §4.3 ¶2) ; step S5: constructing a network, assigning IDs representing categories and parent classes to each neuron group and connection in sequence, and then generating a specific calculation graph based on the IDs (“A computation graph is generated from the inference model. Each node indicates a stage in the layer-wise pipeline. Edge direction indicates data dependency. Node’s attributes include hyperparameter such as type, input/output size etc. of corresponding layer.” P7 §4.3 ¶2) ; and step S6: simulating operation of the network, the neurons changing with time and settings of a neuron model, performing step-by-step calculation according to the calculation graph, and storing a trained network structure and parameters (“Each 𝑖𝑡𝑒𝑟𝑎𝑡𝑖𝑜𝑛 is defined as executing equation 18 to 23 once to update SNN states. 𝑇𝑖 is the cycles required by the 𝑖𝑡ℎ layer to update the for one step, and 𝐹𝑟𝑒𝑞 is the system clock frequency. At lower level, the resources in each module (i.e. synapse, matrix multiplication and convolution and thresholding) are shared by neurons in the same layer in a time multiplexed way.” P7 §4.2 ¶2) . Regarding claim 8, Fang discloses: The method for SNN learning and simulation of claim 7, wherein, when the input layer is constructed in step S2, if the input data is given spike data, using the input data is directly as spike input; if an encoding manner is given, encoding the input data according to different encoding manners and then inputting the input data; and otherwise, constructing different constant input currents or quadrature input currents as input according to the input data §3.2 discloses parts of a SNN including input nodes for an input layer, “In SNN, static data e.g. images have to be converted as spike trains in an encoding window 𝑇𝑒 for processing. Larger 𝑇𝑒 provides better precision, but at the cost of longer computation time. To evaluate the effectiveness of proposed coding method and SNN model, we studied the trade-off between 𝑇𝑒 and accuracy.” P7 §5.1 ¶1) . Regarding claim 9, Fang discloses: The method for SNN learning and simulation of claim 7, wherein the synapse type in step S4 comprises a chemical synapse and an electrical synapse, and calculation formulas of different synapse types are added to the connection layer to construct connections (§3.2 eq 18-23 and the notation parameters that can be set to zero disclose different types of neurons and synapses such as those in a LIF neuron) . Regarding claim 10, Fang discloses: The method for SNN learning and simulation of claim 7, wherein, in step S6, adding a monitor to monitor parameters of specified neurons, displaying the parameters visually, and storing displayed information (Fig 1 time encoding by LIF neuron) . Regarding claim 11, Fang discloses: An apparatus for SNN learning and simulation, comprising a non-volatile memory, and one or more processors, wherein the memory stores a computer program, and the processor is configured to run the computer program to perform the method for SNN learning and simulation of claim 7 (p9 §6 various computer devices can be used to implement the SNN, “We tested the three networks on CPU, GPU, embedded GPU, and neuromorphic chip, and results are shown in Table 3” §5.3 ¶2) . Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis ( i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim (s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Fang in view of Srinivasa et al. (WO 2019074532 A1) . Regarding claim 5, Fang discloses: The computing platform for SNN learning and simulation of claim 4, wherein, in step 3.3, if the data type is numeric input , … data is transcoded according to different encoding manners, and is converted into spiking data over a given time length (§5.1 ¶1 discloses encoding types and converting to spike data) . Fang does not explicitly disclose the use of the grayscale data. Srinivasa teaches: converting grayscale data (“Hence, a detailed input pattern that captures more subtle gestures may facilitate a spiking neural network in differentiating the signature motion from noise and/or other imaged activity. In some embodiments, RGB pixel video data may be converted into grayscale before performing motion detection. In other embodiments, motion detection may be performed using differential video data which represents pixel information with respect to a polychromatic color space.” [0054] ). Fang and Srinivasa are both in the same field of endeavor of spiking neural networks and are analogous. Fang discloses a system for building and simulating a SNN before optimizing it for hardware. Srinivasa teaches the use of converting RGB images to grayscale for processing by a SNN. It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the known SNN building with encoding and converting of data to spiking data as disclosed by Fang to utilize the known conversion of RGB to grayscale data as taught by Srinivasa to yield the predictable results of allowing the SNN to utilize RGB images as well as other types of data. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Kim et al. (Neural Architecture Search for Spiking Neural Networks) discloses searching for and optimizing spiking neural network architecture . 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