DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
In response to the non-final office action dated 06/26/2025, applicant has amended claims 1, 5, 6, 10, 11, 13 and 19. Claim 16 has been cancelled. New claim 21 has been added. Claims 1-15 and 17-21 are pending in the application.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 01/09/2026 is being considered by the examiner.
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claim(s) 1-10, 13-15, 17-18 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Barsukou (U.S. Pub No. 20230188896, hereinafter Barsukou) in view of Jomori et al (US Pub No. 20230243710, hereinafter Jomori).
Regarding claim 1, Barsukou teaches an apparatus (See Barsukou Fig 7, wireless device 100) comprising: a substrate (See Barsukou Fig 1B, support substrate SiO2 and Si-SUB) having an opening (See Barsukou Fig 1B, opening between left and right support substrate); a first piezoelectric flap (See Barsukou Fig 1B, left piezoelectric flap) having a first end on the substrate (See Barsukou Fig 1B, left piezoelectric flap bottom left end on substrate layer SiO2) and having a first portion extending over a first part of the opening (See Barsukou Fig 1B, left piezoelectric flap bottom right end over opening), the first piezoelectric flap including first electrodes (See Barsukou Fig 1B, left side electrodes), and a second piezoelectric flap (See Barsukou Fig 1B, right piezoelectric flap) having a second end on the substrate (See Barsukou Fig 1B, right piezoelectric flap bottom right end on substrate layer SiO2) and having a second portion extending over a second part of the opening (See Barsukou Fig 1B, right piezoelectric flap bottom left end over opening), the second piezoelectric flap including second electrodes (See Barsukou Fig 1B, right side electrodes).
Barsukou does not explicitly teach at least one piezoelectric layer that extend no more than half of a first length of the first portion of the first piezoelectric flap; and at least one piezoelectric layer that extend no more than half of a second length of the second portion of the second piezoelectric flap.
Jomori teaches at least one piezoelectric layer that extend no more than half of a first length of the first portion of the first piezoelectric flap (See Jomori Fig 4A-4E right side, manufacturing process showing layers of piezoelectric film being etched with the top layer being shorter than the bottom layer. [Abstract] Depending on application and design the angle of the taper can vary and there can be additional layers of piezoelectric film with each being shorter than those underneath); and at least one piezoelectric layer that extend no more than half of a second length of the second portion of the second piezoelectric flap (See Jomori Fig 4A-4E right side, manufacturing process showing layers of piezoelectric film being etched with the top layer being shorter than the bottom layer. [Abstract] Depending on application and design the angle of the taper can vary and there can be additional layers of piezoelectric film with each being shorter than those underneath).
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have incorporated the forming process taught by Jomori with the apparatus taught by Barsukou. Doing so provides more surface area and less weight giving the piezoelectric flaps higher sensitivity and better signal-to-noise ratio.
Regarding claim 2, Barsukou in view of Jomori teaches the apparatus of claim 1, wherein the first electrodes extend between a quarter of the first length and half of the first length (See Barsukou Fig 1B, bottom left electrode extends between a quarter to half the length of piezoelectric flap over the opening), and the second electrodes extend between a quarter of the second length and half of the second length (See Barsukou Fig 1B, bottom right electrode extends between a quarter to half the length of piezoelectric flap over the opening).
Regarding claim 3, Barsukou in view of Jomori teaches the apparatus of claim 1, wherein the first electrodes include a first top electrode (See Barsukou Fig 1B, left side top electrode), a first bottom electrode (See Barsukou Fig 1B, left side bottom electrode), and a first middle electrode (See Barsukou Fig 1B, left side middle electrode) having at least a portion between the first bottom electrode and the first top electrode (See Barsukou Fig 1B, left side middle electrode between top and bottom electrodes), the first top and bottom electrodes coupled to a first terminal (See Barsukou ¶ [0052], the top/bottom electrodes of each cantilever are electrically connected to the middle electrode of the adjacent cantilever), and the first middle electrode coupled to a second terminal (See Barsukou Fig 1B, left side middle electrode connected to VIA terminal); and wherein the second electrodes include a second top electrode (See Barsukou Fig 1B, right side top electrode), a second bottom electrode (See Barsukou Fig 1B, right side bottom electrode), and a second middle electrode (See Barsukou Fig 1B, right side middle electrode) having at least a portion between the second bottom electrode and the second top electrode (See Barsukou Fig 1B, right side middle electrode between top and bottom electrodes), the second top and bottom electrodes coupled to a third terminal (See Barsukou Fig 1B, right side top and bottom electrodes connected to VIA terminal), and the second middle electrode coupled to a fourth terminal (See Barsukou ¶ [0052], the top/bottom electrodes of each cantilever are electrically connected to the middle electrode of the adjacent cantilever).
Regarding claim 4, Barsukou in view of Jomori teaches the apparatus of claim 3, wherein the first piezoelectric flap includes a first piezoelectric layer (See Barsukou Fig 1B, left piezoelectric flap having a top layer) having at least a portion between the first top electrode and the first middle electrode (See Barsukou Fig 1B, top piezoelectric layer between top and middle electrodes), and a second piezoelectric layer (See Barsukou Fig 1B, left piezoelectric flap having a bottom layer) having at least a portion between the first middle electrode and the first bottom electrode (See Barsukou Fig 1B, bottom piezoelectric layer between middle and bottom electrodes); and wherein the second piezoelectric flap includes a third piezoelectric layer (See Barsukou Fig 1B, right piezoelectric flap having a top layer) having at least a portion between the second top electrode and the second middle electrode (See Barsukou Fig 1B, top piezoelectric layer between top and middle electrodes) and a fourth piezoelectric layer (See Barsukou Fig 1B, right piezoelectric flap having a bottom layer) having at least a portion between the second middle electrode and the second bottom electrode (See Barsukou Fig 1B, bottom piezoelectric layer between middle and bottom electrodes).
Regarding claim 5, Barsukou in view of Jomori teaches the apparatus of claim 4, wherein the first piezoelectric layer extends no more than half of the first length of the first portion, and the third piezoelectric layer extends no more than half of the second length of the second portion (See Jomori Fig 4A-4E right side, manufacturing process showing layers of piezoelectric film being etched with the top layer being shorter than the bottom layer. [Abstract] Depending on application and design the angle of the taper can vary and there can be additional layers of piezoelectric film with each being shorter than those underneath).
Regarding claim 6, Barsukou in view of Jomori teaches the apparatus of claim 4, wherein the first bottom electrode is embedded in the second piezoelectric layer (See Barsukou Fig 1B, left bottom electrode embedded in left bottom piezoelectric layer), and a first surface of the first bottom electrode is continuous with a second surface of the second piezoelectric layer (See Barsukou Fig 1B, top surface of left bottom electrode continuous with left bottom piezoelectric layer); and wherein the second bottom electrode is embedded in the fourth piezoelectric layer (See Barsukou Fig 1B, right bottom electrode embedded in right bottom piezoelectric layer), and a third surface of the second bottom electrode is continuous with a fourth surface of the fourth piezoelectric layer (See Barsukou Fig 1B, top surface of right bottom electrode continuous with right bottom piezoelectric layer).
Regarding claim 7, Barsukou in view of Jomori teaches the apparatus of claim 4, wherein the first bottom electrode is on a first surface of the second piezoelectric layer (See Barsukou Fig 1B, left bottom electrode on bottom surface of bottom piezoelectric layer), the first surface and a second surface of the first bottom electrode being discontinuous (See Barsukou Fig 1B, the bottom surface of bottom piezoelectric layer is discontinuous with surface of bottom electrode); and wherein the second bottom electrode is on a third surface of the fourth piezoelectric layer (See Barsukou Fig 1B, right bottom electrode on bottom surface of bottom piezoelectric layer), the third surface and a fourth surface of the second bottom electrode being discontinuous (See Barsukou Fig 1B, the bottom surface of bottom piezoelectric layer is discontinuous with surface of bottom electrode).
Regarding claim 8, Barsukou in view of Jomori teaches the apparatus of claim 3, wherein the substrate, the first piezoelectric flap, and the second piezoelectric flap are part of an audio device (See Barsukou Fig 1B, cantilever MEMS microphone).
Regarding claim 9, Barsukou in view of Jomori teaches the apparatus of claim 8, further comprising: a first transmit circuit having first driver outputs (See Barsukou Fig 7, transmit circuit required to send signals from microphone); a first receive circuit having first receiver inputs (See Barsukou Fig 7, receiver required to receive transmitter signals); a first switch network having first switch terminals and second switch terminals (See Barsukou Fig 7, transmit circuit required to send signals from microphone), the first switch terminals coupled to the first driver outputs and the first receiver inputs (See Barsukou Fig 7, switch required to control signals), and the second switch terminals coupled to the first and second terminals (See Barsukou Fig 7, switch required to control signals); a second transmit circuit having second driver outputs (See Barsukou Fig 7, transmit circuit required to send signals from microphone); a second receive circuit having second receiver inputs (See Barsukou Fig 7, receiver required to receive transmitter signals); and a second switch network having third switch terminals and fourth switch terminals (See Barsukou Fig 7, switch required to control signals), the third switch terminals coupled to the second driver outputs and the second receiver inputs (See Barsukou Fig 7, switch required to control signals, number of inputs/outputs dependent on microphone design), and the fourth switch terminals coupled to the third and fourth terminals (See Barsukou Fig 7, switch required to control signals, number of inputs/outputs dependent on microphone design).
Regarding claim 10, Barsukou in view of Jomori teaches the apparatus of claim 9, further comprising a control circuit coupled to the first transmit circuit and the first and second receive circuits, the control circuit configured to: provide a driving signal through the first transmit circuit and the first switch network to the first and second terminals (See Barsukou Fig 7, application processor), in which the first piezoelectric flap is configured to vibrate responsive to the driving signal; receive a response signal through the second receive circuit and the second switch network and from the second receive circuit, the response signal representing a vibration of the second piezoelectric flap responsive to the vibration of the first piezoelectric flap; generate a response frequency spectrum based on the response signal (See Barsukou Abstract, generate an electrical potential response); and store data representing the response frequency spectrum in a memory (See Barsukou ¶ [0070], wireless device 100 includes memory).
Regarding claim 13, Barsukou teaches a method (See Barsukou ¶ [0023], method of forming a piezoelectric microelectromechanical system) comprising: forming a first electrode on a substrate (See Barsukou Fig 1B, bottom electrode on substrate), in which the first electrode extends no more than half of a distance between a first location and a second location of the substrate (See Barsukou Fig 1B, bottom electrode does not extend more than half the distance of the substrate); forming a first piezoelectric layer on the first electrode (See Barsukou Fig 1B, bottom piezoelectric layer on bottom electrode); forming a second electrode on the first piezoelectric layer (See Barsukou Fig 1B, middle electrode on bottom piezoelectric layer), forming a second piezoelectric layer on the second electrode (See Barsukou Fig 1B, top piezoelectric layer on top of middle electrode); forming a third electrode on the second piezoelectric layer (See Barsukou Fig 1B, top electrode on top of top piezoelectric layer), in which the third electrode extends no more than half of the distance between the first and second locations from the first location (See Barsukou Fig 1B, top electrode extends no more than half the distance of the substrate); and removing a part of the substrate to create an opening between the first and second locations and form a piezoelectric flap above the opening (See Barsukou Fig 1B, opening between left and right support substrate).
Barsukou does not explicitly teach removing portions of the second electrode and the second piezoelectric layer so that the second electrode and the second piezoelectric layer extend no more than half of the distance between the first and second locations from the first location.
Jomori teaches removing portions of the second electrode and the second piezoelectric layer so that the second electrode and the second piezoelectric layer extend no more than half of the distance between the first and second locations from the first location (See Jomori Fig 4A-4E right side, manufacturing process showing layers of piezoelectric film being etched with the top layer being shorter than the bottom layer. [Abstract] Depending on application and design the angle of the taper can vary and there can be additional layers of piezoelectric film with each being shorter than those underneath).
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have incorporated the forming process taught by Jomori with the apparatus taught by Barsukou. Doing so provides more surface area and less weight giving the piezoelectric flaps higher sensitivity and better signal-to-noise ratio.
Regarding claim 14, Barsukou in view of Jomori teaches the method of claim 13, wherein the substrate includes an oxide layer (See Barsukou Fig 1B, SiO2 oxide layer) and a semiconductor layer (See Barsukou Fig 1B, Si semiconductor layer).
Regarding claim 15, Barsukou in view of Jomori teaches the method of claim 13, wherein forming the second piezoelectric layer includes forming the second piezoelectric layer on respective portions of the second electrode and the first piezoelectric layer (See Barsukou Fig 1B, top piezoelectric layer formed on top of bottom piezoelectric layer and middle electrode).
Regarding claim 17, Barsukou in view of Jomori teaches the method of claim 13, wherein forming the first piezoelectric layer on the first electrode includes forming the first piezoelectric layer on respective portions of the first electrode and the substrate (See Barsukou Fig 1B, bottom piezoelectric layer formed on top of bottom electrode and substrate).
Regarding claim 18, Barsukou in view of Jomori teaches the method of claim 13, wherein forming the first electrode on the substrate includes forming the first electrode on a first portion of the substrate (See Barsukou Fig 1B, bottom electrode formed on portion of substrate); wherein the method further comprises: forming a sacrificial layer on the first electrode and on a second portion of the substrate (See Barsukou Fig 1B, opening between left and right support substrate); and removing a first portion of the sacrificial layer to expose the first electrode (See Barsukou Fig 1B, opening between left and right support substrate), in which a second portion of the sacrificial layer abuts the first electrode (See Barsukou Fig 1B, SiO2 layer abuts bottom electrode); and wherein forming the first piezoelectric layer on the first electrode includes forming the first piezoelectric layer on the exposed first electrode and the second portion of the sacrificial layer (See Barsukou Fig 1B, bottom piezoelectric layer formed on top of bottom electrode and substrate).
Regarding claim 20, Barsukou in view of Jomori teaches the method of claim 18, further comprising removing the second portion of the sacrificial layer (See Barsukou Fig 1B, second layer of substrate removed from center gap).
Regarding claim 21, Barsukou in view of Jomori teaches the apparatus of claim 1, wherein the second piezoelectric flap is separate from the first piezoelectric flap by a gap (See Barsukou Fig 1C, open air filled trenches).
Claim(s) 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Barsukou (U.S. Pub No. 20230188896, hereinafter Barsukou) in view of Jomori et al (US Pub No. 20230243710, hereinafter Jomori) as applied to claims above, and further in view of Huang (U.S. Pub No. 20230403514, hereinafter Huang).
Regarding claim 19, Barsukou in view of Jomori teaches the method of claim 18.
Barsukou does not explicitly teach removing portions of the substrate using chemical and mechanical polishing (CMP).
Huang teaches removing portions of the substrate using chemical and mechanical polishing (CMP) (See Huang ¶ [0038], substrate may be thinned by chemical-mechanical polishing).
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have used chemical and mechanical polishing as taught by Huang with the method taught by Barsukou. Doing so provides multiple benefits including improved durability, removal of imperfections, and reduced surface roughness.
Response to Arguments
Applicant’s arguments, see page 1 claim rejections 112, filed 09/25/2025, with respect to claims 5 and 6 have been fully considered and are persuasive. The 112 rejection of 06/26/2025 has been withdrawn.
Applicant’s arguments with respect to claim(s) 1-15 and 17-21 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TYLER LIEBGOTT whose telephone number is (703)756-1818. The examiner can normally be reached Mon-Fri 10-6:30 EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Fan Tsang can be reached at (571)272-7547. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/T.M.L./Examiner, Art Unit 2694
/FAN S TSANG/Supervisory Patent Examiner, Art Unit 2694