Prosecution Insights
Last updated: April 19, 2026
Application No. 18/240,892

CONTACTOR, AN INTEGRATED CIRCUIT, A METHOD OF INTERRUPTING A CURRENT FLOW

Final Rejection §103
Filed
Aug 31, 2023
Examiner
THOMAS, LUCY M
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Melexis Technologies SA
OA Round
2 (Final)
63%
Grant Probability
Moderate
3-4
OA Rounds
3y 2m
To Grant
81%
With Interview

Examiner Intelligence

Grants 63% of resolved cases
63%
Career Allow Rate
505 granted / 807 resolved
-5.4% vs TC avg
Strong +19% interview lift
Without
With
+18.6%
Interview Lift
resolved cases with interview
Typical timeline
3y 2m
Avg Prosecution
27 currently pending
Career history
834
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
53.5%
+13.5% vs TC avg
§102
30.7%
-9.3% vs TC avg
§112
12.4%
-27.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 807 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 1-3, 5-6, 11-13,14, 16-18, 20-21 are rejected under 35 U.S.C. 103 as being unpatentable over Choi (US 2021/0048454) in view of Compton et al. (US 2021/0098215). Regarding Claim 1, Choi discloses an integrated circuit (integrated current measuring apparatus 1 with PCB 10, Figures 2-10, Abstract) comprising: a magnetic sensor (comprising Hall sensor 30, Figures 2-6, 8-9, Paragraph 39) arranged for outputting a magnetic sensor signal indicative of a first current in a conductor (Figures 2-9, 1 with battery pack 100, Figure 10, Paragraphs 5-6, “….a lithium secondary battery pack which currently attracts much attention as an energy storage system (ESS) of an electric vehicle uses a high charge/discharge current of about 100 A to about 300 A and, when a current sensor of the battery pack for the electric vehicle…”); a shunt interface arranged for outputting a shunt signal indicative of a second current across an external shunt resistor (comprising voltage measuring nodes 13a, 13b for measuring voltage over shunt resistor 20 Figures 3-6,9, Paragraphs 48-49, 55); a processing circuit arranged for receiving the magnetic sensor signal and shunt signal (Paragraph 41, “….Although not shown in FIGS. 2 to 4 for convenience of illustration, the PCB 10 may selectively include an analog-to-digital (ADC) circuit configured to convert a voltage difference between both ends of the shunt resistor 20 and an output of the Hall sensor 30 into current values, a processor, an application- specific integrated circuit (ASIC), another chipset, a logic circuit, an amplifier, a comparator, a register, a communication modem, a data processor, etc., …”, Paragraph 78, “…In addition to the integrated current-measuring apparatus 1, the battery pack 100 according to the present disclosure may further include …… various devices configured to control charge/discharge of the battery module, e.g., a BMS, a relay, and a fuse”); a communication interface (comprising terminals 23, 25, Figures 3-4,6,9, Paragraphs 48-49, Paragraph 41, “…the PCB 10 may selectively include an analog-to-digital (ADC) circuit configured to convert a voltage difference between both ends of the shunt resistor 20 and an output of the Hall sensor 30 into current values, a processor, an application-specific integrated circuit (ASIC), another chipset, a logic circuit, an amplifier, a comparator, a register, a communication modem, a data processor, etc., …”); wherein the integrated circuit is provided as a single packaged device (integrated current sensing apparatus 1, Figure 10); wherein the integrated circuit is configured for providing an output signal in response to at least one of the magnetic sensor signal and the shunt signal (output of 1 to 200, Figure 10, Paragraph 76, “…current of the battery pack may be measured using two types of current sensors and thus malfunction including an error between the current sensors can be detected and diagnosed…”, Paragraphs 77-78, “…current of the battery pack 100 may flow to a load 200 via the integrated current-measuring apparatus 1….In addition to the integrated current-measuring apparatus 1, the battery pack 100 according to the present disclosure may further include … a pack case configured to accommodate the battery module, and various devices configured to control charge/discharge of the battery module, e.g., a BMS, a relay, and a fuse”). Choi does not specifically show in Figures, the disclosed processing circuit and the communication interface (in Paragraph 41) arranged for providing a signal indicative of a measured current based on one or more of the first current. Compton discloses an integrated circuit (Figures 1-4) comprising: a magnetic sensor arranged for outputting a magnetic sensor signal indicative of a first current in a conductor (comprising 31, 32, Figures 1-4); a processing circuit (comprising 36, 34, 38, Figures 1-4) arranged for receiving the magnetic sensor signal (32 coupled to, 36, Figures 1-4); a communication interface arranged for providing a signal indicative of a measured current based on one or more of the first current (part of 36, 42 providing signal indicative of the measured current to 38, 44 respectively, Figures 1-4); wherein the integrated circuit is configured for providing an output signal in response to at least one of the magnetic sensor signal and of a second/additional sensor (output from 36 to 42, 44 based on input from 31, 32 and 40, Figures 1-4). Compton discloses the second/additional sensor being a temperature sensor sending sensed signal to the controller (40, sending output to 36, Figures 1-4) and embodiments where connecting a sensor as a shunt interface for sensing a voltage over an activation coil, said voltage indicative of a second current (Paragraph 84, “…the sensor 31 is adapted to be electrically connected to the first and second terminal 17a, 17b and adapted to measure the voltage between the first and second terminals 17a, 17b. In other words, the sensor 31 is adapted to measure the voltage of the coil 18 of the actuation portion 16”). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention as disclosed in Paragraph 41 of Choi and including the details of arranging the communication interface to provide a signal indicative of a measured current based on one or more of the first current and the second current as taught by Compton. Regarding Claim 2, combination of Choi and Compton discloses the integrated circuit of Claim 1, wherein the first current and the second current are both indicative of a current flowing in the same conductor (Choi, Paragraph 58, “…. the Hall sensor 30 may be mounted on the top surface of the PCB 10 to face the shunt resistor 20 with the PCB 10 being interposed between the Hall sensor 30 and the shunt resistor 20, and be used to measure a current flowing through the shunt resistor 20 located thereunder”). Regarding Claim 3, combination of Choi and Compton discloses the integrated circuit of Claim 1, wherein the processing circuit comprises comparison means for comparing one or more of the first current, the second current, and one or more predefined threshold values (Choi, Paragraph 41, “….Although not shown in FIGS. 2 to 4 for convenience of illustration, the PCB 10 may selectively include an analog-to-digital (ADC) circuit configured to convert a voltage difference between both ends of the shunt resistor 20 and an output of the Hall sensor 30 into current values, a processor, an application- specific integrated circuit (ASIC), another chipset, a logic circuit, an amplifier, a comparator, a register, a communication modem, a data processor…”, Paragraph 76, “…the current of the battery pack may be measured using two types of current sensors and thus malfunction including an error between the current sensors may be detected and diagnosed”, the disclosed comparator compare the two measured currents or each of the measured current by a respective current threshold to detect and diagnose the error). Regarding Claim 5, combination of Choi and Compton discloses the integrated circuit of Claim 1, wherein the signal indicative of the measured current is based on both the first current and the second current (Choi, Paragraph 41, “….Although not shown in FIGS. 2 to 4 for convenience of illustration, the PCB 10 may selectively include an analog-to-digital (ADC) circuit configured to convert a voltage difference between both ends of the shunt resistor 20 and an output of the Hall sensor 30 into current values, a processor, an application- specific integrated circuit (ASIC), another chipset, a logic circuit, an amplifier, a comparator, a register, a communication modem, a data processor…”; combination integrated circuit in Claim 1 providing the output signal based on both first current and the second current with the teaching of Compton’s output from 44 based on 31, 32 and 40). Regarding Claim 6, combination of Choi and Compton discloses the integrated circuit of Claim 1, wherein the processing circuit comprises a digital processor (Paragraph 41, “….Although not shown in FIGS. 2 to 4 for convenience of illustration, the PCB 10 may selectively include an analog-to-digital (ADC) circuit configured to convert a voltage difference between both ends of the shunt resistor 20 and an output of the Hall sensor 30 into current values, a processor, an application- specific integrated circuit (ASIC), another chipset, a logic circuit, an amplifier, a comparator, a register, a communication modem, a data processor, etc..,…”, Compton, Paragraph 42, “….the transducing portion 34 is adapted to amplify the detection signal provided by the detection portion 32. In addition or alternatively, the transducing portion 34 may transform the detected signals to digital signals and transmit these signals to the at least one controller 36”, Paragraph 58, “….the controller 36 interprets each power on event as a relay transition and uses the momentary power provided by detection portion 32 and converting portion 47 to process the event and store it in memory 38”). Regrading Claims 11-13, combination of Choi and Compton does not specifically disclose the integrated circuit, wherein the magnetic sensor signal has a first output data rate and the shunt signal has a second output data rate, wherein the first output data rate is greater than the second output data rate, wherein the first output data rate is at least three times the second output data rate. . It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, the magnetic sensor signal and the shunt sensor signal in the integrated circuit of Choi, to have different output data rates as detection speed and the output data rate differ based on the type of sensors. Regarding Claim 14, combination of Choi and Compton discloses the integrated circuit of Claim 1, wherein the measured current comprises both the first current and the second current (Choi, Paragraph 41); and wherein the communication interface is arranged for providing the first signal indicative of one or more of the first current and the second current (combination integrated circuit of Claim 1 having the signal indicative the measured current based on the first current and the second current, the first signal being the signal of the combination claim 1). Combination of Choi and Compton does not specifically disclose providing a second signal indicative of the second current. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to arrange the communication interface in the combination, to provide separate signals indicative of the first current and the second current to inform the user of the type of measured current/signals. Regarding Claim 16, combination of Choi and Compton discloses the integrated circuit of Claim 1, wherein the shunt signal is corrected using an external temperature signal provided by an external temperature sensor (Compton, comprising 40, controller 36 receives inputs from 32 and 40 and output to 42, 44, Figures 1-4, Paragraphs 44, 46-47). Regarding Claim 17, combination of Choi and Compton discloses the integrated circuit of Claim 16, wherein the external temperature sensor comprises a first external temperature sensor for measuring a temperature at a first side of the shunt resistor (Compton, comprising 40, controller 36 receives inputs from 32 and 40 and output to 42, 44, Figures 1-4, Paragraphs 44, 46-47) and a second external temperature sensor for measuring a temperature at a second side of the shunt resistor (Compton, Paragraph 46, “…a pair of temperature sensors, with one adapted to measure the ambient temperature and one adapted to measure the common housing 20 temperature, is used to enable the determination of a rise in temperature of the electromechanical relay 10 over an ambient temperature”). Regarding Claim 18, combination of Choi and Compton discloses the integrated circuit of Claim 1, further comprising a voltage interface for measuring a second voltage (Compton, voltage interface for measuring voltage at the output of 47/47a-c and coupled to the controller 36 input, Figures 1-4, Paragraph 84). Regarding Claim 20, Choi discloses an integrated circuit (integrated current measuring apparatus 1 with PCB 10, Figures 2-10, Abstract) comprising: a controller in the form of a programmable processor (Paragraph 41, “….the PCB 10 may selectively include an analog-to-digital (ADC) circuit configured to convert a voltage difference between both ends of the shunt resistor 20 and an output of the Hall sensor 30 into current values, a processor, an application- specific integrated circuit (ASIC), another chipset, a logic circuit, an amplifier, a comparator, a register, a communication modem, a data processor, etc..,…”); a magnetic sensor (comprising Hall sensor 30, Figures 2-6, 8-9, Paragraph 39) arranged for outputting a sensor signal indicative of a first current in a conductor (Figures 2-9, 1 with battery pack 100, Figure 10, Paragraphs 5-6, “….a lithium secondary battery pack which currently attracts much attention as an energy storage system (ESS) of an electric vehicle uses a high charge/discharge current of about 100 A to about 300 A and, when a current sensor of the battery pack for the electric vehicle…”); a shunt interface arranged for sensing a voltage over a shunt resistor connectable to the integrated circuit and for outputting a shunt signal (comprising voltage measuring nodes 13a, 13b for measuring voltage over shunt resistor 20 Figures 3-6,9, Paragraphs 48-49); wherein the integrated circuit is provided as a single packaged device (integrated current sensing apparatus 1, Figure 10); wherein the processor is configured for: i) receiving the magnetic sensor signal and the shunt signal (Paragraph 41, “….the PCB 10 may selectively include an analog-to-digital (ADC) circuit configured to convert a voltage difference between both ends of the shunt resistor 20 and an output of the Hall sensor 30 into current values, a processor, an application- specific integrated circuit (ASIC), another chipset, a logic circuit, an amplifier, a comparator, a register, a communication modem, a data processor, etc.., ); ii) comparing at least the magnetic sensor signal and the shunt signal (Paragraph 41, “….the PCB 10 may selectively include an analog-to-digital (ADC) circuit configured to convert a voltage difference between both ends of the shunt resistor 20 and an output of the Hall sensor 30 into current values, a processor, an application- specific integrated circuit (ASIC), another chipset, a logic circuit, an amplifier, a comparator, a register, a communication modem, a data processor…”, Paragraph 76); and iii) generating an output signal based on the magnetic sensor signal and the shunt signal (output of 1 to 200, Figure 10, Paragraphs 76-77, Paragraph 41). Choi does not specifically disclose the output signal being based on the comparison of the magnetic sensor signal and the shunt signal. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to provide an output signal to indicate the disclosed malfunction/fault condition (in Paragraph 76 of Choi) to control the output to the load via relay elements (Choi, Paragraphs 77-78) and to use as indication to the user of the fault condition. Regarding Claim 21, Choi discloses an integrated circuit (integrated current measuring apparatus 1 with PCB 10, Figures 2-10, Abstract) comprising: a magnetic sensor (comprising Hall sensor 30, Figures 2-6, 8-9, Paragraph 39) arranged for outputting a magnetic sensor signal indicative of a first current in a conductor (Figures 2-9, 1 with battery pack 100, Figure 10, Paragraphs 5-6, “….a lithium secondary battery pack which currently attracts much attention as an energy storage system (ESS) of an electric vehicle uses a high charge/discharge current of about 100 A to about 300 A and, when a current sensor of the battery pack for the electric vehicle…”); a shunt interface arranged for outputting a shunt signal indicative of the current in the conductor (comprising voltage measuring nodes 13a, 13b for measuring voltage over shunt resistor 20 Figures 3-6,9, Paragraphs 48-49); a processing circuit arranged for receiving the magnetic sensor signal and shunt signal (Paragraph 41, “….Although not shown in FIGS. 2 to 4 for convenience of illustration, the PCB 10 may selectively include an analog-to-digital (ADC) circuit configured to convert a voltage difference between both ends of the shunt resistor 20 and an output of the Hall sensor 30 into current values, a processor, an application- specific integrated circuit (ASIC), another chipset, a logic circuit, an amplifier, a comparator, a register, a communication modem, a data processor, etc.., which are well known in the art”, Paragraph 78, “…In addition to the integrated current-measuring apparatus 1, the battery pack 100 according to the present disclosure may further include …… various devices configured to control charge/discharge of the battery module, e.g., a BMS, a relay, and a fuse”), the processing circuit configured for: determining a difference between the magnetic sensor signal and the shunt signal (Paragraph 76, “…current of the battery pack may be measured using two types of current sensors and thus malfunction including an error between the current sensors can be detected and diagnosed…”); providing an output signal based on the magnetic sensor signal and the shunt signal (output of 1 to 200, Figure 10, Paragraphs 76- 77, Paragraph 41). wherein the integrated circuit is provided as a single packaged device (integrated current sensing apparatus 1, Figure 10). Choi does not specifically disclose the output signal being based on the difference between the magnetic sensor signal and the shunt signal. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to provide an output signal to indicate the disclosed malfunction/fault condition (in Paragraph 76 of Choi) to control the output to the load via relay elements (Choi, Paragraphs 77-78) and to use as indication to the user of the fault condition. Claims 4, 10, 15, 20 (additionally) are rejected under 35 U.S.C. 103 as being unpatentable over Choi (US 2021/0048454) in view of Compton et al. (US 2021/0098215) and Vincent et al. (US 2015/0070026). Regarding Claim 4, combination of Choi and Compton discloses the integrated circuit of Claim 3, wherein the output signal is based on the first current and the second current and also discloses a comparator (Claim 1 integrated circuit modified to provide output signal based on both first current and the second current, Paragraph 41, “….Although not shown in FIGS. 2 to 4 for convenience of illustration, the PCB 10 may selectively include an analog-to-digital (ADC) circuit configured to convert a voltage difference between both ends of the shunt resistor 20 and an output of the Hall sensor 30 into current values, a processor, an application- specific integrated circuit (ASIC), another chipset, a logic circuit, an amplifier, a comparator, a register, a communication modem, a data processor, etc..,…”). Combination of Choi and Compton does not specifically disclose providing the output signal being based on a comparison of the first current and the second current. Vincent discloses an integrated circuit (Figures 1-7) comprising: at least one magnetic sensor for measuring a magnetic field induced by a first current (comprising 44, Figure 2, Paragraph 59, Paragraph 66, :…The current sensor 44, visible in FIG. 2, is known per se, and is able to measure the intensity of the current I flowing in the first electric conductor 12. The current sensor 44 is for example a phase current sensor, and then includes for example a Rogowski torus, a shunt or even a Hall effect sensor”); a shunt interface for sensing a voltage indicative of a second current (voltage sensor 46, Figure 2, Paragraphs 59, 68); one or both of a digital communication interface (comprising 53, Figure 2) and an output port (comprising 54); and a controller (comprising 48, Figure 2) configured for transmitting one or more values of said first current and said second current (48 receiving inputs from 44 and 46, Figure 2) over one or both of said digital communication interface and said output port (48 configured to output to 53, 54, Figure 2), wherein the controller is configured for detecting an overcurrent condition by comparing said first and/or said second current with a predefined threshold value (117, 120, Figure 3), and if an overcurrent condition is detected, to assert said output port (124, Figure 3). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide in the combination, an output signal to indicate the disclosed malfunction/fault condition such as error between the current sensors as taught by Choi in Paragraph 76, and overcurrent condition as taught by Vincent to interrupt the current flow in the switch path to control the output to the load. Regarding Claim 10, combination of Choi and Compton discloses the integrated circuit of Claim 1, wherein the integrated circuit is configured for providing the output signal is based on the first current and the second current (Claim 1 integrated circuit modified to provide output signal based on both first current and the second current). Combination of Choi and Compton does not specifically disclose providing the output signal being when an overcurrent is detected by the magnetic sensor and/or by the shunt interface. Vincent discloses an integrated circuit (Figures 1-7) comprising: at least one magnetic sensor for measuring a magnetic field induced by a first current (comprising 44, Figure 2); a shunt interface for sensing a voltage indicative of a second current (voltage sensor 46, Figure 2); one or both of a digital communication interface (comprising 53, Figure 2) and an output port (comprising 54); and a controller configured (comprising 48, Figure 2) for transmitting one or more values of said first current and said second current (48 receiving inputs from 44 and 46, Figure 2) over one or both of said digital communication interface and said output port (48 configured to output to 53, 54, Figure 2), wherein the controller is configured for detecting an overcurrent condition by comparing said first and/or said second current with a predefined threshold value (117, 120, Figure 3), and if an overcurrent condition is detected, to assert said output port (124, Figure 3). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide in the combination detecting overcurrent condition as taught by Vincent, to interrupt the current flow in the switch path in case of a fault/malfunction in the integrated circuit. Regarding Claim 15, combination of Compton, Westrick, Jr. and Vincent discloses the integrated circuit of Claim 4, wherein the output signal comprises a fault signal when the first current and the second current are inconsistent (124 in Figure 3 of Vincent in the combination). Claim 20 basically recites an integrated circuit having the limitations similar to that of Claim 1 and Claim 4 combined, except for minor differences in the naming and/or order of limitations (e.g., controller in the form of a programmable processor in place of processing circuit, and Choi and Compton discloses controller (Choi, Paragraph 41, Compton, comprising 34, 36, 38 in Figures 1-4 in the form of programmable processor, Paragraph 50). Therefore, Claim 20 is additionally rejected similarly to that the combined limitations of Claim 1 and 4. Claims 7-9 are rejected under 35 U.S.C. 103 as being unpatentable over Choi (US 2021/0048454) in view of Compton et al. (US 2021/0098215) and Schindler (US 2007/0064922). Regarding Claim 7, combination of Choi and Compton discloses the integrated circuit of Claim 1, further comprising an analog-to-digital convertor (ADC) arranged to digitize the magnetic sensor signal and the shunt signal (Paragraph 41, “….Although not shown in FIGS. 2 to 4 for convenience of illustration, the PCB 10 may selectively include an analog-to-digital (ADC) circuit configured to convert a voltage difference between both ends of the shunt resistor 20 and an output of the Hall sensor 30 into current values….”, Compton, Paragraph 42, “….the transducing portion 34 is adapted to amplify the detection signal provided by the detection portion 32. In addition or alternatively, the transducing portion 34 may transform the detected signals to digital signals and transmit these signals to the at least one controller 36”). Combination of Choi and Compton does not specifically disclose the analog-to-digital convertor (ADC) arranged to digitize the magnetic sensor signal and the shunt signal being selectively. Schindler discloses an integrated circuit (Figures 1-4) comprising: a first sensor arranged for outputting a first signal indicative of a first current (comprising 94, Figure 4); a second sensor arranged for outputting a second signal indicative of a second current (voltage sensor 46, Figure 4); a multiplexer arranged to receive the first signal and the second signal (MUX 90 receiving first signal and the second signal, Figure 4), and an analog-to-digital convertor (ADC) arranged to selectively digitize the first sensor signal and the second signal being selectively (ADC 92 receiving output from MOX 90, Figure 4). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to arrange the ADC in the combination, to selectively digitize the first signal and the second signal as taught by Schindler (the first signal being the magnetic sensor signal in the combination and second signal being the shunt signal in the combination) by providing a multiplexer to control the outputting of signals to ADC and thus to reduce processing time. Regarding Claim 8, combination of Choi, and Compton and Schindler discloses the integrated circuit of Claim 7, wherein the magnetic sensor signal and the shunt signal are digitized with the same ADC (Choi, Paragraph 41, “….Although not shown in FIGS. 2 to 4 for convenience of illustration, the PCB 10 may selectively include an analog-to-digital (ADC) circuit configured to convert a voltage difference between both ends of the shunt resistor 20 and an output of the Hall sensor 30 into current values….”, Schindler, ADC 82 in Figure 4). Regarding Claim 9, combination of Choi, Compton and Schindler discloses the integrated circuit of Claim 8, wherein a switch or a multiplexer is arranged for selecting which of the magnetic sensor signal and the shunt signal are digitized (multiplexer 90 in Figure 4 of Schindler in the combination). Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Choi (US 2021/0048454) in view of Compton et al. (US 2021/0098215) and Franke (US 2009/0278531). Regarding Claim 19, combination of Choi and Compton discloses the integrated circuit of Claim 1, wherein the magnetic sensor is a Hall sensor, configured for measuring a magnetic field difference or a magnetic field gradient, induced by said first current (Choi, Hall sensor 30, Figures 2-6, 8-9, Paragraph 39, Compton, Paragraph 83). Combination of Choi and Compton does not disclose the magnetic sensor comprises at least one horizontal Hall element, or at least one vertical Hall element, or at least one magneto-resistive element, arranged in the vicinity of said electrical conductor portion, and configured for measuring a magnetic field component generated by the current flowing through said electrical conductor portion; or wherein the magnetic sensor comprises at least two horizontal Hall elements or at least two vertical Hall elements or at least two magneto-resistive elements, spaced apart from each other and oriented in parallel. Franke discloses an integrated circuit (Figures 1-5, Abstract) comprising a magnetic sensor that comprises at least one horizontal Hall element, or at least one vertical Hall element, or at least one magneto-resistive element, arranged in the vicinity of said electrical conductor portion (comprising 21, 22a, 22b, Figures 1-2, 4-5), and configured for measuring a magnetic field component generated by the current flowing through said electrical conductor portion; or wherein the magnetic sensor comprises at least two horizontal Hall elements or at least two vertical Hall elements or at least two magneto-resistive elements, spaced apart from each other and oriented in parallel, and configured for measuring a magnetic field difference or a magnetic field gradient, induced by a current (Paragraphs 7, 37, 43). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide in the combination, the magnetic sensor as taught by Franke, to measure magnetic fields aligned in at least two different directions or planes (see Franke, Paragraphs 7-8). Response to Arguments Applicant's arguments filed on 11/13/2025 have been fully considered but they are not persuasive and/or rendered moot in view of new grounds of rejection necessitated by amendments. Applicant’s arguments, on Pages 8-12 of the Remarks toward obviousness rejection of Claims 1-3, 5-6, 11-14, 16-18 and 21 are rendered moot in view of new grounds of rejection (103 rejection of claims using the combination of Compton and Westrick, Jr. is changed to 103 rejection using newly found Choi reference as primary reference and Compton as a secondary reference). Applicant’s arguments, on Pages 8-12 of the Remarks directed toward secondary reference Westrick, Jr. are rendered moot as the reference is not relied upon in the current rejection and the argued upon and/or new limitations are disclosed by the newly found primary reference Choi. Regarding Applicant’s arguments, on Pages 12-14 of the Remarks toward dependent Claims 2-3, 5-6,11-14, 16-18, dependent Claims 4, 10, 15, dependent Claims 7-9 and independent Claim 20 that are directed toward the limitations of Claim 1, please see the response to arguments toward Claim 1 above. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Baldridge (US 2015/0057822) discloses a power controller (200, Figures 1-2) including current detection circuit 108 configured for detecting an overcurrent condition of using an I2T technique (212 in 108); Morimoto (US 2021/0194351) discloses in Figures 2-3, a control IC (22, Figure 2) comprising comparators (51, Figure 2, 64, 65 in 33, Figures 2-3) comparing measured current values with threshold values to detect overcurrent and single-fault. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to LUCY M THOMAS whose telephone number is (571)272-6002. The examiner can normally be reached Mon-Fri 9:30 am - 5:30 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Crystal L Hammond can be reached at (571)270-1682. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /LUCY M THOMAS/Examiner, Art Unit 2838, 1/17/2026. /CRYSTAL L HAMMOND/Supervisory Primary Examiner, Art Unit 2838
Read full office action

Prosecution Timeline

Aug 31, 2023
Application Filed
May 02, 2025
Non-Final Rejection — §103
Nov 13, 2025
Response Filed
Jan 17, 2026
Final Rejection — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12599113
Animal Training Device that Controls Stimulus Using Proportional Pressure-Based Input
2y 5m to grant Granted Apr 14, 2026
Patent 12603488
SYSTEM
2y 5m to grant Granted Apr 14, 2026
Patent 12603490
PROTECTIVE DEVICE WITH MULTI-CHANNEL LINE CURRENT DIFFERENTIAL PROTECTION
2y 5m to grant Granted Apr 14, 2026
Patent 12573834
ELECTRONIC PROTECTION DEVICE FOR AN ELECTRICAL LOAD, POWER SUPPLY SYSTEM FOR AN ELECTRICAL LOAD AND METHOD FOR CONTROLLING SUCH A DEVICE
2y 5m to grant Granted Mar 10, 2026
Patent 12567737
PROGRAMMABLE DC POWER BUS OVER VOLTAGE PROTECTION
2y 5m to grant Granted Mar 03, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

3-4
Expected OA Rounds
63%
Grant Probability
81%
With Interview (+18.6%)
3y 2m
Median Time to Grant
Moderate
PTA Risk
Based on 807 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month