DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Objections
Claim 8 is objected to because the following element lacks proper antecedent basis in the claim:
Line 5: “each unit data”
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 2, 6 and 8-14 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claims 2 and 9 include the limitation “the output signal in accordance with the certain unit data is further delayed”. However there is a lack of antecedent basis for “the certain unit data”. It is unclear whether applicant intends to reference the certain delay setting time period, or introduce a specific unit data. For examining purposes, this limitation is interpreted as stating “the output signal in accordance with a certain unit data is further delayed”.
These claims further include the limitation “the processor sets the delay setting time period”. However there is a lack of antecedent basis for “the processor” as the claims previously describe at least one processor. It is unclear whether applicant intends to reference the at least one processor, or limit the at least one processor to a single processor. For examining purposes, this limitation is interpreted as stating “the at least one processor sets the delay setting time period”.
Claims 6 and 13 include the limitation “if the output of the output signal is largely delayed from the output timing … the at least one processor sets the delay setting time period to be equal to or shorter than the maximum setting time period”. However the claim previously describes that “a maximum setting time period of the delay setting time period is defined”. It is unclear why the delay setting time period is set according to the maximum setting time period since a maximum setting time period is already defined for the delay setting time period. It is further unclear why a largely delayed output of the output signal is needed to trigger setting of the delay setting time period since a delay in output of the output signal would be controlled by a defined amount of delay setting time period.
Claim 8 includes the limitation “in accordance with the unit data, at delayed timing”. However there is a lack of antecedent basis for “the unit data”. It is unclear whether applicant intends to reference each unit data, or further limit each unit data to a single unit data. For examining purposes, this limitation is interpreted as stating “in accordance with a unit data, at delayed timing”.
Claims 9-14 depend from claim 8 and therefore inherit all claimed limitations. These claims do not correct the deficiencies of claim 8.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-15 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. Claims 1, 8 and 15 recite controlling of outputting an output signal in accordance with unit data, at delayed timing after a lapse of a certain delay setting time period from output timing, in response to acquisition of information data with which information on the output timing is associated with respect to each unit data, and if output of the output signal is further delayed from the delayed timing, extending the delay setting time period in accordance with a duration of the further delay.
The claimed limitations are directed to a process, which under its broadest reasonable interpretation, covers performance of the limitation in the mind but for the recitation of generic computer components, e.g. a musician reading music at delayed timing in response to new music being visually observed. If a claim limitation, under its broadest reasonable interpretation, covers performance of the limitation in the mind but for the recitation of generic computer components, then it falls within the “Mental Processes” grouping of abstract ideas. Accordingly, the claim recites an abstract idea.
This judicial exception is not integrated into a practical application. The only additional elements described in the claims are at least one processor, an electronic device, and a non-transitory recording medium, which are described at a high-level of generality such that they amount to no more than mere components and instructions to apply the exception using a generic computer component and known processing algorithms to perform the process. The elements are not described to require any unique components to achieve applicant’s claimed limitations. Accordingly, the additional elements do not integrate the abstract idea into a practical application because they do not impose any meaningful limit of practicing the abstract idea. The claim is directed to an abstract idea.
The claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception because the at least one processor and non-transitory recording medium are considered a generic computer components, and the electronic device is considered a generic component without requiring any additional specific elements. Mere instructions to apply an exception using a generic computer component cannot provide an inventive concept. The dependent claims 2-7 and 9-14 only further define the abstract idea without significantly more, e.g., setting time period, acquiring information data at a certain time interval, defining a maximum setting time period and setting the delay setting time period to be equal to or shorter than the maximum setting time period, and setting the delay setting time period, and do not require any additional unique components.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-5, 7-12, 14 and 15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Goldberg et al. (US 2007/0142944 A1).
Claims 1, 8 and 15: Goldberg et al. discloses an output control method performed in an electronic device including at least one processor, an electronic device including at least one processor, and a non-transitory recording medium storing a program causing a computer of an electronic device to control outputting an output signal at delayed timing (page 31 paragraph [0330]) in accordance with unit data corresponding to time from start of song (page 28 paragraph [0308]) after a lapse of a certain delay setting time period from output timing according to a known latency of a unit based on its hardware and transmission characteristics (page 16 paragraph [0193]). The output signal is outputted in response to acquisition of information data (block codes) with which information on the output timing is associated with respect to each unit data in order to synchronize to a beginning block of information data (page 13 paragraph [0169]). If output of the output signal is further delayed from the delayed timing based on a new member having a very long latency, the delay setting time period is extended in accordance with a duration of the further delay (page 16 paragraph [0193]).
Claims 2 and 9: Goldberg et al. discloses an output control method and electronic device as stated above, where if the output of the output signal in accordance with a certain unit data is further delayed from the delayed timing, the at least one processor sets the delay setting time period pertaining to the output timing of the output signal in accordance with each of the unit data after the certain unit data, to a delay setting time period extended in accordance with the duration (page 16 paragraph [0193]).
Claims 3 and 10: Goldberg et al. discloses an output control method and electronic device as stated above, where each of the information data is acquired at a certain time interval (regular intervals) for one or a plurality of the unit data (page 13 paragraph [0169]).
Claims 4 and 11: Goldberg et al. discloses an output control method and electronic device as stated above, where the information data includes a plurality of the unit data assigned identical output timing information (milliseconds) for synchronization (page 13 paragraph [0172], page 28 paragraph [0308]).
Claims 5 and 12: Goldberg et al. discloses an output control method and electronic device where the at least one processor performs control of outputting the output signal in accordance with the unit data at the delayed timing, as stated above. The at least one processor then generates the output signal to a remote receive unit in accordance with the unit data at the delayed timing (page 31 paragraph [0330]).
Claims 7 and 14: Goldberg et al. discloses an output control method and electronic device as stated above, where the at least one processor sets the delay setting time period to an initial setting value at start of reception of the information data according to a known latency of a unit based on its hardware and transmission characteristics (page 16 paragraph [0193]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 6 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Goldberg et al. (US 2007/0142944 A1) in view of Dickey et al. (US 12,411,649 B2).
Claims 6 and 13: Goldberg et al. discloses an output control method and electronic device as stated above, but fails to disclose a maximum setting time period of the delay setting time period to be defined, and if the output of the output signal is largely delayed from the output timing by a time period longer than the maximum setting time period, the at least one processor to set the delay setting time period to be equal to or shorter than the maximum setting time period.
However Dickey et al. teaches an output control method and electronic device, where a maximum setting time period (maximum end-to-end latency) of a delay setting time period is defined (column 10 lines 29-34). At least one processor then sets the delay setting time period to be equal to the maximum setting time period such that an output of an output signal is equal to or shorter than the maximum setting time period, as is recognized in the art.
Given the teachings of Dickey et al., it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the output control method and electronic device disclosed in Goldberg et al. with providing a maximum setting time period of the delay setting time period to be defined, and the at least one processor to set the delay setting time period to be equal to the maximum setting time period such that the output of the output signal is equal to or shorter than the maximum setting time period. Doing so would require any amount of delay “ to be less than or equal to the maximum human perceivable latency” as taught in Dickey et al. (column 10 lines 40-43) for synchronously hearing a live mix with a same pulse (column 8 lines 52-56).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US 9,857,934 B2, US 7,902,446 B2 pertaining to correcting latency in an output audio track and US 6,175,872 B1 pertaining to applying a delay to received MIDI data.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHRISTOPHER UHLIR whose telephone number is (571)270-3091. The examiner can normally be reached M-F 8:30-4.
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/Christopher Uhlir/Primary Examiner, Art Unit 3619 July 24, 2026
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