DETAILED ACTION
Status of Case
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This Office Action is in response to the restriction response filed on 9/5/2025
Claims 1-20 are pending, with claims 17-20 being withdrawn.
Election/Restrictions
Applicant’s response to the restriction requirement is hereby acknowledged. Applicant has elected Group I, claims 1-16, without traverse.
Information Disclosure Statement
The information disclosure statement (IDS) filed on 12/1/2025 has been considered by Examiner.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1, 4, 9, and 13 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 7, 10, and 14 of U.S. Patent No. 12,483,380. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims are nearly very similar, except for the instant application reciting a broader term of “an expected transmitted data signal,” which the 12,483,380 patent recites as a narrower term of a “reference signal” (see correspondence table below).
Instant Application
U.S. Patent No. 12,483,380
1. A method for tracking frequency and phase offset in a receiver, the method comprising: providing a baseband version of a received radio frequency signal; computing an error signal based on the baseband version of the received radio frequency signal and an expected transmitted data signal; generating an error correction signal based on a phase of the error signal and a predicted instantaneous phase signal; and providing a corrected baseband version of the received radio frequency signal based on the baseband version of the received radio frequency signal and the error correction signal.
1. A method for tracking frequency and phase offset in a receiver, the method comprising: computing an error signal based on a baseband version of a received radio frequency signal and a reference signal; generating an error correction signal based on a phase of the error signal and a predicted instantaneous phase signal; and providing a corrected baseband version of the received radio frequency signal based on the baseband version of the received radio frequency signal and the error correction signal.
4. The method as recited in claim 1 wherein generating the error correction signal comprises: generating a phase difference signal based on the phase of the error signal and a prior value of the predicted instantaneous phase signal; and combining a proportional version of the phase difference signal with an integrated version of the phase difference signal to generate a predicted frequency signal.
7. The method as recited in claim 1 wherein generating the error correction signal comprises: generating a phase difference signal based on the phase of the error signal and a prior value of the predicted instantaneous phase signal; and combining a proportional version of the phase difference signal with an integrated version of the phase difference signal to generate a predicted frequency signal.
9. A wireless communications device comprising: a receiver front-end circuit configured to provide a baseband version of a received radio frequency signal; and a demodulator comprising: a phase detector configured to provide an error signal generated based on the baseband version of the received radio frequency signal and an expected transmitted data signal; a phase-locked loop configured to generate an error correction signal based on a phase of the error signal and a predicted instantaneous phase of the error signal; and a correction circuit configured to provide a corrected baseband version of the received radio frequency signal based on the baseband version of the received radio frequency signal and the error correction signal.
10. A wireless communications device comprising: a receiver comprising: a phase detector configured to provide an error signal generated based on a baseband version of a received radio frequency signal and an expected transmitted data signal; a phase-locked loop configured to generate an error correction signal based on a phase of the error signal and a predicted instantaneous phase of the error signal; and a correction circuit configured to provide a corrected baseband version of the received radio frequency signal based on the baseband version of the received radio frequency signal and the error correction signal.
13. The wireless communications device as recited in claim 9 wherein the phase-locked loop comprises: a phase difference circuit configured to generate a phase error signal based on a phase of the error signal and the predicted instantaneous phase of the error signal; a proportional integral time-invariant controller responsive to the phase error signal; and an integrator configured to generate the predicted instantaneous phase of the error signal based on an output of the proportional integral time-invariant controller.
14. The wireless communications device as recited in claim 10 wherein the phase-locked loop comprises: a phase difference circuit configured to generate a phase error signal based on a phase of the error signal and the predicted instantaneous phase of the error signal; a proportional integral time-invariant controller responsive to the phase error signal; and an integrator configured to generate the predicted instantaneous phase of the error signal based on an output of the proportional integral time-invariant controller.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 8, 9, 16 are rejected under 35 U.S.C. 103 as being unpatentable over Kondo (USPAN 2016/0380759) in view of Shiino (USPN 5,751,776) and Beale (WO2018/114325A1).
Consider claims 1 and 9, Kondo discloses a method for tracking frequency and phase offset in a receiver (see abstract, claim 1, and figure 7 (reproduced below for convenience), wherein disclosed is said method), and a corresponding wireless communications device (see figure 7, wherein disclosed is said device) comprising:
a demodulator comprising: a phase detector configured to provide an error signal generated based on the baseband version of the received radio frequency signal and an expected transmitted data signal (see abstract and claim 1: an error generator to generate an error signal based on a reference signal and an oscillation signal);
a phase-locked loop (see paragraph 29: phase locked loop 1) configured to generate an error correction signal based on a phase of the error signal (see abstract and claim 1: a glitch corrector to correct the frequency error signal to generate and output a glitch-corrected signal and the frequency error signal and a phase error generator to generate a phase error by integrating an output signal of the glitch corrector); and
PNG
media_image1.png
372
584
media_image1.png
Greyscale
Kondo does not specifically disclose generating an error correction signal based on a predicted instantaneous phase signal.
Shiino discloses generating an error correction signal based on a predicted instantaneous phase signal (see claim 1: a phase error detecting means and a means for correcting the phase comprising a means for receiving a second coefficient to thereby obtain the instantaneous value of the phase error).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Kondo and combine it with the noted teachings of Shiino. The motivation to combine these references is to provide a method for compensating for frequency offset of a carrier in a receiver and to a phase locked loop suitably employed in the receiver (see col. 1 lines 11-18 of Shiino).
Kondo does not specifically disclose a receiver front-end circuit configured to provide a baseband version of a received radio frequency signal; and a correction circuit configured to provide a corrected baseband version of the received radio frequency signal based on the baseband version of the received radio frequency signal and the error correction signal.
Beale discloses a receiver front-end circuit configured to provide a baseband version of a received radio frequency signal; and a correction circuit configured to provide a corrected baseband version of the received radio frequency signal based on the baseband version of the received radio frequency signal and the error correction signal (see page 7 line 33 to page 8 line 8: providing a baseband version of a received signal and then providing a corrected baseband signal after performing error correction processing).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Kondo and combine it with the noted teachings of Beale. The motivation to combine these references is to provide an improved method of transmitting data in which the delay in transmitting/receiving data can be reduced and a size of an interleaver memory for interleaving and de-interleaving can be reduced (see page 2 lines 32-38 of Beale).
Consider claims 8 and 16, Kondo does not specifically disclose the received radio frequency signal includes data modulated using quadrature amplitude modulation or phase-shift keying
Beale discloses the received radio frequency signal includes data modulated using quadrature amplitude modulation or phase-shift keying (see page 8 lines 31-33: the data is modulated using quadrature amplitude modulation (QAM)).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Kondo and combine it with the noted teachings of Beale. The motivation to combine these references is to provide an improved method of transmitting data in which the delay in transmitting/receiving data can be reduced and a size of an interleaver memory for interleaving and de-interleaving can be reduced (see page 2 lines 32-38 of Beale).
Claims 6-7 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Kondo (USPAN 2016/0380759) in view of Shiino (USPN 5,751,776), Beale (WO2018/114325A1), and Gamage (USPAN 2012/0134398).
Consider claim 6, although Kondo discloses generating the phase of the error signal (see above), Kondo does not specifically disclose generating phase information by converting the error signal from Cartesian coordinates to polar coordinates.
Gamage discloses generating phase information by converting the error signal from Cartesian coordinates to polar coordinates (see paragraph 56: converting between Cartesian and Polar coordinates in order to compute a difference in phase angles).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Kondo and combine it with the noted teachings of Gamage. The motivation to combine these references is to provide a method to determine frequency and timing offset estimation for digital television receivers (see paragraph 1 of Gamage).
Consider claim 7, although Kondo discloses providing the corrected baseband version of the received radio frequency signal (see above), Kondo does not specifically disclose converting the error signal from polar coordinates to Cartesian coordinates.
Gamage discloses converting the error signal from polar coordinates to Cartesian coordinates (see paragraph 56: converting between Cartesian and Polar coordinates in order to compute a difference in phase angles).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Kondo and combine it with the noted teachings of Gamage. The motivation to combine these references is to provide a method to determine frequency and timing offset estimation for digital television receivers (see paragraph 1 of Gamage).
Consider claim 14, although Kondo discloses providing the corrected baseband version of the received radio frequency signal (see above), Kondo does not specifically disclose a converter circuit configured to convert the error signal from Cartesian coordinates to polar coordinates including the phase of the error signal, wherein the correction circuit includes a second converter circuit configured to convert the error correction signal from polar coordinates to Cartesian coordinates.
Gamage discloses a converter circuit configured to convert the error signal from Cartesian coordinates to polar coordinates including the phase of the error signal, wherein the correction circuit includes a second converter circuit configured to convert the error correction signal from polar coordinates to Cartesian coordinates (see paragraph 56: converting between Cartesian and Polar coordinates in order to compute a difference in phase angles, which would require a first converter that allows converting from Cartesian coordinates to polar coordinates and a second converter to convert polar coordinates to Cartesian coordinates).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Kondo and combine it with the noted teachings of Gamage. The motivation to combine these references is to provide a method to determine frequency and timing offset estimation for digital television receivers (see paragraph 1 of Gamage).
Allowable Subject Matter
Claims 2-5, 10-13, and 15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim 2 is objected to because the prior art does not disclose being in a training mode of operation and having the expected transmitted data signal include predetermined samples of an Access Address field of a Bluetooth Low Energy packet.
Claim 3 is objected to because the prior art does not disclose that the expected transmitted data signal is based on a prior value of the corrected baseband version of the signal.
Claim 4 is objected to because the prior art does not disclose combining a proportional version of the phase difference signal with an integrated version of the phase difference signal to generate a predicted frequency signal.
Claim 5 is objected to by virtue of being dependent on claim 4.
Claim 10 is objected because the prior art does not disclose providing the expected transmitted data signal based on a mode of operation of the device.
Claims 11-12 are objected to by virtue of being dependent on claim 10.
Claim 13 is objected to due to the prior art being silent about generating the predicated instantaneous phase of the error signal based on an output of the proportional integral time-invariant controller.
Claim 15 is objected by virtue of being dependent on claim 12.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Jamal Javaid whose telephone number is 571-270-5137 and email address is Jamal.Javaid@uspto.gov.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Charles Jiang, can be reached on 571-270-7191. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free).
/JAMAL JAVAID/
Primary Examiner, Art Unit 2412