Prosecution Insights
Last updated: May 29, 2026
Application No. 18/243,632

CURRENT SHUNT WITH CANCELING MUTUAL INDUCTANCE

Non-Final OA §102§103
Filed
Sep 07, 2023
Priority
Sep 12, 2022 — provisional 63/405,837
Examiner
MONSUR, NASIMA
Art Unit
2858
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Tektronix Inc.
OA Round
1 (Non-Final)
78%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 78% — above average
78%
Career Allowance Rate
466 granted / 594 resolved
+10.5% vs TC avg
Strong +26% interview lift
Without
With
+26.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
37 currently pending
Career history
644
Total Applications
across all art units

Statute-Specific Performance

§101
0.6%
-39.4% vs TC avg
§103
82.0%
+42.0% vs TC avg
§102
8.3%
-31.7% vs TC avg
§112
8.3%
-31.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 594 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement (IDS) submitted on 9/07/2023 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Election/Restrictions Applicant’s election without traverse of Species B (i.e., Figure 2 and claims 1-2, 9-17) in the reply filed on 4/17/2026 is acknowledged. Claims 3-8 withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Species A, C, D, E, F, G, H there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 4/17/2026. Therefore, claims 1-2 and 9-17 have been examined on the merits in this Office action. Claim status Claims 1-17 are pending. Claims 3-8 are withdrawn. Claims 1-2 and 9-17 have been examined on the merits. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-2 and 9 are rejected under 35 U.S.C. 102 (a) (1) as being anticipated by NAKAMURA et al. (Hereinafter, “Nakamura”) in the US patent Application Publication Number US 20200051717 A1. Regarding claim 1, Nakamura teaches a shunt resistor (A shunt resistor structure in which electrodes and a resistive element are laminated; Paragraph [0011] Line 1-3; FIGS. 5A, 5B and 5C depict a configuration example of a current sensing resistor according to a fourth embodiment of the present invention; Paragraph [0024] Line 1-3; FIGS. 6A and 6B depict an example of a mounting structure for mounting the current sensing resistor according to the fourth embodiment of the present invention onto a substrate; Paragraph [0025] Line 1-4), comprising: a substrate [11] (As depicted in FIG. 6A, wiring patterns (current line, main path) 7, 7 of Cu are formed on a substrate 11; Paragraph [0061] Line 4-5) having electrically conductive structures [7,7] to carry current in a current path (As depicted in FIG. 6A, wiring patterns (current line, main path) 7, 7 of Cu are formed on a substrate 11; Paragraph [0060] Line 4-5; The electrodes are suitable for connection by wire bonding, a vertical current path with respect to a substrate or the like for mounting is obtained; Paragraph [0011] Line 3-5; With this configuration, it is possible to cancel a magnetic flux when a current is flowed between the wiring patterns 7a, 7b, as noted above, and to reduce the influence of inductance; Paragraph [0061] Line 1-4); a resistive portion [A=1+3+3a+5] (The shunt resistor A according to the present embodiment includes a first electrode 1 and a resistive element 5 that are ring-shaped and have a through-hole, and a disc-shaped second electrode 3 formed underneath and having a protruding shape; Paragraph [0057] Line 1-5) in electrical contact with the electrically conductive structures [7,7] (The second electrode 3 on the lower surface of the shunt resistor A may be adhered to the substrate without providing the pattern 7x. The wire W2 connects a wiring pattern 7a with the first electrode 1. The wire W1 connects a wiring pattern 7b with the protrusion 3a; Paragraph [0060] Line 11-16; In addition, the voltage-sensing wires can be preferably connected to the first electrode 1 and the protrusion 3a (second electrode) on the upper surface side of the shunt resistor A; Paragraph [0061] Line 4-7; Figure 6A: Modified Figure 6A of Nakamura below shows a resistive portion [A] in electrical contact with the electrically conductive structures [7,7] through wires W1 and W2); and PNG media_image1.png 359 783 media_image1.png Greyscale Figure 6A: Modified Figure 6A of Nakamura one or more canceling inductance leads [W1, W2] (bonding wire W1 and W2 as the canceling inductance leads as it cancels the inductance) (The shape insulates (electrically floats) the connecting portion of the second electrode 3 on the lower surface, and ensures a current path from the first electrode 1 on the upper surface only through a bonding wire that is not depicted. Then, a current flow becomes a current that cancels a magnetic flux, making it possible to also cancel the influence of inductance; Paragraph [0059] Line 5-11; bonding wires W1 and W2 as canceling inductance leads) electrically connected to the electrically conductive structures [7] and the resistive portion [A] (The wire W2 connects a wiring pattern 7a with the first electrode 1. The wire W1 connects a wiring pattern 7b with the protrusion 3a; Paragraph [0060] Line 14-16; Figure 6A: Modified Figure 6A of Nakamura above shows one or more canceling inductance leads [W1, W2] electrically conductive structures [7] and the resistive portion [A]), the one or more canceling inductance leads [W1, W2] configured to cancel inductive effects in a voltage measurement [V] across the resistive portion [A] (With this configuration, it is possible to cancel a magnetic flux when a current is flowed between the wiring patterns 7a, 7b, as noted above, and to reduce the influence of inductance. In addition, the voltage-sensing wires can be preferably connected to the first electrode 1 and the protrusion 3a (second electrode) on the upper surface side of the shunt resistor A. Accordingly, the upper surface side of the shunt resistor A may be used for sensing voltage, while the lower surface may be used for a heat-dissipating path; Paragraph [0061] Line 1-9; The shape insulates (electrically floats) the connecting portion of the second electrode 3 on the lower surface, and ensures a current path from the first electrode 1 on the upper surface only through a bonding wire that is not depicted. Then, a current flow becomes a current that cancels a magnetic flux, making it possible to also cancel the influence of inductance; Paragraph [0059] Line 5-11). Regarding claim 2, Nakamura teaches a shunt resistor, wherein: the electrically conductive structures comprise caps [7a, 7b] (wiring pattern 7a and 7b as the cap of the conductive structure 7) (The wire W2 connects a wiring pattern 7a with the first electrode 1. The wire W1 connects a wiring pattern 7b with the protrusion 3a. Paragraph [0060] Line 14-16) on opposite ends of the substrate [11] (Figure 6A: Modified Figure 6A of Nakamura above shows the electrically conductive structures comprise caps [7a, 7b] on opposite ends of the substrate [11]); the resistive portion [A] (The shunt resistor A according to the present embodiment includes a first electrode 1 and a resistive element 5 that are ring-shaped and have a through-hole, and a disc-shaped second electrode 3 formed underneath and having a protruding shape. The first electrode 1 and the second electrode 3 have different areas that appear on the outer surfaces of the shunt resistor; Paragraph [0057] Line 1-7) resides on and is in contact with the substrate [11] (The second electrode 3 on the lower surface of the shunt resistor A may be adhered to the substrate; Paragraph [0060] Line 11-13; Figure 6A: Modified Figure 6A of Nakamura above shows the resistive portion [A] resides on and is in contact with the substrate [11]); an insulator [17] resides on and is in contact with the resistive portion [A] (A groove O is formed between the protrusion 3a of the second electrode 3 and the ring-shaped first electrode and resistive element 5. The groove O may be filled with an insulator 17, as depicted in FIG. 5B. For example, as the insulator 17, epoxy resin, cement material, ceramic paste or the like may be filled in the groove O. In another example, a member obtained by processing an insulating material, such as ceramic, into a shape that can be fitted in the groove O may be accommodated in the groove O and fixed by an adhesive, for example; Paragraph [0057] Line 11-20; Figure 6A: Modified Figure 6A of Nakamura above shows an insulator [17] resides on and is in contact with the resistive portion [A]); and the one or more canceling inductance leads [W1, W2] reside on and are in contact with the insulator [17] (Figure 6A: Modified Figure 6A of Nakamura above shows the one or more canceling inductance leads [W1, W2] reside on and are in contact with the insulator [17]), each lead [W1, W2] extending from one of the caps [7a, 7b] on opposite ends of the substrate [11] (The wire W2 connects a wiring pattern 7a with the first electrode 1. The wire W1 connects a wiring pattern 7b with the protrusion 3a; Paragraph [0060] Line 14-16; Figure 6A: Modified Figure 6A of Nakamura above shows each lead [W1, W2] extending from one of the caps [7a, 7b] on opposite ends of the substrate [11]). Regarding claim 9, Nakamura teaches a shunt resistor, wherein at least one of the resistive portion [A] (The second electrode 3 as the resistive portion on the lower surface of the shunt resistor A may be adhered to the substrate; Paragraph [0060] Line 13-15), the electrically conductive structures [7], and the leads [W1, W2], are one of painted or printed onto the substrate [11] (FIG. 6A depicts an example of such mounting structure, illustrating an example of a mounting structure for the current sensing resistor according to the fourth embodiment. As depicted in FIG. 6A, wiring patterns (current line, main path) 7, 7 of Cu are formed on a substrate 11; Paragraph [0060] Line 1-5; Figure 6A: Modified Figure 6A of Nakamura above shows the resistive portion [A], the electrically conductive structures [7] are one of painted or printed onto the substrate [11]). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 10-17 are rejected under 35 U.S.C. 103 as being unpatentable over Swaim et al. (Hereinafter, “Swaim”) in the US Patent Application Publication Number US 20210063440 A1 in view of Nakamura ‘717 A1. Regarding claim 10, Swaim teaches a modular tip interconnect (A probe is connectable to a test instrument for measuring signals of a DUT, where the probe includes a probe head that includes multiple leads configured to connect to signal probe points of the DUT, and a sensor connected between two of the leads; Abstract; FIG. 1 is a simplified block diagram of a probe connectable to a test instrument for measuring signals of a device under test (DUT); Paragraph [0004] Line 1-3), comprising: a connector (wire connected between test and measurement instrument 170 (with the interconnect 122, 121) and the cable 133A, 133B) at a first end of the interconnect [122, 121] (probe output 121, 121 as the first end of the interconnect) configured to connect to a probe of a test and measurement instrument [170] (The probe 100 also includes two probe outputs for connecting to the test instrument 170. In the depicted embodiment, the probe outputs include first (primary) probe output 121 and second (optional) probe output 122; Paragraph [0022] Line 1-4); and a shunt resistor [131] (Also, the resistor 131 may be a coaxial shunt, which is essentially a sense resistor constructed in a coaxial manner; Paragraph [0025] Line 10-12) located at a second end of the interconnect [111, 112] (probe inputs 111, 112, 113 as the second end) configured to connect to a device under test (DUT) [160] (In addition, the probe 100 includes a sensor 130 connected to each of the first and second probe inputs 111 and 112 for detecting current and voltage at the signal probe points of the DUT 160; Paragraph [0024] Line 1-4; In the depicted embodiment, the sensor 130 includes a resistor 131 through which DUT current passes between the first and second probe inputs 111 and 112 for detecting the current and voltage; Paragraph [0025] Line 1-4). Swaim fails to teach the shunt resistor comprising: a substrate having electrically conductive structures to carry current in a current path; a resistive portion in electrical contact with the electrically conductive structures; and one or more canceling inductance leads electrically connected to the electrically conductive structures and the resistive portion, the one or more canceling inductance leads configured to cancel inductive effects in a voltage measurement across the resistive portion. Nakamura teaches a shunt resistor structure in which electrodes and a resistive element are laminated (Paragraph [0011] Line 1-3; FIGS. 5A, 5B and 5C depict a configuration example of a current sensing resistor according to a fourth embodiment of the present invention; Paragraph [0024] Line 1-3; FIGS. 6A and 6B depict an example of a mounting structure for mounting the current sensing resistor according to the fourth embodiment of the present invention onto a substrate; Paragraph [0025] Line 1-4), comprising: a substrate [11] (As depicted in FIG. 6A, wiring patterns (current line, main path) 7, 7 of Cu are formed on a substrate 11; Paragraph [0061] Line 4-5) having electrically conductive structures [7,7] to carry current in a current path (As depicted in FIG. 6A, wiring patterns (current line, main path) 7, 7 of Cu are formed on a substrate 11; Paragraph [0060] Line 4-5; The electrodes are suitable for connection by wire bonding, a vertical current path with respect to a substrate or the like for mounting is obtained; Paragraph [0011] Line 3-5; With this configuration, it is possible to cancel a magnetic flux when a current is flowed between the wiring patterns 7a, 7b, as noted above, and to reduce the influence of inductance; Paragraph [0061] Line 1-4); a resistive portion [A=1+3+3a+5] (The shunt resistor A according to the present embodiment includes a first electrode 1 and a resistive element 5 that are ring-shaped and have a through-hole, and a disc-shaped second electrode 3 formed underneath and having a protruding shape; Paragraph [0057] Line 1-5) in electrical contact with the electrically conductive structures [7,7] (The second electrode 3 on the lower surface of the shunt resistor A may be adhered to the substrate without providing the pattern 7x. The wire W2 connects a wiring pattern 7a with the first electrode 1. The wire W1 connects a wiring pattern 7b with the protrusion 3a; Paragraph [0060] Line 11-16; In addition, the voltage-sensing wires can be preferably connected to the first electrode 1 and the protrusion 3a (second electrode) on the upper surface side of the shunt resistor A; Paragraph [0061] Line 4-7; Figure 6A: Modified Figure 6A of Nakamura above shows a resistive portion [A] in electrical contact with the electrically conductive structures [7,7] through wires W1 and W2); and one or more canceling inductance leads [W1, W2] (bonding wire W1 and W2 as the canceling inductance leads as it cancels the inductance) (The shape insulates (electrically floats) the connecting portion of the second electrode 3 on the lower surface, and ensures a current path from the first electrode 1 on the upper surface only through a bonding wire that is not depicted. Then, a current flow becomes a current that cancels a magnetic flux, making it possible to also cancel the influence of inductance; Paragraph [0059] Line 5-11; bonding wires W1 and W2 as canceling inductance leads) electrically connected to the electrically conductive structures [7] and the resistive portion [A] (The wire W2 connects a wiring pattern 7a with the first electrode 1. The wire W1 connects a wiring pattern 7b with the protrusion 3a; Paragraph [0060] Line 14-16; Figure 6A: Modified Figure 6A of Nakamura above shows one or more canceling inductance leads [W1, W2] electrically conductive structures [7] and the resistive portion [A]), the one or more canceling inductance leads [W1, W2] configured to cancel inductive effects in a voltage measurement [V] across the resistive portion [A] (With this configuration, it is possible to cancel a magnetic flux when a current is flowed between the wiring patterns 7a, 7b, as noted above, and to reduce the influence of inductance. In addition, the voltage-sensing wires can be preferably connected to the first electrode 1 and the protrusion 3a (second electrode) on the upper surface side of the shunt resistor A. Accordingly, the upper surface side of the shunt resistor A may be used for sensing voltage, while the lower surface may be used for a heat-dissipating path; Paragraph [0061] Line 1-9; The shape insulates (electrically floats) the connecting portion of the second electrode 3 on the lower surface, and ensures a current path from the first electrode 1 on the upper surface only through a bonding wire that is not depicted. Then, a current flow becomes a current that cancels a magnetic flux, making it possible to also cancel the influence of inductance; Paragraph [0059] Line 5-11). The purpose of doing so is to obtain a current sensing shunt resistor that has good heat dissipation and high reliability, to reduce the size of apparatus, minimizing the footprint of components such as a shunt resistor to provide small-sized, and to have small inductance, to reduce self-inductance value, to provide a shunt resistor structure which is very small and low-profile and has excellent mounting properties and good high frequency characteristics. It would have obvious to one having ordinary skill in the art before the effective filing date of the claimed invention, to modify the shunt resistor of Swaim by the shunt resistor disclosed by Nakamura, because Nakamura teaches to include the substrate, resistive portion and canceling inductance lead of the shunt resistor obtains a current sensing shunt resistor that has good heat dissipation and high reliability (Paragraph [0007), reduces the size of apparatus, minimizing the footprint of components such as a shunt resistor (Paragraph [0009]), provides small-sized, and have small inductance (Paragraph [0010]), reduces self-inductance value (Paragraph [0011), provides a shunt resistor structure which is very small and low-profile and has excellent mounting properties and good high frequency characteristics (Paragraph [0019]). Regarding claim 11, Swaim teaches a modular tip interconnect, further comprising a cable [133A, 133B] (lead 133A as the cable) (The sensor 130 is connected to the current detection circuit 133 and the voltage detection circuit 135, mentioned above. The current detection circuit 133 includes a first lead 133A connected to the first node 130A of the sensor 130; Paragraph [0026] Line 1-5) between the connector (the wire between the cable and the interconnect 122, 121) and the shunt resistor [131] (Figure 1 shows that a cable between the connector and the shunt resistor [131]). Regarding claim 12, Swaim teaches a modular tip interconnect, wherein the cable comprises one of a differential cable, a coaxial cable, or a twisted pair cable (Then, the probe head 106 may be replaced with another probe head associated with geometries and/or performance requirements of another DUT. When removably connected, the probe head 106 may be include any type of compatible connectors for connecting to the circuitry of the base 105 (e.g., current detection circuit 133 and voltage detection circuit 135, discussed below), such as subminiature version A (SMA) connectors, micro coaxial connector (MCX) connectors, micro-miniature coaxial (MMCX) connectors, or custom coaxial or non-coaxial connectors, for example; Paragraph [0020] Line 8-18). Regarding claim 13, Swaim teaches a modular tip interconnect, wherein the shunt resistor [131] resides in an intermediate structure [130] (sensor 130 as the intermediate structure which includes shunt resistor 131) (In the depicted embodiment, the sensor 130 includes a resistor 13; Paragraph [0025] Line 1-2; Figure 1 shows that wherein the shunt resistor resides in an intermediate structure between the cable and the DUT [160]) between the cable [133A] (lead 133A as the cable) (The sensor 130 is connected to the current detection circuit 133 and the voltage detection circuit 135, mentioned above. The current detection circuit 133 includes a first lead 133A connected to the first node 130A of the sensor 130; Paragraph [0026] Line 1-5) and the DUT [160] (Figure 1 shows that the shunt resistor [131] resides in an intermediate structure [130] between the cable [133A] and the DUT [160]). Regarding claim 14, Swaim teaches a modular tip interconnect, wherein the shunt resistor [131] connects to an interconnect [[115, 116, 117] on the DUT [160] (The first and second signal leads 115 and 116 and the ground lead 117 are flexible, and may be provided in various lengths to facilitate connections to the signal probe points and ground of the DUT 160; Paragraph [0021] Line 23-26). Regarding claim 15, Swaim teaches a modular tip interconnect, wherein the interconnect [115, 116, 117] to the DUT [160] comprises one of wires or a sculpted flexible circuit (The first and second signal leads 115 and 116 and the ground lead 117 are flexible, and may be provided in various lengths to facilitate connections to the signal probe points and ground of the DUT 160; Paragraph [0021] Line 23-26). Regarding claim 16, Swaim teaches a modular tip interconnect, wherein the leads land on the flex circuit (The first and second signal leads 115 and 116 and the ground lead 117 are flexible, and may be provided in various lengths to facilitate connections to the signal probe points and ground of the DUT 160; Paragraph [0021] Line 23-26). Regarding claim 17, Swaim teaches a modular tip interconnect, wherein the shunt resistor [131] is configured to be soldered directly to the DUT [160] (The probe head 106 is connected to the DUT (e.g., DUT 160) by soldering, for example, the first and second probe inputs 111 and 112 to open ends of a broken trace in the DUT; Paragraph [0056] Line 3-6; The sensor 130 is in the probe head 106; Paragraph [0024] Line 11-12; shunt resistor is in the current sensor and current sensor is in the probe head and probe head is connected to the DUT by soldering. Therefore, the shunt resistor [131] is configured to be soldered directly to the DUT). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: NAKAMURA et al. (US 20190227104 A1) discloses, “SHUNT RESISTOR MOUNTING STRUCTURE AND MOUNTING BOARD- [0001] The present invention relates to a mounting structure and the like for a shunt resistor for sensing current. [0051] FIG. 8 illustrates a configuration example of the shunt resistor mounting structure according to a first embodiment of the present invention. FIG. 8A is a perspective view illustrating the configuration before the shunt resistor is mounted. FIG. 8B is a perspective view illustrating the configuration after the shunt resistor is mounted. [0052] As illustrated in FIG. 8, the shunt resistor mounting structure according to the present embodiment includes one of the shunt resistors 1 described above with reference to FIG. 1 to FIG. 5 and FIG. 7, and a mounting board A for mounting the shunt resistor 1. [0053] The shunt resistor 1 is a resistor which is provided with, e.g., a pair of terminal portions (first and second electrodes) 5a, 5b described above, and adapted for sensing current. [0057] The mounting board A includes a board (substrate) 11 comprising a glass epoxy board, for example, and a first line pattern 17a and a second line pattern 17b which are formed of electrically conductive patterns of copper foil and the like, for example, on one surface of the board 11. [0061] 3) The resistor is placed (see FIG. 8A, L1), whereby one is wired. [0063] The first line pattern 17a and the second line pattern 17b are respectively electrically connected to the pair of terminal portions 5a, 5b of the shunt resistor 1, so that a current to be measured can flow through the shunt resistor 1. The locations of the line patterns 17a, 17b to which the terminal portions 5a, 5b are connected are herein referred to as a pair of lands 31a, 31b. [0073] FIG. 11 shows plan views comparatively illustrating the mounting structure according to the first or the second embodiment (FIG. 11A) and a general mounting structure (FIG. 11B). In the mounting structure illustrated in FIG. 11B, the first voltage terminal 25 and the second voltage terminal 27 are respectively led out from the first line pattern 17a and the second line pattern 17b by means of lead-out line portions 25c, 25d. Accordingly, a measurement error due to a magnetic flux inductance generated in a region indicated by sign AR1 cannot be disregarded. [0074] Comparing FIG. 11A with FIG. 11B, in the structure of FIG. 11A corresponding to the present embodiment, the lead-out lines intersect each other in a spatially separated manner. In this way, the measurement error due to the magnetic flux inductance can be suppressed- Therefore NAKAMURA discloses all the limitation of independent claim 1 however NAKAMURA does not disclose an insulator resides on and is in contact with the resistive portion; and the one or more canceling inductance leads reside on and are in contact with the insulator.” Any inquiry concerning this communication or earlier communications from the examiner should be directed to NASIMA MONSUR whose telephone number is (571)272-8497. The examiner can normally be reached 10:00 am-6:00 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eman Alkafawi can be reached at (571) 272-4448. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /NASIMA MONSUR/Primary Examiner, Art Unit 2858
Read full office action

Prosecution Timeline

Sep 07, 2023
Application Filed
May 06, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
78%
Grant Probability
99%
With Interview (+26.2%)
2y 7m (~0m remaining)
Median Time to Grant
Low
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