DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 06 April 2023 and 27 June 2023 were filed prior to the mailing date of this office correspondence. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Election/Restrictions
Applicant’s election without traverse of Invention II, claims 12-22 in the reply filed on 15 January 2026 is acknowledged.
Claims 1-3, 5-7 and 9-11 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Invention II, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 15 January 2026.
Specification
The disclosure is objected to because of the following informalities:
Specification para. [0033] “The PCB also includes a first PCB connection pad 146 and a second PCB connection pad on the first major surface 148” should read:
-- The PCB also includes a first PCB connection pad 146 and a second PCB connection pad 148 on the first major surface 142.
Appropriate correction is required.
Claim Objections
Claims 12, 17 and 19 are objected to because of the following informalities:
In claim 12, line 3: “the die comprising” should read:
-- the die comprising: --
In claim 17, lines 1-2: “further comprising first and second die electrical connection pads” should read:
-- further comprising the first and second die electrical connection pads --
line 4: “electrical connection pads comprise gold” should read:
-- electrical connection pads comprise gold. --
In claim 19, line 1: “wherein first and second electrical connection pads” should read:
-- wherein the first and second electrical connection pads --
Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 12-13, 15-17 and 20-21 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kehrer (US 20140231974).
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Annotated Fig. 3d, Kehrer.
Regarding claim 12, Kehrer teaches, an assembly (module 320, Fig. 3d) comprising:
a bulk acoustic wave acoustic sensor die (semiconductor device 328, Fig. 3d, semiconductor device 328 may be a filter (SAW, BAW, FBAR), para. [0038]) having a first and an opposing second major surface (see Fig. 3d), the die comprising
a piezoelectric structure (FBAR devices generally may comprise a piezoelectric material sandwiched between two electrodes, para. [0024]),
a first and a second electrode (FBAR devices generally may comprise a piezoelectric material sandwiched between two electrodes and acoustically isolated from a surrounding medium, para. [0024]) electrically connected to the piezoelectric structure (para. [0024] anticipates a first and a second electrode connected to FABR), and
an active surface (see, annotated Fig. 3d) on the first major surface of the die;
a printed circuit board (PCB) (support substate 322, Fig. 3d, support substrate 322, e.g., a leadframe, a glass core based substrate, or a printed circuit board (PCB), para. [0048), the PCB having a first major surface and an opposing second major surface (see annotated Fig. 3d) and comprising:
a slot (see annotated Fig. 3d) spanning from the first major surface to the second major surface through the PCB (see PCB 322);
a first bond (one of the solder bumps 334, see annotated Fig. 3d) electrically and mechanically connecting the die to the PCB (solder bumps or pillar bumps 334 are used to electrically connect the second semiconductor device 328 to the contact pads 336 of the support substrate 322, para. [0046]); and
a second bond (other solder bump 334, annotated Fig. 3d) electrically and mechanically connecting the die to the PCB,
wherein the first and the second bonds are located on either side of the slot through the PCB and the active surface of the die is above the slot in the PCB (see the slots and the soler bumps 334 in Fig. 3d).
Regarding claim 13, Kehrer teaches the recited limitations with respect to claim 12. Kehrer further teaches, the assembly according to claim 12, wherein the first and the second bonds were formed by fusing a first and a second electrical connection bump (solder bumps or pillar bumps 334) on the first major surface of the die with first and second electrical connection pads (contact pads 336, Fig. 3d) on the first major surface of the PCB (solder bumps or pillar bumps 334 are used to electrically connect the second semiconductor device 328 to the contact pads 336 of the support substrate 322, para. [0046]).
Regarding claim 15, Kehrer teaches the recited limitations with respect to claim 12. Kehrer further teaches, the assembly according to claim 12, wherein the PCB further comprises a metallic underlayer mechanically and electrically connected to the first and the second bonds respectively (the support substrate 302 may be a leadframe, a glass core based substrate, or a printed circuit board (PCB),… comprise a conductive material such as nickel (Ni) or copper (Cu)…or may be plated with a metal layer stack such as palladium/gold (Pd/Au)… may comprise metalized contact pads from the conductive material described above or from another conductive material such as Nickel (Ni) or aluminum (Al), para. [0019], which anticipates a conductive layer mechanically and electrically connecting the bond pads).
Regarding claim 16, Kehrer teaches the recited limitations with respect to claim 13. Kehrer further teaches, the assembly according to claim 13, wherein the first and the second electrical connection bumps on the first major surface of the die comprise gold (the contacts may be a binary tin/gold (Sn/Au) alloy layer formed above the contact pads 332 and a binary copper/tin (Cu/Sn) alloy layer formed below or around the tip of the pillar bump above the binary tin/gold (Sn/Au) alloy layer, para. [0043]).
Regarding claim 17, Kehrer teaches the recited limitations with respect to claim 16. Kehrer further teaches, the assembly according to claim 16 further comprising first and second die electrical connection pads (contact pads 336, Fig. 3d) wherein the first and second die electrical connection pads are electrically connected to the first and the second electrical connection bumps (see Fig. 3d) and the first and second die electrical connection pads comprise gold (the contacts may be a binary tin/gold (Sn/Au) alloy layer formed above the contact pads 332 and a binary copper/tin (Cu/Sn) alloy layer formed below or around the tip of the pillar bump above the binary tin/gold (Sn/Au) alloy layer, para. [0043]).
Regarding claim 20, Kehrer teaches the recited limitations with respect to claim 13. Kehrer further teaches, the assembly according to claim 12, wherein the first and the second bonds are comprised of gold (around the tip of the pillar bump above the binary tin/gold (Sn/Au) alloy layer, para. [0043]).
Regarding claim 21, Kehrer teaches the recited limitations with respect to claim 12. Kehrer further teaches, the assembly according to claim 12, wherein the first and the second bonds do not include any flux, solder, or combinations thereof (flux may or may not be applied, para. [0041], first semiconductor device 324 and the support substrate 322 is put in the reflow oven where the arrangement is heated above a melting temperature and the bumps or the tops of the bumps melt to form contacts, para. [0041], contacts formed between the second semiconductor device 328 and the contact pads 336 may be the same as between the first semiconductor device 324 and the contact pads 332, para. [0046]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 14 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Kehrer.
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Annotated Fig. 3a, Kehrer.
Regarding claim 14, Kehrer does not teach in Fig. 3d, the first and the second electrodes are electrically and mechanically connected to the first and the second bonds respectively. However, Kehrer further teaches, an embodiment in Fig. 3a including a module 300 comprises a support substrate 302, a first semiconductor device 304, wherein the first semiconductor device 304 may be a radio frequency (RF) device such as a surface acoustic wave (SAW) filter, a bulk acoustic wave (BAW) filter, in which, the assembly according to claim 12, wherein the first and the second electrodes (see annotated Fig. 3a above) are electrically and mechanically connected to the first and the second bonds respectively (first semiconductor device 304 and the second semiconductor device 308 may be electrically connected to the support substrate 302 with wires 310, para. [0018]). Therefore, in view of the teachings of Kehrer Fig. 3a, it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to modify the assembly as Kehrer in Fig. 3d and to include electrical connection of the first and the second electrodes to the first and second bonds as Kehrer taught in Fig. 3a so that it enables forming an assembly that saves board space, module footprint or package size as Kehrer disclosed in para. [0016].
Regarding claim 18, Kehrer teaches the recited limitations with respect to claim 17. Kehrer further teaches, the assembly according to claim 17, wherein the first and second die electrical connection bumps are placed on the first and second electrical connection pads using a wire bonding process (first semiconductor device 304 and the second semiconductor device 308 may then be wire-bonded to the support substrate 302 using wires 310, para. [0033]). Therefore, in view of the teachings of Kehrer, it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to modify the assembly as Kehrer in Fig. 3d and to include electrical connection of the first and the second electrodes to the first and second bonds as Kehrer taught in Fig. 3a so that it enables forming an assembly that saves board space, module footprint or package size.
Claim(s) 19 is rejected under 35 U.S.C. 103 as being unpatentable over Kehrer as applied to claim 12 above, and further in view of Juskey (US 9269887).
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Annotated Fig. 1, Juskey.
Regarding claim 19, Kehrer does not teach, the first and second electrical connection pads on the PCB are formed using electroless nickel immersion/immersion gold, However, Juskey teaches an assembly comprising a bulk acoustic wave sensor die in Fig. 1, first and second electrodes 132, 134, in which, the assembly according to claim 13, wherein first and second electrical connection pads on the PCB are formed using electroless nickel immersion/immersion gold (ENIG), electroless nickel electroless palladium immersion gold (ENEPIG) or electroplated gold (contacts 132, 134, 136 may be plated with a material such as electroless nickel electroless palladium immersion gold (ENEPIG), nickel/gold (NiAu), col. 5, lines 4-7). Therefore, in view of the teachings of Juskey, it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to modify the assembly as Kehrer in Fig. 3d and to form the first and the second electrical connection pads using an electroless nickel plating as taught by Juskey so that it enables forming contact pads having plating material on the solderable surface.
Claim(s) 22 is rejected under 35 U.S.C. 103 as being unpatentable over Kehrer as applied to claim 12 above, and further in view of Jackson (US 20190341885).
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Annotated Fig. 1A, Jackson.
Regarding claim 22, Kehrer does not teach, underfill regions that encapsulate the first and second bonds with dielectric material. However, Jackson teaches an assembly including a bulk acoustic wave sensor die 220 in Fig. 1A, first and second electrodes 130c and 130d, in which, the assembly according to claim 12 further comprising underfill regions that encapsulate the first and second bonds with dielectric material to provide electrical isolation (mold compound 135 encapsulates the stacked-die oscillator package 100… which can also filling any gaps under the BAW resonator die 120…such as silicon rubber, see bond pads 130a, 130b, 130c and 130d, in annotated Fig. 1A and Fig. 1C, para. [0026]). Therefore, in view of the teachings of Jackson, it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to modify the assembly as Kehrer and to include a mold compound 135 that fills and encapsulates the first and second bonds and to provide electrical isolation so that it enables preventing any stress coupled to the resonator die 120 as Jackson disclosed in para. [0026].
Conclusion
Prior art Lillelund (US 20120250925) teaches an assembly comprising a piezoelectric structure, a first and a second electrode, a printed circuit board including a slot spanning from the first major surface to the second major surface through the PCB.
Prior art Zhe (US 20090218668) teaches an assembly including an acoustic sensor die, a printed circuit board including a slot spanning from the first major surface to the second major surface through the PCB.
Prior art Park (US 20040164367) teaches an assembly comprising a piezoelectric structure, a first and a second electrode, a printed circuit board including a slot spanning from the first major surface to the second major surface through the PCB.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOSE K. ABRAHAM whose telephone number is (571)270-1087. The examiner can normally be reached Monday-Friday 8:30-4:30 EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, THOMAS J. HONG can be reached at (571) 272-0993. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JOSE K ABRAHAM/Examiner, Art Unit 3729