Final Rejection
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Following a non-final action, applicant filed an amendment on 4/20/2026 in which claims 1, 6, and 17 are amended, claims 9 and 27 cancelled, and claims 33-34 added. Claims 1-8, 10-26, and 28-34 are pending.
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 1-4, 10-11, 13-14, 16-18, 21-23, 28-30, and 32 are rejected under 35 U.S.C. 103 as being unpatentable over US 2023/0006417 (“Von Malm”) in view of US 2024/0006850 (“Yasukawa”).
1. An illumination apparatus, comprising:
Von Malm is a laser. [0005].
a first semiconductor layer comprising a plurality of emitters that are electrically interconnected in or on the first semiconductor layer;
Fig. 1 and Fig. 2A show a first semiconductor layer 100 comprising plurality of emitters 15 in or on the semiconductor layer.
a second semiconductor layer bonded to the first semiconductor layer in a stacked arrangement using hybrid bonding comprising a direct dielectric-to-dielectric bond and a direct metal-to-metal bond at a bonding interface, the second semiconductor layer comprising a plurality of transistors that are electrically connected to respective emitters or subsets of the plurality of emitters at a bonding interface between the first and second semiconductor layers, and
Fig. 2A shows a second semiconductor layer 140 bonded to the first semiconductor layer in a stacked arrangement using hybrid bonding, and a plurality of transistors 1421, 1422 are electrically connected to respective emitters at a bonding interface between the first and second semiconductor layers. [0058]-[0059]; [0083] (hybrid binding). While not explicitly stated, a person of ordinary skill would understand the definition of hybrid bonding as a term of art to mean that there is a direct dielectric-to-dielectric bond and a direct metal-to-metal bond at a bonding interface. For example, 125,130,145,146 are all metals. The areas between them are not stated to be dielectrics, but that is clearly the case or else everything would be shorted together, which makes no sense.
a heat sink structure defined by a plurality of through vias extending through the second semiconductor layer to a bottom surface thereof, the plurality of through vias configured to provide circuit connections to a printed circuit board.
This is not in Von Malm. Yasukawa shows a similar device with VCSEL array 10 mounted on a substrate 12 or FOWLP 21, with driver circuitry 20 in that substrate/FOWLP. Figs. 5-6, [0086] et seq. The substrate additionally includes thermal vias to a heat dissipation member 18 extending through to terminals 15, transmitting heat out the bottom to a motherboard i.e. a circuit board. [0089]-[0090]. It would have been obvious to a person of ordinary skill in the art to include such elements as it provides efficient heat dissipation suppressing temperature rise, as taught by Yasukawa.
2. The illumination apparatus of claim 1, wherein the bonding interface comprises anode and/or cathode connections to the respective emitters or subsets, and wherein the transistors define respective control circuits that are electrically connected to the anode and/or cathode connections.
3. The illumination apparatus of claim 2, wherein the respective control circuits comprise driver circuits, and wherein each of the driver circuits is electrically connected to the anode or cathode connections of the respective emitters or subsets at the bonding interface.
Circuits 142 are called control or driver circuits. [0058]. While it is not explicitly stated, a person skilled in the art would understand that a VCSEL having opposing n and p type semiconductors around quantum wells ([0043]) is a laser diode and the connections will be anode and cathode.
4. The illumination apparatus of claim 3, wherein the respective emitters or subsets are electrically interconnected by array interconnects to define a two-dimensional array of the respective emitters or subsets, and wherein the driver circuits define a two-dimensional array of the driver circuits that are electrically connected to the two-dimensional array of the respective emitters or subsets, respectively, at the bonding interface.
The emitters may be in a two dimensional array as they may be arranged in regular rows and columns. [0041]. The driver circuits are arranged one per emitter, [0058], and thus also are arranged in such a two dimensional array.
10. The illumination apparatus of Claim 4, wherein the array interconnects electrically connect the subsets within the first semiconductor layer in series or parallel with respective interconnection lengths of less than about 10 microns.
Von Malm additionally shows the lasers are clearly in parallel as in Fig. 2A. Von Malm does not give any length between the lasers, i.e. interconnection lengths. It would have been obvious to a person of ordinary skill in the art at the time of the invention to provide with respective interconnection lengths of less than about 10 microns because when the general conditions of a claim are disclosed by the prior art it is generally not inventive to discover an optimum or workable range or value by routine experimentation. See MPEP 2144.05 II.A. Additionally, persons skilled in the art of semiconductor devices routinely recognize the value of making the devices smaller, as the device may fit inside a smaller footprint. Von Malm already has a goal to be extremely compact, [0060], so choosing the specific distance is merely optimizing that goal. A person skilled in the art would have reason to make the device to be as small as practical.
11. The illumination apparatus of Claim 1, wherein the first and second semiconductor layers comprise first and second semiconductor wafers that are bonded to one another, wherein the plurality of emitters are native to the first semiconductor wafer and the plurality of transistors are native to the second semiconductor wafer.
In Von Malm Fig. 4G, [0080]-[0082], it is apparent that two wafers are bonded together, the emitters are native to the bottom and the transistors are native to the top.
13. The illumination apparatus of claim 1, wherein the transistors are directly connected with the anodes and/or cathode connections of the respective emitters or subsets at the bonding interface.
It is apparent that the transistors are directly connected to the anode/cathode of the emitters. Fig. 2A.
14. The illumination apparatus of Claim 1, wherein the bonding interface comprises one or more interposer or redistribution layers between the first and second semiconductor layers.
Von Malm does not show the bonding interface includes one or more interposer or redistribution layers between the first and second semiconductor layers. The examiner takes official notice that redistribution layers are common to use at bonding locations in semiconductor device fabrication. This taking of official notice was made previously and not challenged and therefore is taken as admitted prior art. MPEP 2144.03 C. It would have been obvious to a person of ordinary skill in the art to use them because they are an additional metal layer that allows the bonding location to be moved to a more convenient location on the chip.
16. The illumination apparatus of claim 1, wherein the emitters are between the first semiconductor layer and the bonding interface, and the emitters comprise respective lasing apertures that are facing the first semiconductor layer.
In Von Malm the emitters are between the bonding interface and the first semiconductor layer, with emitting apertures facing the semiconductor layer, i.e. it is bottom emitting. Fig. 2A, semiconductor layer 100, [0060].
Regarding claim 17, the claim is a method of fabricating an illumination device that is merely “providing” or “forming” the elements that are in claim 1 and bonding together the semiconductor layers. The claim is therefore met for the same reasons as claim 1 discussed above.
Regarding claim 18, see rejection of claim 11 above.
Regarding claim 21, see rejection of claim 2 above.
Regarding claim 22, see rejection of claim 3 above.
Regarding claim 23, see rejection of claim 4 above.
Regarding claim 28, see rejection of claim 10 above.
Regarding claim 29, see rejection of claim 13 above.
Regarding claim 30, see rejection of claim 14 above.
Regarding claim 32, see rejection of claim 16 above.
Claims 5-8, 15, 24-26, 31, and 33-34 are rejected under 35 U.S.C. 103 as being unpatentable over Von Malm and Yasukawa as applied to the parent claims, and further in view of US 2021/0349188 (“Tabata”).
Von Malm does not teach this additional circuitry as in claims 5-8, 24-26. Tabata is a similar device in which an array of emitters on one chip is mounted to another chip having an array of drivers.
Regarding claims 5 and 24, Tabata has a frame synchronization signal sent by image sensor 7 that controls the timings of the drive signals and the emitters, i.e. a signal distribution circuit. Fig. 5, [0108]. It would have been obvious to a person of ordinary skill in the art to include such circuitry as it is common sense that the skilled artisan would quite clearly like control over when each emitter emits light.
Regarding claims 6-7, and 25, in Tabata there is a driving control section 31, see Figs. 3 and 5, that may be considered the addressing circuit. It controls the switches SW to control whether the transistor driver circuits are conductive. [0105]-[0109]. This will allow individual control of the emitters, since each transistor has a separate controllable switch; we would not need each one to have its own switch if there was no individual control. Additionally, in Fig. 5, the driving control section may separately control respective subsets of emitters, the two separate groups 2a. The addressing circuit 31 may be in the second semiconductor layer, since in Figs. 3 and 5 it is within the dashed line delineating the “driving section” 3/3A and the “driving section” is part of chip Ch3/Ch34, [0124]. Furthermore, Von Malm already wishes the emitters to be individually controllable, [0040], it just does not say there is an addressing circuit, so it would have been obvious to a person of ordinary skill in the art to include an addressing circuit to achieve this.
Regarding claims 8 and 26, any of the above may also be the “one or more additional circuits” providing “other control” as claimed.
Regarding claims 15 and 31, as discussed above re: claim 16 in Von Malm the emitters are between the bonding interface and the first semiconductor layer, with emitting apertures facing the semiconductor layer, i.e. it is bottom emitting. This is the opposite of claims 15 and 31. Tabata is a similar device with emitters mounted to a driver chip, with Fig. 11 more like Von Malm and Fig. 10 more like claim 15, with substrate 20 between the emitters and the driver chip. It would have been obvious to a person of ordinary skill in the art to use either configuration, as Tabata essentially treats them as equivalents.
Regarding claims 33 and 34, Von Malm does not include temperature sensors as claimed. Tabata shows a similar device with temperature sensors integrated in or proximate the first or second semiconductor layer and configured to monitor the temperature of the components during operation. [0132]-[0138]. It would have been obvious to a person of ordinary skill in the art to include such temperature sensors as the driving can be controlled based on the temperature, as taught by Tabata. [0078], [0122].
Claims 12 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Von Malm and Yasukawa as applied to the parent claims, and further in view of US 2015/0214201 (“Schug”).
Regarding claims 12 and 19, Tabata additionally does not show that the semiconductor layers comprise singulated portions that are bonded to one another and define respective integrated emitter-electronics structures. Schug shows a similar device, with light emitters on one wafer bonded to transistor drivers on another wafer. Fig. 8. Schug Fig. 8 also shows dicing lines, [0052], therefore it is apparent the bonded portions may be singulated into respective emitter-electronics structures. It would have been obvious to a person of ordinary skill in the art to dice the devices as claimed in the case where the user wishes to have individual emitters.
Note that the “optionally” language is not required claim 19, it is by definition optional and therefore the broadest reasonable interpretation does not have to include it. It is not indefinite, it is clear that it is optional (unlike exemplary type language, which may leave some doubt whether a limitation is a requirement, see MPEP 2173.05(d)).
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Von Malm, Yasukawa, and Schug as applied to the parent claims, and further in view of US 2018/0301865 (“Burroughs”).
Von Malm and Schug teach the limitations of the parent claims, but does not show the features of claim 20. Von Malm mentions transfer printing, but it is not adequately explained. [0082]. Burroughs teaches that laser arrays may be made by transfer printing on a third non-native substrate via epitaxial liftoff. [0068], [0075]. It would have been obvious to a person of ordinary skill in the art to use such a process as it allows greater control of the fabrication, for example the VCSELS might be thinner than conventional ([0081]), spacing may be controlled, or different types of lasers might be integrated together, and costs may be reduced ([0084]) as taught by Burroughs.
Note that the “optionally” language is not required in the claim, it is by definition optional and therefore the broadest reasonable interpretation does not have to include it. It is not indefinite, it is clear that it is optional (unlike exemplary type language, which may leave some doubt whether a limitation is a requirement, see MPEP 2173.05(d)).
Response to Arguments
The arguments filed with the response have been fully considered. The 112 rejections are withdrawn in light of the amendment. The arguments re: the prior art are moot in light of the new rejections above. The new rejections are necessitated by the amendments therefore this action may be made final.
Several references are cited as showing hybrid bonding is metal-metal and dielectric-dielectric. US 2017/0053902 [0023], US 2019/0164983 [0085], US 2019/0214257 [0005], US 2020/0251397 [0096].
WO 2020/163127, cited previously by applicant, also shows wafer to wafer hybrid bonding of a driver wafer and a wafer of emitters. Figs. 8-10 and discussion thereof.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to James Menefee whose telephone number is (571)272-1944. The examiner can normally be reached M-F 7-4.
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/JAMES A MENEFEE/Primary Examiner, Art Unit 2828
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