Prosecution Insights
Last updated: April 19, 2026
Application No. 18/253,762

COMPUTING DEVICE AND ELECTRONIC DEVICE

Non-Final OA §101§102
Filed
May 19, 2023
Examiner
ARJOMANDI, NOOSHA
Art Unit
2166
Tech Center
2100 — Computer Architecture & Software
Assignee
Chengdu Synsense Technology Co. Ltd.
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
2y 10m
To Grant
96%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allow Rate
547 granted / 635 resolved
+31.1% vs TC avg
Moderate +10% lift
Without
With
+9.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
15 currently pending
Career history
650
Total Applications
across all art units

Statute-Specific Performance

§101
19.4%
-20.6% vs TC avg
§103
44.1%
+4.1% vs TC avg
§102
20.6%
-19.4% vs TC avg
§112
4.8%
-35.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 635 resolved cases

Office Action

§101 §102
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . The instant office action having application number 18/253762, filed on May 19, 2023, has claims 1-20 pending in this application. Information Disclosure Statement The information disclosure statement (IDS) submitted on 05/22/2023. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter. Claims 1 and 17-18 are rejected under 35 U.S.C. 101 because the claims recite "A computing device", however the claim's limitations do not include any physical structure to perform the steps recited in the claim, furthermore the claim fails to disclose a physical article or object associated with the claimed system. These claims lack the necessary physical articles or objects to constitute a machine or a manufacture within the meaning of 35 USC 101. They are clearly not a series of steps or acts to be a process nor are they a combination of chemical compounds to be a composition of matter. As such, they fail to fall within a statutory category. They are, at best, functional descriptive material per se. The dependent claims 2-16 and 19-20 are rejected based on the same rationale as their independent claims 1 and 18 above. Claims 1-20 are rejected under 35 U.S.C. §101 because the claim is directed to a judicial exception (an abstract idea) and does not recite additional elements that amount to significantly more than the abstract idea. Step 2A, Prong One: Claim 1 Recites an Abstract Idea Claim 1 recites “A computing device, configured to process ambient signals, the computing device comprising a plurality of computing blocks, wherein each of the computing blocks comprises a plurality of neuron populations, and each of the computing blocks receives a corresponding input spikes train; characterized in that wherein at least one of the computing blocks is configured to: project the input spike train which is weighted by a first weight matrix to a first neuron population through a multi-synapse projection, wherein the multi-synapse projection comprises : (i) at least two different synaptic time constants, and the two different synaptic time constants are both positive values; or (ii) at least two different synaptic transmission delays; or (iii) at least one positive synaptic time constant and at least one synaptic transmission delay with unequal delay durations; project a spike train outputted by the first neuron population, which is weighted by a second weight matrix, to a second neuron population; project the spike train outputted by the first neuron population, which is weighted by a third weight matrix, to a third neuron population ;add the input spike train of the computing block and an output spike train of the second neuron population to obtain an output spike train of the computing block, and using the output spike train of the computing block as a corresponding input spike train of a next computing block; and sum spike trains outputted by peer neurons in the third neuron population of the plurality of computing blocks to obtain a first spike train” These limitations describe mathematical concepts and algorithmic processing of information, including manipulation of spike train data through weighting, delay, time constant filtering, addition, and summation operations. Such limitations fall within the category of abstract ideas identified by the USPTO Subject Matter Eligibility Guidance, including mathematical relationships, calculations, and data processing concepts. Step 2A, Prong Two: The Claim Is Not Integrated Into a Practical Application The claim does not integrate the abstract idea into a practical application because it merely recites the abstract computations performed by generic computing blocks comprising neuron populations. The claim does not recite any specific neuromorphic hardware implementation, improvement in computer performance, circuit architecture, or particular technological application beyond generalized signal processing. Instead, the claim broadly covers functional information processing steps applied to spike train data, which amounts to applying the abstract idea on generic computing components. Step 2B: No Inventive Concept The additional elements recited in Claim 1, including neuron populations, weight matrices, synaptic time constants, transmission delays, and summation of spike trains, represent well-understood, routine, and conventional techniques used in spiking neural network modeling and signal processing. The claim merely instructs practitioners to implement the abstract idea using generic computing structures and conventional neural network operations, which does not provide an inventive concept sufficient to transform the judicial exception into patent-eligible subject matter. For the reasons discussed above, Claim 1 is directed to an abstract idea and fails to recite additional elements that amount to significantly more than the abstract idea. Accordingly, Claim 1 is rejected under 35 U.S.C. §101 as being directed to patent-ineligible subject matter. The dependent claim 2-16 are depending on claim 1 and therefore rejected under 101 based on the same rationale as claim 1 above. Claim 18 is rejected based on the same rationale as claim 1 above. Dependent claim 19-20 are also rejected as being dependent on claim 18. Claim 17 is rejected under 35 U.S.C. §101 because the claim is directed to a judicial exception (an abstract idea) and does not include additional elements that amount to significantly more than the judicial exception. Step 2A, Prong One: Claim 17 Recites an Abstract Idea Claim 17 recites “A computing device, configured to process ambient signals, the computing device comprising a spiking neural network system, the computing device acquiring the ambient signal and transforming the ambient signal into a second spike train or an injected current signal; wherein the spiking neural network comprises a plurality of neuron populations, and at least one neuron population of the plurality of neuron populations is configured to project the input spike train or the injected current signal of the neuron population weighted by a weight matrix to the neuron population through a multi-synapse projection, wherein the multi-synapse projection has at least two different synaptic time constants and the two different synaptic time constants are both positive.” Such operations constitute mathematical relationships, calculations, and algorithmic processing of information, which are abstract ideas under the USPTO Subject Matter Eligibility Guidance. Step 2A, Prong Two: The Claim Is Not Integrated Into a Practical Application The claim does not integrate the abstract idea into a practical application because it merely recites the abstract computations performed on a generic computing device using a spiking neural network system. The claim does not recite any specific hardware implementation, circuit architecture, improvement to computer functionality, or real-world technological application. As such, the claim is drafted at a high level of abstraction and preempts the use of the abstract idea itself. Step 2B: No Inventive Concept The additional elements recited in Claim 17, including neuron populations, weight matrices, and synaptic time constants, represent well-understood, routine, and conventional components of neural network modeling and signal processing. The claim merely instructs the practitioner to apply the abstract idea using generic computing components, which does not provide an inventive concept sufficient to transform the judicial exception into patent-eligible subject matter. For the reasons discussed above, Claim 17 is directed to an abstract idea and does not recite additional elements that amount to significantly more than the abstract idea. Accordingly, Claim 17 is rejected under 35 U.S.C. §101 as being directed to patent-ineligible subject matter. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 17 is rejected under 35 USC 102(a)(2) as being anticipated by Qiao et al., (US 2024/0013036 A1) (hereinafter Qiao). As per claim 17, Qiao discloses a spiking neural network system, the computing device acquiring the ambient signal and transforming the ambient signal into a second spike train or an injected current signal [a spiking neural network system. The computing device acquires the ambient signal and transforms the ambient signal into a second spike train or an injected current signal, paragraph 41]; wherein the spiking neural network comprises a plurality of neuron populations [The spiking neural network comprises a plurality of neuron populations, and at least one neuron population (503) of the plurality of neuron populations is configured to project the input spike train or the injected current signal of the neuron population (503), which is weighted by a weight matrix (501), to the neuron population (503) through a multi-synapse projection, paragraph 42], and at least one neuron population of the plurality of neuron populations is configured to project the input spike train [The spiking neural network comprises a plurality of neuron populations, and at least one neuron population (503) of the plurality of neuron populations is configured to project the input spike train or the injected current signal of the neuron population (503), which is weighted by a weight matrix (501), to the neuron population (503) through a multi-synapse projection. The multi-synapse projection has at least two different synaptic time constants and the two different synaptic time constants are both positive, paragraph 42] or the injected current signal of the neuron population weighted by a weight matrix to the neuron population through a multi-synapse projection, wherein the multi-synapse projection has at least two different synaptic time constants and the two different synaptic time constants are both positive [where one neuron sends spikes to another neuron through two synaptic connections, but the two synapses have different synaptic time constants τs, one of which has a synaptic time constant τs=1, and the other has a synaptic time constant τs=3. Comparing FIG. 2 with FIG. 3, quantitatively, the aforementioned synaptic transmission delay scheme and synaptic time constant scheme have different effects. But qualitatively, both have the potential to transform and project information in the time domain. In some embodiment s, there can be at least two synaptic connections between two neurons, such as 3, 4, 5 and more connections, but these synaptic connections should have at least two different synaptic connections, paragraph 96]. Allowable Subject Matter Claims 1-16 and 18-20 would be allowable if they overcome the 35 USC 101 rejection above. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to NOOSHA ARJOMANDI whose telephone number is (571)272-9784. The examiner can normally be reached on (571)272-9784. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sanjiv Shah can be reached on (571)272-4098. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. February 4, 2026 /NOOSHA ARJOMANDI/Primary Examiner, Art Unit 2166
Read full office action

Prosecution Timeline

May 19, 2023
Application Filed
Feb 04, 2026
Non-Final Rejection — §101, §102 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12596732
GENERATIVE ARTIFICIAL INTELLIGENCE (AI) CONSTRUCTION SPECIFICATION INTERFACE
2y 5m to grant Granted Apr 07, 2026
Patent 12591555
SYSTEM AND METHODS FOR LIVE DATA MIGRATION
2y 5m to grant Granted Mar 31, 2026
Patent 12587510
SYSTEMS AND METHODS FOR MANAGED DATA TRANSFER
2y 5m to grant Granted Mar 24, 2026
Patent 12580782
SYSTEMS AND METHODS FOR PROCESSING BLOCKCHAIN TRANSACTIONS
2y 5m to grant Granted Mar 17, 2026
Patent 12572812
GRAPH NEURAL NETWORKS FOR PARTICLE ACCELERATOR FACILITIES
2y 5m to grant Granted Mar 10, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
96%
With Interview (+9.9%)
2y 10m
Median Time to Grant
Low
PTA Risk
Based on 635 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month