Prosecution Insights
Last updated: July 17, 2026
Application No. 18/255,391

ACCELERATED SCALE-OUT PERFORMANCE OF DEEP LEARNING TRAINING WORKLOAD WITH EMBEDDING TABLES

Non-Final OA §101
Filed
Jun 01, 2023
Priority
Dec 24, 2020 — nonprovisional of PCTCN2020000318
Examiner
HOANG, MICHAEL H
Art Unit
2122
Tech Center
2100 — Computer Architecture & Software
Assignee
Intel Corporation
OA Round
1 (Non-Final)
53%
Grant Probability
Moderate
1-2
OA Rounds
1y 3m
Est. Remaining
77%
With Interview

Examiner Intelligence

Grants 53% of resolved cases
53%
Career Allowance Rate
78 granted / 147 resolved
-1.9% vs TC avg
Strong +24% interview lift
Without
With
+23.6%
Interview Lift
resolved cases with interview
Typical timeline
4y 5m
Avg Prosecution
31 currently pending
Career history
171
Total Applications
across all art units

Statute-Specific Performance

§101
10.2%
-29.8% vs TC avg
§103
78.5%
+38.5% vs TC avg
§102
3.7%
-36.3% vs TC avg
§112
3.0%
-37.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 147 resolved cases

Office Action

§101
DETAILED ACTION This action is in response to the claims filed 06/01/2023 for Application number 18/255,391. Claims 1-25 were canceled via preliminary amendment and claims 26-36 and 38-46 are new. Thus, claims 26-36 and 38-46 are currently pending. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement (IDS) submitted on 06/01/2023 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Objections The numbering of claims is not in accordance with 37 CFR 1.126 which requires the original numbering of the claims to be preserved throughout the prosecution. When claims are canceled, the remaining claims must not be renumbered. When new claims are presented, they must be numbered consecutively beginning with the number next following the highest numbered claims previously presented (whether entered or not). Misnumbered claim 38 has been renumbered to claim 37. Misnumbered claim 39 has been renumbered to claim 38. Misnumbered claim 40 has been renumbered to claim 39. Misnumbered claim 41 has been renumbered to claim 40. Misnumbered claim 42 has been renumbered to claim 41. Misnumbered claim 43 has been renumbered to claim 42. Misnumbered claim 44 has been renumbered to claim 43. Misnumbered claim 45 has been renumbered to claim 44. Misnumbered claim 46 has been renumbered to claim 45. Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 39-45 (misnumbered claims 40-46) are rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter. The claims do not fall within at least one of the four categories of patent eligible subject matter because the claims can be interpreted as directed to signal per se. The specification fails to provide a clear disavowal that excludes transitory signals. Examiner proposes the applicant to amend computer readable storage medium to be non-transitory computer readable storage medium. Claims 26-45 (misnumbered claims 38-46 are read as claims 37-45) are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. Regarding claim 26, Step 1 Analysis: Claim 26 is directed to a process, which falls within one of the four statutory categories. Step 2A Prong 1 Analysis: Claim 26 recites, in part, The limitations of: identify an embedding table to be associated with a neural network, wherein the neural network is to be associated with the plurality of compute nodes can be considered to be an evaluation in the human mind, determine whether to process gradients associated with the embedding table as dense gradients or sparse gradients based on the number of entries can be considered to be an evaluation in the human mind These limitations as drafted, are processes that, under broadest reasonable interpretation, covers performance of the limitation in the mind or with the aid of pen and paper which falls within the “Mental Processes” grouping of abstract ideas. Accordingly, the claim recites an abstract idea. Step 2A Prong 2 Analysis: This judicial exception is not integrated into a practical application. In particular, the claim recites the additional elements – “A computing system”, “a network controller to communicate with a plurality of compute nodes associated with a neural network”, “a processor coupled to the network controller” and “a memory including a set of executable program instructions, which when executed by the processor, cause the computing system to...”. Thus, these elements in the claim are recited at a high level of generality such that they amount to no more than mere instructions to apply the exception using a generic computer component. Please see MPEP 2106.05(f). Accordingly, these additional elements do not integrate the abstract idea into a practical application because they do not impose any meaningful limits on practicing the abstract idea. The claim as a whole is directed to an abstract idea. Step 2B Analysis: The claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements of utilizing a computing system, a network controller, neural network, a processor, and memory to perform the steps of the claimed process amount to no more than mere instructions to apply the exception using a generic computer component. Mere instructions to apply an exception using a generic computer component cannot provide an inventive concept. The claim is not patent eligible. Regarding claim 27, the rejection of claim 26 is further incorporated, and further, the claim recites: compare the number of entries to a threshold to determine whether to process the gradients associated with the embedding table as the dense gradients or the sparse gradients. This claim recites additional mental steps in addition to the judicial exception identified in the rejection of claim 26, thus recites a judicial exception. The claim does not include any additional elements that amount to an integration of the judicial exceptions into a practical application, nor to significantly more than the judicial exceptions. The claim is not patent eligible. Regarding claim 28, the rejection of claim 27 is further incorporated, and further, the claim recites: generate the threshold based on a batch size to be processed by the neural network. This claim recites additional mental steps in addition to the judicial exception identified in the rejection of claim 26, thus recites a judicial exception. The claim does not include any additional elements that amount to an integration of the judicial exceptions into a practical application, nor to significantly more than the judicial exceptions. The claim is not patent eligible. Regarding claim 29, the rejection of claim 26 is further incorporated, and further, the claim recites: determine that the gradients associated with the embedding table are to be processed as the dense gradients; This limitation recites an additional mental step in addition to the judicial exception identified in the rejection of claim 26, thus recites a judicial exception. maintain a plurality of instances of the embedding table in the computing system and the plurality of compute nodes; This limitation amounts to mere instructions to apply the judicial exception using a generic computer component. Please see MPEP 2106.05(f). generate sparse gradients during a machine learning process that is to be executed based on the embedding table; This limitation amounts to mere instructions to apply the judicial exception using a generic computer component. Please see MPEP 2106.05(f). map the sparse gradients generated during the machine learning process to generated dense gradients; This limitation amounts to mere instructions to apply the judicial exception using a generic computer component. Please see MPEP 2106.05(f). average the generated dense gradients; This limitation recites an additional mathematical calculation in addition to the judicial exception identified in the rejection of claim 26, thus recites a judicial exception and update the plurality of instances based on the generated dense gradients. This limitation amounts to mere instructions to apply the judicial exception using a generic computer component. Please see MPEP 2106.05(f). The claim does not include any additional elements that amount to an integration of the judicial exceptions into a practical application, nor to significantly more than the judicial exceptions. The claim is not patent eligible. Regarding claim 30, the rejection of claim 27 is further incorporated, and further, the claim recites: execute a vertical division process on the embedding table to generate a plurality of subdivided embedding tables that is to be less than an identified memory capacity associated with the plurality of compute nodes; This claim recites additional mental steps in addition to the judicial exception identified in the rejection of claim 26, thus recites a judicial exception. The claim additionally recites: distribute the plurality of subdivided embedding tables to the plurality of compute nodes and the computing system. This is an insignificant extra-solution activity. The claim does not include any additional elements that amount to significantly more than the judicial exception. The limitation of “distribute the plurality of subdivided embedding tables to the plurality of compute nodes and the computing system” is just a nominal or tangential addition to the claim, and is also well-understood, routine and conventional as evidenced by MPEP §2106.05(d)(II)(I), “receiving or transmitting data over a network”. This limitation therefore remains insignificant extra-solution activity even upon reconsideration, and does not amount to significantly more. Even when considered in combination, this additional element represents an insignificant extra-solution activity which cannot provide an inventive concept. The claim is not patent eligible. Regarding claim 31, the rejection of claim 26 is further incorporated, and further, the claim recites: wherein the neural network is a deep learning neural network. This limitation amounts to generally linking the judicial exception to a field of use or technological environment. Please see MPEP 2106.05(h). The claim does not include any additional elements that amount to an integration of the judicial exception into a practical application, nor to significantly more than the judicial exception. The claim is not patent eligible. Claim 32 recites features similar to claim 26 and is rejected for at least the same reasons therein. Claim 32 additionally requires analysis for “A semiconductor apparatus associated with a plurality of compute nodes, comprising: one or more substrates; and logic coupled to the one or more substrates, wherein the logic is implemented in one or more of configurable logic or fixed-functionality logic hardware, the logic coupled to the one or more substrates to…” however this is an additional element that amounts to mere instructions to apply the judicial exception using a generic computer component. Please see MPEP 2106.05(f). Regarding Claims 33-37 (misnumbered claim 38 is read as claim 37), they recite features similar to claim 27-31 and is rejected for at least the same reasons therein. Regarding claim 38 (misnumbered claim 39), the rejection of claim 32 is further incorporated, and further, the claim recites: wherein the logic coupled to the one or more substrates includes transistor channel regions that are positioned within the one or more substrates. This limitation amounts to generally linking the judicial exception to a field of use or technological environment. Please see MPEP 2106.05(h). The claim does not include any additional elements that amount to an integration of the judicial exception into a practical application, nor to significantly more than the judicial exception. The claim is not patent eligible. Claim 39 (misnumbered claim 40) recites features similar to claim 1 and is rejected for at least the same reasons therein. Claim 39 additionally requires analysis for “At least one computer readable storage medium comprising a set of instructions, which when executed by one or more of a plurality of compute nodes, cause the one or more of the plurality of compute nodes to” however as noted above, claim 39 recites a computer readable medium which fails the requirement for step 1 analysis as it does not fall with any one of the four statutory categories. Regarding Claims 40-43(misnumbered claims 41-44), they recite features similar to claim 27-30 and is rejected for at least the same reasons therein. Regarding claim 44 (misnumbered claim 45), the rejection of claim 1 is further incorporated, and further, the claim recites: wherein each of the plurality of compute nodes has a different subdivided embedding table of the plurality of subdivided embedding tables. This limitation amounts to generally linking the judicial exception to a field of use or technological environment. Please see MPEP 2106.05(h). The claim does not include any additional elements that amount to an integration of the judicial exception into a practical application, nor to significantly more than the judicial exception. The claim is not patent eligible. Regarding Claim 45 (misnumbered claim 46), it recites features similar to claim 31and is rejected for at least the same reasons therein. Allowable Subject Matter Claims 26-45 (note: misnumbered claims 38-46 are read as claims 37-45) are objected to as being allowable over prior art if all outstanding rejections were withdrawn. None of the prior art, either alone or in combination, fairly discloses limitations of claims 26, 32 and 39 in particular: identify an embedding table to be associated with a neural network, wherein the neural network is to be associated with the plurality of compute nodes; identify a number of entries of the embedding table; and determine whether to process gradients associated with the embedding table as dense gradients or sparse gradients based on the number of entries. The closest prior art uncovered was Nagarajan et al. (“US 11651209 B1”) which discloses using a system configured to implement a neural network on a hardware circuit. The system includes a host that receives a batch of inputs to a neural network layer. Each of the inputs is stored in a memory location identified by an address. The system identifies one or more duplicate addresses in a listing of addresses for one or more inputs. For each duplicate address: the system generates a unique identifier that identifies the duplicate address in the listing of addresses. The system (i) obtains first inputs from memory locations identified by addresses corresponding to the unique identifiers and (ii) generates an output of the layer from the obtained first inputs. However, the prior art fails to explicitly teach determining whether to process gradients associated with the embedding table based on the number of entries. Krishna et al. (“Accelerating Recommender Systems via Hardware “scale-in”) discloses a Deep Learning Recommendation Model (DLRM) and analyzes it to quantify the impact on throughput of hardware parameters such as memory system design, collective communications latency and bandwidth, and interconnect topology. However, fails to explicitly teach determining whether to process gradients associated with the embedding table based on the number of entries. Kumar et al. (“US 20200019614 A1” cited by Applicant in the IDS filed 06/01/2023) discloses the use of embedding tables for continuous outputs in the context of neural machine translation models (NLP models). However, fails to explicitly teach determining whether to process gradients associated with the embedding table based on the number of entries. Luo et al. (“HAN: a Hierarchical AutotuNed Collective Communication Framework”) discloses an allreduce framework (similarly disclosed in the instant specification) and discloses identifying entries in lookup tables. However, the reference never specifically discloses determining whether to process gradients associated with the embedding table based on the number of entries. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Kalamkar et al. (“Optimizing Deep Learning Recommender Systems Training on CPU Cluster Architecture”) is one of the inventor’s own works however is not considered valid prior art. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL H HOANG whose telephone number is (571)272-8491. The examiner can normally be reached Mon-Fri 8:30AM-4:30PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kakali Chaki can be reached at (571) 272-3719. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MICHAEL H HOANG/PRIMARY EXAMINER, Art Unit 2122
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Prosecution Timeline

Jun 01, 2023
Application Filed
Apr 13, 2026
Non-Final Rejection mailed — §101 (current)

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Prosecution Projections

1-2
Expected OA Rounds
53%
Grant Probability
77%
With Interview (+23.6%)
4y 5m (~1y 3m remaining)
Median Time to Grant
Low
PTA Risk
Based on 147 resolved cases by this examiner. Grant probability derived from career allowance rate.

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