Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 8-9, 17 and 27-28 are rejected under 35 U.S.C. 103 as being unpatentable over Cazabon et al. (Pub. No. US 2005/0017973) in view of Brown et al. (US Patent No. 7,839,410).
Regarding claim 1, Cazabon discloses a method, comprising: a second shader (Fig. 10, 805 “Painted Glass” shader) from a first program (Fig. 8, 807 “HLSL Complier”); , wherein the second shader (Fig. 8, 805 “Painted Glass” shader) is a shader bound to the first program (Fig. 8, 807) indicated by a second shading instruction (Fig. 10, 1002 “Source Code” for Painted Glass shader) in a rendering instruction stream from an application executed by an electronic device (see Fig. 10, also see para #44 “FIG. 10 shows relationships between the various components of the main memory 305 when running the design application, according to one embodiment of the present invention. The design application 502 interacts with the operating system 701 and with rendering instructions 802 via the DirectX.TM. Application Programming Interface (API). The operating system 701 performs such actions as opening files and task switching between concurrent applications. The rendering instructions 802 provide efficient means for performing graphics processing, including drawing primitive shapes, three dimensional geometrical transformations, texture mapping and frame buffering” ; binding a first shader (Fig. 8, 804 “Glazed Pottery” shader) to the first program (Fig. 8, 807 “HLSL Complier”) , wherein the first shader (Fig. 8, 804) is different than the second shader (fig. 8, 805); and invoking, a graphics processing unit (GPU) (Fig. 3, 309 (“graphics card”) )of the electronic device to perform a shading operation based on a first shading instruction, wherein a shader bound to the first program indicated by the first shading instruction comprises the first shader (as shown in Figs. 8 and 10, the first shader 804 with the source code 1001 is bound to the first program 807). It is noted that Cazabon does not specifically disclose unbinding the second shader from the first program.
However, Brown is cited to teach computer graphics system similar to Cazabon. Brown further teach unbinding a second shader from a first program (col. 6, lines 42-47: “Changing the buffer object bound to one of the binding points for a given processing unit allows an application to bind and unbind large groups of shader program parameters at once and also to specify the buffer object used to load parameters into when using calls provided by a graphics API”. It would have been obvious to one of ordinary skill in the art to have modified Cazabon with the features of “unbinding a shader from a larger group of shader program parameters” as taught by Brown so as to perform different shaders in different time frame by using the same application program.
Regarding claim 8, Cazabon as modified by Brown discloses the method claim 1. Cazabon further disclose wherein the method further comprising: compiling source code of the first shader into binary code; and storing the binary code of the first shader (see Cazabon: Fig. 8, 807, 804; and Fig. 10, 804 and 1001)
Regarding claim 9, Cazabon as modified by Brown discloses the method claim 8. Cazabon as modified by Brown further discloses wherein before binding the first shader to the first program, the method further comprises obtaining an identifier of the first program based on the rendering instruction stream (Brown: col. 3, lines 28-38, “Buffer objects provide a region of memory (i.e., buffers) accessible through an identifier. Buffer objects allow a GPU driver to optimize an internal memory management scheme and choose the best type of memory--such as cached/uncached system memory or graphics memory--in which to store a buffer object). It would have been obvious to one of ordinary skill in the art to have modified Cazabon with the features of identifier as taught by Brown so as to keep track the object being rendering.
Regarding claim 17, Cazabon as modified by Brown discloses the method of claim 1. Cazabon as modified by Brown further discloses wherein either a)_both the first shader and the second shader are vertex shaders, or b) both the first shader and the second shader are fragment shaders (Brown: col. 1, lines 43-54). It would have been obvious to modified Cazabon with the features of vertex and fragment shaders as taught by Brown so as to provided additional pixel control for the object.
Claim 27 is an electronic device corresponding to method claim 1. Cazabon further discloses a processor ( Fig. 3, 309) and a memory (Fig. 3, 305). Thus, claim 27 is rejected for the same reason as claim 1 above.
Claim 28 is directed to a non-transitory computer-readable medium corresponding to method claim 1 above. Cazabon further discloses a computer readable medium (see claim 1 of Cazabon). Thus, claim 28 is rejected for the same reason as claim 1 above.
Claims 2, 5, 7 and 10-13 are rejected under 35 U.S.C. 103 as being unpatentable over Cazabon et al. (Pub. No. US 2005/0017973) in view of Brown et al. (US Patent No. 7,839,410) as applied to claims 1, 8-9, 17 and 27-28 above, and further in view of Bao et al. (CN 111179150A).
Regarding claim 2, Cazabon as modified by Brown discloses the method of claim 1, wherein the method further comprising: obtaining, the second shader (Cazabon: Fig. 10, 805) based on the rendering instruction stream (Cazabon: Fig. 10. 1002) but fails to discloses wherein the first shader is based on the second shader, wherein the first shader corresponds to the second shader, and wherein the first shader and the second shader are of a same type; and replacing the second shader with the first shader. However, Bao is cited to teach the first shader is based on the second shader, wherein the first shader corresponds to the second shader, and wherein the first shader and the second shader are of a same type; and replacing the second shader with the first shader. For example, Bao disclose “A shader auto-reduction method based on a stream of rendering instructions, the method comprising” obtaining a drawing instruction stream, extracting a target shader from the drawing instruction stream, and creating simplifying shader with only different codes from the target shader” (see page 3/8, section of Disclosure of Invention). The simplifying shader of Bao is interpreted as the first shader which is based on the second shader such as an original shader before being simplified. The simplified shader such as the first shader is replacing the original shader such as the second shader. It would have been obvious to one of ordinary skill in the art to have modified Cazabon and Brown with the features of the simplified shader as taught by Bao so as to increase the speed of the object rendering.
Regarding claim 5. Cazabon as modified discloses the method of claim 2, further comprising: binding a storage address of binary code of the first shader to the first program (Cazabon: Fig. 10, 805 and 1002); and binding an identifier of the first shader to the first program (see Brown: (Brown: col. 3, lines 28-38) .
Regarding claim 7, Cazabon as modified discloses the method of claim 5, wherein before binding the identifier of the first shader to the first program, the method further comprises unbinding the second shader from the first program based on an identifier of the second shader (see Brown: col. 6, lines 42-47).
Regarding claim 10, Cazabon and Brown discloses the method of claim 9, further comprising obtaining code of a plurality of third shaders that comprises code of the first shader (see Fig. 10, 806 and 1003) but fail to discloses wherein the first shader being based on the second shader comprises the code of the first shader being based on code of the second shader. However, Bao is cited to teach the first shader being based on the second shader comprises the code of the first shader being based on code of the second shader. For example, Bao disclose “A shader auto-reduction method based on a stream of rendering instructions, the method comprising” obtaining a drawing instruction stream, extracting a target shader from the drawing instruction stream, and creating simplifying shader with only different codes from the target shader” (see page 3/8, section of Disclosure of Invention). The simplifying shader of Bao is interpreted as the first shader which is based on the second shader such as an original shader before being simplified. The simplified shader such as the first shader is replacing the original shader such as the second shader. It would have been obvious to one of ordinary skill in the art to have modified Cazabon and Brown with the features of the simplified shader as taught by Bao so as to increase the speed of the object rendering.
Regarding claim 11, Cazabon as modified discloses the method of claim 10, further comprising storing the code of the plurality of third shaders, wherein obtaining code of a plurality of third shaders comprises reading the code of the plurality of third shaders from an address for storing the code of the plurality of third shaders (see Fig. 10, 806 and 1003)
Regarding claim 12, Cazabon as modified discloses the method of claim 11, wherein obtaining the second shader based on the rendering instruction stream comprises obtaining the identifier and a storage address of the second shader based on the rendering instruction stream, wherein the storage address stores the code of the second shader, and wherein the code comprises source code or binary code (see Brown: col. 3, lines 28-38, “Buffer objects provide a region of memory (i.e., buffers) accessible through an identifier. Buffer objects allow a GPU driver to optimize an internal memory management scheme and choose the best type of memory--such as cached/uncached system memory or graphics memory--in which to store a buffer object).
Regarding claim 13. Cazabon as modified discloses the method of claim 12, further comprising storing code of a plurality of fourth shaders, wherein the code of the plurality of fourth shaders is in a one-to-one correspondence with that of the plurality of third shaders, and wherein the code of the plurality of fourth shaders comprises source code or binary code (for example, as mentioned above, both Cazabon and Brown discloses different shaders such as Glazed, Painted, Metallic, vertex and fragment). It would have been obvious to have used more than three shaders for rendering the object so as to modify and render the object in different levels.
Allowable Subject Matter
Claims 14-15, 18, 20-22 and 24 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
None of the prior art references alone or in combination teaches the limitation of “wherein the code of the plurality of fourth shaders comprises code of a fifth shader, the code of the fifth shader matches the code of the second shader, and the fifth shader corresponds to the first shader, and wherein the first shader being based on the second shader comprises: obtaining the code of the second shader based on the storage address of the second shader; matching the code of the second shader against the code of the plurality of fourth shaders, to obtain the fifth shader; and obtaining the first shader by using based on the fifth shader” as recited in dependent claim 14. Claims 15, 18, 20-22 and 24 are depending from claim 14. Thus, they are also allowable because they are depending from the allowable claim 14.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
The US 2018/0165786 is cited to teach resource sharing on shader processor of GPU.
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/XIAO M WU/Supervisory Patent Examiner, Art Unit 2613