DETAILED ACTION
Notice of AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1 – 11 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Park.
Regarding Claim 1, Park discloses “An electronic substrate” (Figure 2, Item 100 ‘substrate’, and Paragraph [0060], Lines 1 – 2 (Notice that substrate 100 for electronic entities is provided.)), “comprising: a base substrate” (Figure 2, Item 100 ‘substrate’, and Paragraph [0060], Lines 1 – 2 (Notice that electronic substrate of Figure 2 is comprised of at least a base substrate 100.)), “and at least one first signal line and at least one second signal line on the base substrate” (Figures 2, 4 and 5, Items 102 ‘first conductive line’, 106 ‘third conductive line’, and Paragraph [0076], Lines 1 – 3 (Notice that a first signal line 106 and a second signal line 102 is provided on base substrate 100.)), “wherein the electronic substrate comprises a first functional region and a peripheral region at least partially surrounding the first functional region” (Figures 1 and 2, Items DA ‘display area’, NDA ‘non-display area’, and Paragraph [0050], Lines 1 – 4 (Notice substrate 100 comprises a first functional region DA (display area) and peripheral region NDA (non-display area) that at least partially surrounds the first functional region DA.)), “and the first signal line and the second signal line are in the peripheral region and at least partially surround the first functional region” (Figures 2, 4, and 5 (Notice that first signal line 106 and second signal line 102 are in the peripheral region NDA and a least partially surround the first functional region DA.)), “the first signal line and the second signal line are spaced apart from each other and insulated from each other (Figures 5, 6, Items 103 ‘first insulating layer’, 105 ‘second insulating layer’, and Paragraph [0088], Lines 1 - 8 (Notice that first signal line 106 and second signal line 10 are spaced apart and insulated from each via at least one of insulating layers 103 and 105.)), “at least one of the first signal line and the second signal line is configured to transmit an electrical signal for the first functional region” (Figures 2, 4, Paragraph [0076], Line 1, and Paragraph [0077], Lines 1 – 6 (Notice that at least second signal line 102 is configured to transmit an electrical signal for the first functional region DA.)), “in a direction perpendicular to the base substrate, the first signal line partially overlaps with the second signal line in an overlapping region” (Figures 5 and 6 (Notice that in a Z-axis direction that is perpendicular to base substrate 100, the first signal line 106 partially overlaps with second signal line 102 in an overlapping region of width w2.)), “and the first signal line comprises a first wiring portion in the overlapping region and a second wiring portion outside the overlapping region” (Figure 5 (Notice that first signal line 106 comprises a first wiring portion in the overlapping width w2 and second wiring portion that is outside of the overlapping width w2.)), “wherein and extending direction of the first portion and an extending direction of the second wiring portion are same as an extending direction of the first signal line” (Figure 5 (Notice that the first portion in the overlapping width w2 as described above has an area that extends in the x-axis direction, the second wiring portion outside of the overlapping width w2 as described above has an area that extends in the x-axis direction, and the first signal line 106 as described above has an area that extends in the x-axis direction.)), “the second signal line comprises a third wiring portion in the overlapping region and a fourth wiring portion outside the overlapping region” (Figure 5 (Notice that the second signal line 102 comprises a third wiring portion in the overlapping width w2 and a fourth wiring portion that is outside of the overlapping width w2.)), “and a line width of the first wiring portion is different from a line width of the second wiring portion” (Figure 5 (Notice that a total line width of the first wiring portion of first signal line 106 in the overlapping region of width w2 is greater than and different from the total line width of the second wiring portion of first signal line 106 outside of the overlapping region of width w2.)).
Regarding Claim 2, Park discloses everything claimed as applied above (See Claim 1). In addition, Park discloses “wherein a line width of a portion of the first wiring portion overlapping with the second signal line in the direction perpendicular to the base substrate is smaller than the line width of the second wiring portion” (Figures 5 and 6 (Notice that a partial line width w2 of the first wiring portion of the first signal line 106 in the overlapping region (i.e. overlapping with the second signal line 102 in the Z-axis direction which is perpendicular to the base substrate 100) is smaller than the total line width of the second wiring portion of the first signal line 106 outside of the overlapping width w2.)).
Regarding Claim 3, Park discloses everything claimed as applied above (See Claim 1). In addition, Park discloses “wherein a line width of a portion of the first wiring portion not overlapping with the second signal line in the direction perpendicular to the base substrate is smaller than the line width of the second wiring portion” (Figures 5 and 6 (Notice that a partial line width of a portion of the first wiring portion of first signal line 106 outside of overlapping width w2 (i.e. not overlapping with the second signal line 102 in the Z-axis direction which is perpendicular to the base substrate 100) can be chosen to be smaller (i.e. a portion that is less that total line width minus w2) than the total line width of the second wiring portion of the first signal line 106 outside of the overlapping width w2.)).
Regarding Claim 4, Park discloses everything claimed as applied above (See Claim 1). In addition, Park discloses “wherein an average line width of the first wiring portion is smaller than an average line width of the second wiring portion” (Figure 5 (Notice that average or mean line width w2 (averages to w2 because of no deviation along the length of the overlapping portion) is smaller than average of the total line width of the second portion of first line 106 (averages to the total line width because of no deviation along the length of the second portion) outside of the overlapping width w2.)).
Regarding Claim 5, Park discloses everything claimed as applied above (See Claim 1). In addition, Park discloses “wherein a line width of the third wiring portion is different from a line width of the fourth wiring portion” (Figure 5 (Notice that a partial line width (i.e. that is the width of w2) of the third wiring portion of second signal line 102 is different from a total line width of the fourth wiring portion (i.e. outside of the overlapping width, as described far above) of second signal line 102.)).
Regarding Claim 6, Park discloses everything claimed as applied above (See Claim 5). In addition, Park discloses “wherein a line width of a portion of the third wiring portion overlapping with the first signal line in the direction perpendicular to the base substrate is smaller than the line width of the fourth wiring portion” (Figures 5 and 6 (Notice that partial line width (i.e. w2) of a portion third wiring portion of second signal line 102 (i.e. overlapping with the first signal line 106 in the Z-axis direction which is perpendicular to the base substrate 100) is smaller than the total line width of the fourth wiring portion of the second signal line 102 outside of the overlapping width w2.)).
Regarding Claim 7, Park discloses everything claimed as applied above (See Claim 5). In addition, Park discloses “wherein a line width of a portion of the third wiring portion not overlapping with the first signal line in the direction perpendicular to the base substrate is smaller than the line width of the fourth wiring portion” (Figures 5 and 6 (Notice that a partial line width of portion of third wiring portion of second signal line 102 ((i.e. below reference “w2” in Figure 5 and not overlapping with the second signal line 102 in the Z-axis direction which is perpendicular to the base substrate 100) is smaller (i.e. total width minus at least width w2) that the total line width of the fourth wiring portion of second signal line 102 outside of the overlapping width w2.)).
Regarding Claim 8, Park discloses everything claimed as applied above (See Claim 5). In addition, Park discloses “wherein an average line width of the third wiring portion is smaller than an average line width of the fourth wiring portion” (Figure 5 (Notice that average or mean line width w2 (averages to w2 because of no deviation along the length of the overlapping portion) of the third wiring portion of the second signal line 102 is smaller than average of the total line width of the fourth portion of second signal line 102 (averages to the total line width because of no deviation along the length of the fourth portion) outside of the overlapping width w2.)).
Regarding Claim 9, Park discloses everything claimed as applied above (See Claim 1). In addition, Park discloses “wherein an extending direction of an orthographic projection of the first wiring portion on the base substrate is substantially perpendicular to an extending direction of an orthographic projection of the third wiring portion on the base substrate” (Figures 5 and 6 (Notice that a Y-axis extension direction of an orthographic projection of the first wiring portion of first signal line 106 on the base substrate 100 as shown in Figure 5 is substantially perpendicular to an X-axis extension direction of an orthographic projection of the third wiring portion of the second signal line 102 on the base substrate 100.)).
Regarding Claim 10, Park discloses everything claimed as applied above (See Claim 1). In addition, Park discloses “wherein the second wiring portion and the fourth wiring portion are arranged side by side with each other in a plane parallel to the base substrate” (Figures 5 and 6 (Notice the second wiring portion of the first signal line 106 and the fourth wiring portion of the second signal line 102 are arranged side by side with each other in a plane that is from the topmost surface of the first signal line 106 (i.e most positive in the Z-axis) and the bottommost surface of the second signal line 102 (i.e. least positive in the Z-axis), where the described plane is parallel to the base substrate 100.)), “wherein an extending direction of an orthographic projection of the second wiring portion on the base substrate is substantially parallel to an extending direction of an orthographic projection of the fourth wiring portion on the base substrate” (Figures 5 and 6 (Notice that an X-axis extension direction of an orthographic projection of the second wiring portion of first signal line 106 on the base substrate 100 as shown in Figure 5 is substantially parallel to an X-axis extension direction of an orthographic projection of the fourth wiring portion of the second signal line 102 on the base substrate 100.)).
Regarding Claim 11, Park discloses everything claimed as applied above (See Claim 1). In addition, Park discloses “wherein an extending direction of an orthographic projection of the first wiring portion on the base substrate is substantially parallel to an extending direction of an orthographic projection of the second wiring portion on the base substrate” (Figures 5 and 6 (Notice that an X-axis extension direction of an orthographic projection of the first wiring portion of first signal line 106 on the base substrate 100 as shown in Figure 5 is substantially parallel to an X-axis extension direction of an orthographic projection of the second wiring portion of the first signal line 106 on the base substrate 100.)), “the orthographic projection of the first wiring portion on the base substrate and the orthographic projection of the second wiring portion on the base substrate are substantially in one straight line” (Figure 5 (Notice the orthographic projection of the first wiring portion of the first signal line 106 and the orthographic projection of the second wiring portion of the first signal line 106 extend substantially in one straight line in the X-axis direction.)).
Allowable Subject Matter
Claims 12 – 18, 20, and 22 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims for reason set forth in the Office Action mailed October 14, 2025.
Response to Applicants Amendments and Arguments
Applicants amendments and arguments filed January 13, 2026 have been fully considered.
Primarily, the Examiner disagrees that - - Park fails to disclose, teach or suggest the features "an extending direction of the first wiring portion and an extending direction of the second wiring portion both are as same as an extending direction of the first signal line," as currently defined in amended claim 1 - - (REMARKS, Page 9, Lines 1 – 3 (line reference made by all written lines, excluding blank lines, page headings and figure reference line). The Examiner disagrees because of the reasoning set forth in the rejection of Claim 1 made of record above.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRIAN M BUTCHER whose telephone number is (571)270-5575. The examiner can normally be reached on Monday – Friday from 6:30 AM to 3:00 PM.
If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Ke Xiao, can be reached at (571) 272 - 7776. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/BRIAN M BUTCHER/Primary Examiner, Art Unit 2627 January 31, 2026