DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Applicant's submission filed on 02/16/2026 has been entered.
Response to Arguments
Applicant's arguments filed 02/16/2026 have been fully considered but they are not persuasive.
Applicant argues on pages 5 and 6 that GARNER fails to teach “the ON state and the OFF state”.
The examiner respectively disagrees because GARNER fig. 5 clearly shows lower base current duration (OFF period) is also shorter than the hold-on period (see updated rejection below). Therefore, the rejection is maintained.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1 and 3 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by GARNER WO 2008/132509 A2.
Regarding claim 1, GARNER discloses
A circuit (Figs. 2a and 4) comprising: a bipolar junction transistor (BJT) (Item 208) having a collector drift region (Collector is lightly-doped which is equivalent to a collector drift region);
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a controller (Item 214);
a driver circuit (Item 218) having an input (Signal 216 is inputted to item 218) adapted to receive a control signal (Signal 216) from the controller, and an output (An output is connected to a base of item 208) connected to a base terminal (A terminal where signal 220 is inputted) of the BJT; the driver circuit adapted to switch the state at the output in response to the received control signal between: an ON state that switches the transistor into an ON state; an OFF state that switches the transistor into an OFF state (Signal 220 is a modulated signal which comprises of ON and OFF pulses); and a floating state (At the end of the force-on period, the switch S1 is opened to initiate to start floating period); and wherein the controller is adapted to operate the driver circuit such that within a ON-OFF switching cycle of the BJT, the output of the driver circuit is in the floating state for longer than it is in the ON state and the OFF state (It is clear from fig. 5 that the hold-on period where the floating happens is longer than ON period (Force-on period) and OFF period. It is clear from Figure 5 that lower collector current (OFF period) is also shorter than the hold-on period (see annotated fig. below)).
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Regarding claim 3, GARNER discloses
wherein the controller is adapted to operate the driver circuit such that the output of the driver circuit is in the floating state for equal or over 50% of a complete ON-OFF cycle of the BJT (Fig. 5 shows hod-on period (Floating state) is longer than force-on (ON) period, which indicates over 50%.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over GARNER in a view of Brajder US 4,239,989.
Regarding claim 2, GARNER does not disclose but Brajder discloses a bypass connection (Via item 16 in Fig. 1) between the base terminal (Item 10) of the BJT (Item 7) and an emitter terminal (Item 4) of the BJT, the bypass connection including a load with a resistance sufficient that, when in operation, current through the bypass connection when the BJT is OFF is small compared with the current through the base terminal when the BJT is ON (See column 6, lines 51-68, column 7, lines 1-8).
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to use a bypass connection between the base and an emitter terminal as disclosed by Brajder in GARNER’s teachings to accelerate the switching-off process to reduce the switching-off losses (See Brajder’s column 7, lines 1-8).
Claims 4 and 6 are rejected under 35 U.S.C. 103 as being unpatentable over King et al. US 4,926,104 in a view of GARNER.
Regarding claim 4, King et al. disclose
A motor driver for a multi-phase electric-motor comprising: a switching circuit (Item 10) comprising multiple bipolar junction transistors (BJTs) for switching current through windings (Stator windings) of the multi-phase electric-motor (Item 18) (Column 7, lines 39-54), a separate driver circuit (Items 38a-38c) associated with each BJT, each driver circuit comprising an input (Items 38a-38c each having an input to get signal from item 34) adapted to receive a control signal (Output from item 34) from a controller (Item 34), and an output (Fig. 1 shows output from items 38a-38c connected to base of BJT) connected to a base terminal of its respective BJT (Outputs from items 38a-38c are couples to BJTs 20-25) (Column 3, lines 49-68, column 4, lines 1-68, column 5, lines 1-8);
King et al. do not disclose but GARNER discloses each BJT comprising a collector drift region (Collector is lightly-doped which is equivalent to a collector drift region),
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the driver circuit adapted to switch the state at its output in response to the received control signal between: an ON state that switches the transistor into an ON state; an OFF state that switches the transistor into an OFF state; and a floating state; and wherein the controller is adapted to operate the separate driver circuits such that during a complete ON-OFF switching cycle of each BJT, the output of the driver circuit is in the floating state for longer than it is in the ON state and the OFF state. (See claim 1 rejection for details)
Therefore, it would have been obvious to use the driver circuit to switch the state at its output in response to the received control signal between: an ON state that switches the transistor into an ON state; an OFF state that switches the transistor into an OFF state; and a floating state; and wherein the controller is adapted to operate the separate driver circuits such that during a complete ON-OFF switching cycle of each BJT, the output of the driver circuit is in the floating state for longer than it is in the ON state and/or the OFF state as disclosed by GARNER in King’s teachings to control the degree of saturation when the device is on and hence improve turn-off times.
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Regarding claim 6, a combination of King and GARNER discloses
wherein the controller is adapted to operate the driver circuit such that the output of the driver circuit is in the floating state for equal or over 50% of a complete ON-OFF cycle of the BJT (GARNER’s fig. 5 shows hod-on period (Floating state) is longer than force-on (ON) period, which indicates over 50%.
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over King et al. US 4,926,104 in a view of GARNER and further in a view of Brajder US 4,239,989.
Regarding claim 5, a combination of King and GARNER does not disclose but Brajder discloses a bypass connection (Via item 16 in Fig. 1) between the base terminal (Item 10) of the BJT (Item 7) and an emitter terminal (Item 4) of the BJT, the bypass connection including a load with a resistance sufficient that, when in operation, current through the bypass connection when the BJT is OFF is small compared with the current through the base terminal when the BJT is ON (See column 6, lines 51-68, column 7, lines 1-8).
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to use a bypass connection between the base and an emitter terminal as disclosed by Brajder in King’s and GARNER’s teachings to accelerate the switching-off process to reduce the switching-off losses (See Brajder’s column 7, lines 1-8).
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BICKEY DHAKAL whose telephone number is (571)272-3577. The examiner can normally be reached 8:30-4:30 PM.
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/BICKEY DHAKAL/Primary Examiner, Art Unit 2896