Prosecution Insights
Last updated: April 19, 2026
Application No. 18/261,223

SWITCH DEVICE AND MEMORY UNIT

Non-Final OA §102§103
Filed
Jul 12, 2023
Examiner
MOVVA, AMAR
Art Unit
2898
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Sony Semiconductor Solutions Corporation
OA Round
1 (Non-Final)
79%
Grant Probability
Favorable
1-2
OA Rounds
2y 11m
To Grant
94%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allow Rate
606 granted / 764 resolved
+11.3% vs TC avg
Strong +15% interview lift
Without
With
+15.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
18 currently pending
Career history
782
Total Applications
across all art units

Statute-Specific Performance

§101
1.0%
-39.0% vs TC avg
§103
48.0%
+8.0% vs TC avg
§102
33.6%
-6.4% vs TC avg
§112
13.8%
-26.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 764 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-3, 7, and 15-16 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Sei (US 2019/0252609). [Claim 1] A switch device (fig. 3) comprising: a first electrode (21, fig. 3); a second electrode (23, fig. 3) disposed to be opposed to the first electrode; and a switch layer (22, fig. 3, note that 22 comprises two layers 22A and 22B which may be mutually different compositions [0063] using the material combinations of the single switch layer 22 provided for in fig. 1) provided between the first electrode and the second electrode and including a first element selected from germanium and silicon [0055], a second element selected from arsenic, phosphorus, and antimony [0054], and a third element selected from selenium and tellurium [0049], wherein the switch layer includes at least one first layer (22A, fig. 3 may for example comprise 60% Se or Te, 3% P or As, 3% boron, and the remainder 34% as Si or Ge, see [0054][0055] ) and at least one second layer (22B, fig. 3 may for example comprise 45% Se or Te, 3% P or As, 3% boron, and the remainder 49% as Si or Ge, see [0054][0055] ) that are stacked, the first layer includes at least one kind of the second element and at least one kind of the third element, includes the third element in a range of 50 atomic % or more and 80 atomic % or less in composition ratio (22A, fig. 3 may for example comprise 60% Se or Te, 3% P or As, 3% boron, and the remainder 34% as Si or Ge, see [0054][0055]), and is negative in temperature dependence of a threshold voltage (this feature is inherent as the composition conforms to the required materials and the relative limits of atomic percentages), and the second layer includes at least one kind of the first element and at least one kind of the third element, includes the first element in a range of 20 atomic % or more and 50 atomic % or less in composition ratio (22B, fig. 3 may for example comprise 45% Se or Te, 3% P or As, 3% boron, and the remainder 49% as Si or Ge, see [0054][0055]), and is positive in temperature dependence of the threshold voltage (this feature is inherent as the composition conforms to the required materials and the relative limits of atomic percentages). [Claim 2] The switch device according to claim 1, wherein the first layer and the second layer each include the second element in a range of 0 atomic % or more and 50 atomic % or less in composition ratio (3% P or As may be included in the first and second layer, [0054]). [Claim 3] The switch device according to claim 1, wherein the switch layer further includes, as an impurity, at least one of boron, aluminum, gallium, or indium (3% boron may be included [0054]). [Claim 7] The switch device according to claim 1, wherein the switch layer changes into a low-resistance state by making an applied voltage higher than or equal to a predetermined threshold voltage, and changes into a high-resistance state by making the applied voltage lower than the threshold voltage, without involving a phase change between a non- crystalline phase and a crystalline phase [0060]. [Claim 15] A memory unit comprising multiple memory cells (fig. 5), wherein the multiple memory cells each include a memory device (30, fig. 5), and a switch device (20, fig. 5) directly coupled to the memory device, the switch device includes: a first electrode (21, fig. 3); a second electrode (23, fig. 3) disposed to be opposed to the first electrode; and a switch layer (22, fig. 3, note that 22 comprises two layers 22A and 22B which may be mutually different compositions [0063] using the material combinations of the single switch layer 22 provided for in fig. 1) provided between the first electrode and the second electrode and including a first element selected from germanium and silicon [0055], a second element selected from arsenic, phosphorus, and antimony [0054], and a third element selected from selenium and tellurium [0049], wherein the switch layer includes at least one first layer (22A, fig. 3 may for example comprise 60% Se or Te, 3% P or As, 3% boron, and the remainder 34% as Si or Ge, see [0054][0055] ) and at least one second layer (22B, fig. 3 may for example comprise 45% Se or Te, 3% P or As, 3% boron, and the remainder 49% as Si or Ge, see [0054][0055] ) that are stacked, the first layer includes at least one kind of the second element and at least one kind of the third element, includes the third element in a range of 50 atomic % or more and 80 atomic % or less in composition ratio (22A, fig. 3 may for example comprise 60% Se or Te, 3% P or As, 3% boron, and the remainder 34% as Si or Ge, see [0054][0055]), and is negative in temperature dependence of a threshold voltage (this feature is inherent as the composition conforms to the required materials and the relative limits of atomic percentages), and the second layer includes at least one kind of the first element and at least one kind of the third element, includes the first element in a range of 20 atomic % or more and 50 atomic % or less in composition ratio (22B, fig. 3 may for example comprise 45% Se or Te, 3% P or As, 3% boron, and the remainder 49% as Si or Ge, see [0054][0055]), and is positive in temperature dependence of the threshold voltage (this feature is inherent as the composition conforms to the required materials and the relative limits of atomic percentages). [Claim 16] The memory unit according to claim 15, wherein the memory device comprises any one of a phase-change memory device, a resistance-change memory device, and a magnetoresistive memory device [0078]. Claim(s) 8-12 and 14 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Tortorelli (US 2019/0252612). [Claim 8] A switch device (fig. 4A) comprising: a first electrode (210-c, fig. 4A); a second electrode (205-c, fig. 4A) disposed to be opposed to the first electrode; and a switch layer (220-c, fig. 4A, [0067][0024]), having different diameters in a stacking direction (fig. 4A). [Claim 9] The switch device according to claim 8, wherein the switch layer has a first diameter, and a second diameter smaller than the first diameter (fig. 4A). [Claim 10] The switch device according to claim 9, wherein the switch layer includes a first region having the first diameter (bottom region) and a second region having the second diameter (top region). [Claim 11] The switch device according to claim 9, wherein the first diameter and the second diameter change from one to another continuously in the stacking direction (fig. 4A). [Claim 12] The switch device according to claim 9, wherein the first diameter and the second diameter change from one to another stepwise in the stacking direction ([0067], fig. 7). [Claim 14] The switch device according to claim 8, wherein the switch layer includes a first element selected from germanium and silicon, a second element selected from arsenic, phosphorus, and antimony, and a third element selected from selenium and tellurium (the switch element 220 may comprise, Ge, Se, and Ar, [0049]). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tortorelli (US 2019/0252612). Tortorelli discloses the switch device of claim 9 but does not expressly disclose that the first diameter of the switch layer is a diameter of 10 nm or more and 100 nm or less, and the second diameter of the switch layer is 2 nm or more and 10 nm or less. Nevertheless it would have been obvious to one of ordinary skill before the time of filing to have made the first diameter of the switch layer a diameter of 10 nm or more and 100 nm or less and the second diameter of the switch layer 2 nm or more and 10 nm or less , since it has been held that where the general conditions of a claim are disclosed in prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. It also been held that the normal desire of scientists or artisans to improve upon what is already generally known provides the motivation to determine where in a disclosed set of percentage ranges is the optimum combination of percentages. In re Peterson, 315 F.3d 1325, 1330 (Fed. Cir. 2003). The claimed range is a result-effective variable since the diameters of the switch layer affects how much space the overall device takes up. Claim(s) 5 and 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sei (US 2019/0252609). Sei discloses the switch device of claim 9 but does not expressly disclose that the switch layer has a film thickness of 15 nm or more and 150 nm or less or that the first layer has a film thickness of 5 nm or more and 50 nm or less, and the second layer has a film thickness of 10 nm or more and 100 nm or less. Nevertheless it would have been obvious to one of ordinary skill before the time of filing to have made the switch layer has a film thickness of 15 nm or more and 150 nm or less or that the first layer has a film thickness of 5 nm or more and 50 nm or less, and the second layer has a film thickness of 10 nm or more and 100 nm or less, since it has been held that where the general conditions of a claim are disclosed in prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. It also been held that the normal desire of scientists or artisans to improve upon what is already generally known provides the motivation to determine where in a disclosed set of percentage ranges is the optimum combination of percentages. In re Peterson, 315 F.3d 1325, 1330 (Fed. Cir. 2003). The claimed range is a result-effective variable since the thickness of the switch layer(s) affects how much space the overall device takes up. Claim(s) 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sei (US 2019/0252609). Sei discloses the memory unit of claim 15 and that the memory device (e.g. 31B, 31A, 32, fig. 7) includes a third electrode (31A, fig. 7), a fourth electrode (32, fig. 7) disposed to be opposed to the third electrode, and a memory layer (31B, fig. 7). Sei, however, does not expressly disclose the memory layer having different diameters in a stacking direction (e.g. in a trapezoidal shape memory layer). Nevertheless it would have been obvious to have made , since it has been held that a particular shape configuration (a trapezoidal shape memory layer) was a matter of choice which a person of ordinary skill in the art before the time of filing would have found obvious absent evidence that the particular configuration was critical. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sei (US 2019/0252609). Sei discloses the memory unit of claim 1 and that the switch layer comprises a third layer (note that 22 may be a three layer structure, [0063]) but does not expressly disclose that the third layer satisfies the mathematical expression (1) below:[Math. 1] PNG media_image1.png 45 154 media_image1.png Greyscale d2FhX-= 1 -(1) PNG media_image2.png 8 7 media_image2.png Greyscale where kB represents Boltzmann constant, A(T) represents proportionality constant (A/ PNG media_image3.png 16 49 media_image3.png Greyscale represents barrier height (eV), Fth represents threshold electric field (MV/cm), d represents film thickness, Vt represents thermal voltage, and 1 represents thermal conductivity. Nevertheless it would have been obvious to one of ordinary skill before the time of filing to have made the parameters of the device conform to the required ranges of the mathematical expression , since it has been held that where the general conditions of a claim are disclosed in prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. It also been held that the normal desire of scientists or artisans to improve upon what is already generally known provides the motivation to determine where in a disclosed set of percentage ranges is the optimum combination of percentages. In re Peterson, 315 F.3d 1325, 1330 (Fed. Cir. 2003). The claimed range is a result-effective variable threshold electric field affects when the device turns off, the film thickness affects the amount of space the device takes up, and thermal voltage/conductivity affects how much heat is dissipated. Allowable Subject Matter Claim 17 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: A search of the prior art fails to disclose or reasonably suggest the limitations:[claim 17]” a memory layer provided between the third electrode and the fourth electrode and including the first element, the second element, and the third element, the memory layer includes at least one third layer and at least one fourth layer that are stacked, the third layer includes at least one kind of the second element and at least one kind of the third element, includes the third element in the range of 50 atomic % or more and 80 atomic % or less in composition ratio, and is negative in temperature dependence of the threshold voltage, and the fourth layer includes at least one kind of the first element and at least one kind of the third element, includes the first element in the range of 20 atomic % or more and 50 atomic % or less in composition ratio, and is positive in temperature dependence of the threshold voltage” in combination with the remaining limitations of the claim including any intervening claims. . Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to AMAR MOVVA whose telephone number is (571)272-9009. The examiner can normally be reached Monday-Friday 9AM-5PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Julio Maldonado can be reached at 571-272-1864. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /AMAR MOVVA/Primary Examiner, Art Unit 2898
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Prosecution Timeline

Jul 12, 2023
Application Filed
Dec 09, 2025
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
79%
Grant Probability
94%
With Interview (+15.1%)
2y 11m
Median Time to Grant
Low
PTA Risk
Based on 764 resolved cases by this examiner. Grant probability derived from career allow rate.

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