Prosecution Insights
Last updated: October 01, 2026
Application No. 18/261,721

METHOD FOR DETERMINING SYNCHRONIZATION SIGNAL BLOCK PARAMETER AND RELATED APPARATUS

Final Rejection §103§112
Filed
Jul 17, 2023
Priority
Jan 15, 2021 — CN 202110057954.6 +1 more
Examiner
FOLLANSBEE, JOHN A
Art Unit
2444
Tech Center
2400 — Computer Networks
Assignee
Unisoc (Shanghai) Technologies Co., Ltd.
OA Round
2 (Final)
12%
Grant Probability
At Risk
3-4
OA Rounds
8m
Est. Remaining
15%
With Interview

Examiner Intelligence

Grants only 12% of cases
12%
Career Allowance Rate
5 granted / 42 resolved
-46.1% vs TC avg
Minimal +3% lift
Without
With
+3.2%
Interview Lift
resolved cases with interview
Typical timeline
3y 10m
Avg Prosecution
12 currently pending
Career history
64
Total Applications
across all art units

Statute-Specific Performance

§101
7.6%
-32.4% vs TC avg
§103
48.4%
+8.4% vs TC avg
§102
21.4%
-18.6% vs TC avg
§112
17.1%
-22.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 42 resolved cases

Office Action

§103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(d): (d) REFERENCE IN DEPENDENT FORMS.—Subject to subsection (e), a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers. The following is a quotation of pre-AIA 35 U.S.C. 112, fourth paragraph: Subject to the following paragraph [i.e., the fifth paragraph of pre-AIA 35 U.S.C. 112], a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers. Claims 14-16, 18-20, 26-28 rejected under 35 U.S.C. 112(d) or pre-AIA 35 U.S.C. 112, 4th paragraph, as being of improper dependent form for failing to further limit the subject matter of the claim upon which it depends, or for failing to include all the limitations of the claim upon which it depends. Claim 12, states that the subcarrier spacing is 480 kHz. Claims 14-16, 18-20 and 26-28 change the 480 kHz to 120kHz, 240 kHz and 960 kHz, thereby removing the requirement of 480 kHz. Applicant may cancel the claim(s), amend the claim(s) to place the claim(s) in proper dependent form, rewrite the claim(s) in independent form, or present a sufficient showing that the dependent claim(s) complies with the statutory requirements. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 12, 14-16, 18-20, 24, 26-28, 57 and 58 is/are rejected under 35 U.S.C. 103 as being unpatentable over Si (2019/0306832) in view of Harada (2023/0059563). As per claim 12, Si shows the use of a method for determining a length of a discovery burst transmission window of a synchronization signal block (SSB), comprising: determining the length of the discovery burst transmission window of the SSB based on a system information block type-i (SIB 1) (e.g., paragraphs 74, 105, 148 and 163). Si shows the use of the method of claim 14, wherein the value of the length of slots belongs to a first set, and the first set is { 1/8ms, 1/4ms, 1/2ms, 3/4ms, 1ms, 5/4ms} (e.g., paragraphs 185-187 increments of .125ms) but does not show the use of length of the discovery burst transmission window being in .125ms increments. Harada shows the use of the discovery burst transmission window being a variety of sizes (e.g., paragraph 134). It would have obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to modify Si with Harada because it would provide for efficiency and high reliability in higher frequency bands. As per claim 14, Si shows the use of the method of claim 13, wherein a value of the length of the SCS of SS/PBCH block comprises 1 millisecond (ins) (e.g., paragraphs 301-306 and figure 25) and wherein the SSB has a subcarrier spacing of 120 kHz (e.g., TABLE 1), but does not show the use of length of the discovery burst transmission window being 1 ms. Harada shows the use of the discovery burst transmission window being 1ms (e.g., paragraph 134). It would have obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to modify Si with Harada because it would provide for efficiency and high reliability in higher frequency bands. As per claim 15, Si shows the use of the method of claim 14, wherein the value of the length of slots belongs to a first set, and the first set is { 1/8ms, 1/4ms, 1/2ms, 3/4ms, 1ms, 5/4ms} (e.g., paragraphs 185-187 increments of .125ms) but does not show the use of length of the discovery burst transmission window being in .125ms increments. Harada shows the use of the discovery burst transmission window being a variety of sizes (e.g., paragraph 134). It would have obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to modify Si with Harada because it would provide for efficiency and high reliability in higher frequency bands. As per claim 16, Si shows the use of the method of claim 15, wherein the 1/8ms corresponds to one slot, the 1/4ms corresponds to two slots, the 1/2ms corresponds to four slots, the 3/4ms corresponds to six slots, 1ms corresponds to eight slots, and the 5/4ms corresponds to ten slots (e.g., figure 17, paragraph 187 “indexes of design units of 0.125”). As per claim 18, Si shows the use of the method of claim 17, wherein a value of the length of the SCS of SS/PBCH block comprises 1/2ms (e.g., paragraph 313) and wherein the SSB has a subcarrier spacing of 240 kHz (e.g., TABLE 1), but does not show the use of length of the discovery burst transmission window being 1/2 ms. Harada shows the use of the discovery burst transmission window being 1/2ms (e.g., paragraph 134). It would have obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to modify Si with Harada because it would provide for efficiency and high reliability in higher frequency bands. As per claim 19, Si shows the use of the method of claim 18, wherein the value of the length of slots belongs to a second set, and the second set is { 1/16ms, 1/8ms, 1/4ms, 3/8ms, 1/2ms, 5/8ms} (e.g., paragraph 197, increments of .0625ms). Harada shows the use of the discovery burst transmission window being a variety of sizes (e.g., paragraph 134). It would have obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to modify Si with Harada because it would provide for efficiency and high reliability in higher frequency bands. As per claim 20, Si shows the use of the method of claim 19, wherein the 1/16ms corresponds to one slot, the 1/8ms corresponds to two slots, the 1/4ms corresponds to four slots, the 3/8ms corresponds to six slots, the 1/2ms corresponds to eight slots, and the 5/8ms corresponds to ten slots (e.g., figure 19 and paragraphs 197-199 “indexes of design units of .0625 ms”). As per claim 24, Si shows the use of the method of claim 23, wherein the 1/8ms corresponds to four slots, the 1/4ms corresponds to eight slots, the 1/2ms corresponds to 16 slots, the 3/4ms corresponds to 25 slots, the 1ms corresponds to 32 slots, and the 5/4ms corresponds to 40 slots (e.g., paragraph 209, increments of .03125ms). As per claim 26, it is rejected for similar reasons as claim 18. In addition, Si shows the use of the method of claim 12, wherein the SSB has a subcarrier spacing of 960 kHz (e.g., TABLE 2). As per claim 27, it is rejected for similar reasons as claim 19. As per claim 28, Si shows the use of the method of claim 27, wherein the 1/16ms corresponds to 4 slots, the 1/8ms corresponds to 8 slots, the 1/4ms corresponds to 16 slots, the 3/8ms corresponds to 24 slots, the 1/2ms corresponds to 32 slots, and the 5/8ms corresponds to 40 slots (e.g., paragraph 219, increments of .015625ms). As per claim 57, Si shows the use of a terminal equipment, comprising a processor, a memory, and one or more programs stored in the memory and configured to be executed by the processor, the programs comprising instructions for executing; determining a length of a discovery burst transmission window of a synchronization signal block (SSB) based on a system information block type-1 (SIB 1) ) (e.g., paragraphs 74, 105, 148 and 163 and figures 2-3). Si shows the use of the method of claim 14, wherein the value of the length of slots belongs to a first set, and the first set is { 1/8ms, 1/4ms, 1/2ms, 3/4ms, 1ms, 5/4ms} (e.g., paragraphs 185-187 increments of .125ms) but does not show the use of length of the discovery burst transmission window being in .125ms increments. Harada shows the use of the discovery burst transmission window being a variety of sizes (e.g., paragraph 134). It would have obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to modify Si with Harada because it would provide for efficiency and high reliability in higher frequency bands. As per claim 58, Si shows the use of a non-transitory computer-readable storage medium configured to store a computer program used for performing electronic data interchange (EDI), wherein the computer program enables a computer to execute: determining a length of a discovery burst transmission window of a synchronization signal block (SSB) based on a system information block type-1 (SIB 1) (e.g., paragraphs 16, 74, 105, 148 and 163 and figures 2-3). Si shows the use of the method of claim 14, wherein the value of the length of slots belongs to a first set, and the first set is { 1/8ms, 1/4ms, 1/2ms, 3/4ms, 1ms, 5/4ms} (e.g., paragraphs 185-187 increments of .125ms) but does not show the use of length of the discovery burst transmission window being in .125ms increments. Harada shows the use of the discovery burst transmission window being a variety of sizes (e.g., paragraph 134). It would have obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to modify Si with Harada because it would provide for efficiency and high reliability in higher frequency bands. Response to Arguments Applicant's arguments filed 11/05/2025 have been fully considered but they are not persuasive. Applicants argued that Si does not disclose “determining the length of the discovery burst transmission window of the SSB based on a system information block type-1 (SIB1)”. The examiner respectfully disagrees with Applicant because paragraph 148 shows the use of determining the maximum number of blocks (e.g., length) for each frequency and paragraph 163 shows the maximum number of blocks (e.g., length) is 128. In addition, Si shows the use of SIB-1 in paragraph 105. Therefore Si shows the use of determining the length of the discovery burst transmission window of the SSB based on a system information block type-1 (SIB1). Applicants argued that Si in view of Harada does not show “a value of the length of the discovery burst transmission window belongs to a set (1/8ms, 1/4ms, 1/2ms, 3/4ms, 1ms, 5/4ms) in response to the SSB having a subcarrier spacing of 480 kHz. The examiner respectfully disagrees with Applicant because Si shows the use of the method of claim 14, wherein the value of the length of slots belongs to a first set, and the first set is { 1/8ms, 1/4ms, 1/2ms, 3/4ms, 1ms, 5/4ms} (e.g., paragraphs 185-187 increments of .125ms) but does not show the use of length of the discovery burst transmission window being in .125ms increments. Harada shows the use of the discovery burst transmission window being a variety of sizes (e.g., paragraph 134). It would have obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to modify Si with Harada because it would provide for efficiency and high reliability in higher frequency bands. In addition, Harada shows examples, figures 4-12, of different frequencies with different slot sizes and how there is a correspondence between frequencies and slot sizes. For example figure 12 shows for 120 kHz frequency and a slot size of 0.5ms. Based on the correspondence, 480 kHz would have a slot size of 0.25 ms and 960 kHz would have a slot size of 0.125 ms. Therefore in Si which shows at 480 kHz with 0.125 ms (e.g., paragraphs 185, 301-306), a discovery burst transmission window would be 0.25ms for 240 kHz, 0.125 ms for 480 kHz and 0.0625 for 960 kHz. Therefore Si in view of Harada does not show “a value of the length of the discovery burst transmission window belongs to a set (1/8ms, 1/4ms, 1/2ms, 3/4ms, 1ms, 5/4ms) in response to the SSB having a subcarrier spacing of 480 kHz. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOHN A FOLLANSBEE whose telephone number is (571)272-3964. The examiner can normally be reached IFP, M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JOHN A FOLLANSBEE/Supervisory Patent Examiner, Art Unit 2444
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Prosecution Timeline

Jul 17, 2023
Application Filed
Aug 05, 2025
Non-Final Rejection mailed — §103, §112
Nov 05, 2025
Response Filed
May 14, 2026
Final Rejection mailed — §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
12%
Grant Probability
15%
With Interview (+3.2%)
3y 10m (~8m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 42 resolved cases by this examiner. Grant probability derived from career allowance rate.

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