Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Allowable Subject Matter
Claim 5, 9, 10, 12-14 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Note: The Examiner notes that the rejection has not been modified except to address the “correct minor informalities” in the claim language which the Applicant has identified, see the Applicant arguments filed 3/5/2026 “The changes to Claim 1 are supported by the originally filed specification and do not add new matter. In particular, Claim 1 is amended only to correct minor informalities”, i.e. there is no need to change the rejection to respond to correction of “minor informalities” since the process can introduce more “minor informalities” and the Examiner notes that the rejection is the same as before.
Claim(s) 1-4, 6-8, is/are rejected under 35 U.S.C. 103 as being unpatentable over Hsu et al. (US 20070170536 A1) hereafter referred to as Hsu in view of Sipila et al. (US 20040007671 A1) hereafter referred to as Sipila. Lu et al. (CN 103426968 A) hereafter referred to as Lu is provided as evidence of dead layer. Yin et al. (US 20130082354 A1) hereafter referred to as Yin is provided as evidence.
In regard to claim 1 Hsu teaches a photodiode [see paragraph 0017 “FIG. 1 is a partial cross-sectional view of a liquid phase epitaxial (LPE) Germanium-on-Insulator (GOI) photodiode”] , comprising:
a detection portion [ “P-I-N diode 108 has an n+-doped (n+) mesa 110, a p+-doped (p+) Ge bottom insulator interface 112 and mesa lateral interface 114, and a high resistivity Ge layer 116 interposed between the p+ Ge 112/114 and n+ Ge 110”] , having a first surface [top] and a second surface [bottom] opposite each other and parallel to a main plane [top of 110 , 116 ], made of a first germanium-based [see above Ge] crystalline semiconductor material, comprising:
a first n-type doped region [“n+ Ge 110”] , flush with the first surface ;
a second p-type doped region [“p+-doped (p+) Ge bottom insulator interface 112”] , flush with the second surface ;
an intermediate region [“high resistivity Ge layer 116”] located between the first region and the second region and surrounding the first region [see Fig. 1] in the main plane;
a peripheral semiconductor portion [“As seen more clearly in FIG. 4, the p+ Ge mesa lateral interface 114 forms a perimeter around the high resistivity Ge layer 116”] made of a second p-type doped semiconductor material, surrounding the detection portion in the main plane [see Fig. 1] and coming into contact with the second region ;
metal contacts , disposed on the side of the first surface [“A transparent electrode 120 overlies the n+ Ge mesa 110. For example, the transparent electrode can be a conductive material such as ITO or a thin layer of Au”] and adapted to electrically bias the first region and further adapted to electrically bias [“metal electrode 118 overlies a region of p+ Ge mesa lateral interface 114”] the second region with the peripheral semiconductor portion ;
but does not teach an interposed semiconductor portion , disposed on and in contact with the first region of the detection portion ;
that the “electrically bias the first region” is “with the interposed semiconductor portion”
wherein the interposed semiconductor portion is made of a third crystalline semiconductor material having:
a natural lattice parameter equal, to within 1%, to a natural lattice parameter of the first germanium-based semiconductor material;
a bandgap energy at least 0.5 eV higher than that of the first germanium-based semiconductor material.
Lu is provided as evidence of “dead layer”, see Background technology paragraph 0002-0003 “Most photons absorbed in semiconductor producing such electronic hole pair, the electronic hole pair generated photocurrent and generated by solar cell display out of the light voltage. semiconductor doped with different materials to generate space charge layer (space charge) hole and electronic separation using charge carriers. Once separated, a hole and electronic charge carriers of these gathering generating space charge, the space charge caused as light voltage of the voltage across the junction region. If these hole and charge carriers to flow through the external load, then they form photocurrent” “silicon solar cell usually has the structure p-1-n, wherein p layer and n layer is inactive "dead layer", which in the un-doped i layer (absorption layer), establishing a built-in electric field, so that the photo-carriers are effectively collected” “usually p-1-n structure based on silicon hydride film is clamped between the front and back two electrode (contact layer), so as to form an integrated photovoltaic element. front electrode generally used must have good transparency and conductivity, which is typically made of transparent conductive oxide (TCO)” i.e. a person of ordinary skill in the art is aware that although the p and n layers are needed for biasing and charge collection, on the other hand if they are thick then they create what is known as a “dead layer” effect.
See Sipila teaches see paragraph 0031 “FIG. 4 is a schematic cross section through a stack of semiconductor layers that together constitute the radiation-sensitive parts of an X-ray detector 401. Basically the detector's semiconductor stack consists of a pure Ge layer 402 sandwiched between two oppositely doped GaAs layers 403 and 404. "Oppositely doped" means that one of the GaAs layers 403 and 404 is an n-type semiconductor layer and comprises a surplus of negative charge carriers (electrons), while the other is a p-type semiconductor layer and comprises a surplus of positive charge carriers (holes). One of a pair of electrodes 405 and 406 is coupled to each of the doped GaAs layers 403 and 404. The Ge layer 402 is "pure" in the sense that its purity is as high as is commercially reasonably achievable” “Electrically the structure shown in FIG. 4 operates much like an ordinary GaAs pn-diode, so that it can for example be biased either in the forward or in the reverse direction. In order to be useful as an X-ray detector it is biased in the reverse direction by applying a suitable reverse bias voltage between the electrodes 405 and 406” “The GaAs layers 403 and 404 are thin enough so that they do not absorb significant amounts of X-rays incident on the detector, whereas the thickness of the Ge layer 402 is typically 200 micrometers or more”, see lattice matching see paragraph 0017 “The advantageousness of combining just GaAs with Ge comes from the near sameness of certain lattice constants of the two materials. Close lattice constants mean that producing a nice and regularly grown epitaxial layer of one material on top of the other in the manufacturing process is easy”.
See Sipila paragraph 0017 “Close lattice constants mean that producing a nice and regularly grown epitaxial layer of one material on top of the other in the manufacturing process is easy”, see Hsu paragraph 0033 process flow “10. Deposit a thin layer silicon oxide of about 10 nm to 40 nm” “11. Photoresist mask and etch contact holes” “12. Deposit a transparent metal such as indium tin oxide (ITO). Note, there are many other transparent conductor materials known in the art that may be used as an alternative to ITO” “13. Photoresist mask and etch the transparent metal”, thus Hsu teaches how to make SiO2 window and masking and etching for epitaxy and contact formation .
The Examiner notes that a person of ordinary skill in the art is aware that the band gap of Ge is ~0.66 eV whereas that of GaAs is ~1.42 eV.
See Hsu paragraph 0032 “Photoresist mask and perform an Arsenic n+ ion implantation”.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Hsu to include a thin n+ Ge 110 and supplement it with a n-type doped GaAs contact layer between n+ Ge 110 and transparent electrode 120 i.e. to modify Hsu to include an interposed semiconductor portion , disposed on and in contact with the first region of the detection portion ; that the “electrically bias the first region” is “with the interposed semiconductor portion”, wherein the interposed semiconductor portion is made of a third crystalline semiconductor material having: a natural lattice parameter equal, to within 1%, to a natural lattice parameter of the first germanium-based semiconductor material; a bandgap energy at least 0.5 eV higher than that of the first germanium-based semiconductor material.
Thus it would be obvious to combine the references to arrive at the claimed invention.
The motivation is that using a higher band gap material such as GaAs on Ge 110 allows current to flow easily to the electrode 120 while at the same time allowing a shallow n+ Ge 110 to be less thick “dead layer” and that GaAs is lattice matched to Ge and due to higher band gap it has lower absorption than Ge in the Ge photodiode.
In regard to claim 2 Hsu and Sipila as combined teaches wherein the interposed semiconductor portion [see combination claim 1, the GaAs is also doped n type] comprises n-type dopants
but does not state identical to those present in the first region .
However a person of ordinary skill in the art is aware that GaAs and Ge share common dopants such as Si.
The Examiner notes case law, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to use " identical to those present in the first region ", since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Hsu to include identical to those present in the first region .
Thus it would be obvious to combine the references to arrive at the claimed invention.
The motivation is simply ease of manufacture by using the same dopants.
In regard to claim 3 Hsu and Sipila as combined teaches wherein the interposed semiconductor portion is made [see combination see GaAs] of a III-V crystalline semiconductor compound.
In regard to claim 4 Hsu and Sipila as combined teaches wherein the interposed semiconductor portion [see combination see GaAs] is made of AlAs or GaAs.
In regard to claim 6 Hsu and Sipila as combined teaches wherein one of the metal contacts , is a central metal contact, located on [see combination claim 1, a n-type doped GaAs contact layer between n+ Ge 110 and transparent electrode 120] and in contact with the intermediate semiconductor portion .
In regard to claim 7 Hsu and Sipila as combined teaches further comprising an upper semiconductor portion located on and in contact with [see under broadest reasonable interpretation, the “upper semiconductor portion” can simply be the upper part of the “interposed semiconductor portion”, the Examiner notes that there is no way as per claim 7 to distinguish “upper semiconductor portion” from “interposed semiconductor portion”] the interposed semiconductor portion ,made of an n-type doped semiconductor material with dopants identical to [see it is simply the upper portion] those of the interposed semiconductor portion and of the first region.
In regard to claim 8 Hsu and Sipila as combined teaches wherein one of the metal contacts , is a central metal contact, is located on and in [see claim 7, see the “upper semiconductor portion” can simply be the upper part of the “interposed semiconductor portion”, see combination claim 1, a n-type doped GaAs contact layer between n+ Ge 110 and transparent electrode 120] contact with the upper semiconductor portion .
In regard to claim 11 Hsu and Sipila as combined teaches a method for manufacturing a photodiode as claimed in claim 1,comprising :
producing a stack [see Hsu Fig. 5] comprising a first sub-layer intended to forn the second region and a second sub-layer intended to form the intermediate region;
producing an upper insulating layer [see Hsu Fig. 5 see top is SiN] covering the stack;
producing the peripheral semiconductor portion through [see Hsu Fig. 5, see paragraph 0031 “Perform multiple boron ion implantations to dope the perimeters of Ge island to p+. See FIG. 6, which is a cross-sectional view after p+ ion implantation”] the stack and the upper insulating layer in order to emerge onto the first sub-layer ;
producing the interposed semiconductor portion by epitaxy [see combination Sipila see Sipila paragraph 0017 “Close lattice constants mean that producing a nice and regularly grown epitaxial layer of one material on top of the other in the manufacturing process is easy” ] from the second sub-layer of the stack, through an opening [see claim 1 combination, Hsu teaches how to make SiO2 window and masking and etching for epitaxy and contact formation , thus epitaxy and contact formation can be done in the SiO2 window, see Sipila paragraph 0017 “Close lattice constants mean that producing a nice and regularly grown epitaxial layer of one material on top of the other in the manufacturing process is easy”, see Hsu paragraph 0033 process flow “10. Deposit a thin layer silicon oxide of about 10 nm to 40 nm” “11. Photoresist mask and etch contact holes” “12. Deposit a transparent metal such as indium tin oxide (ITO). Note, there are many other transparent conductor materials known in the art that may be used as an alternative to ITO” “13. Photoresist mask and etch the transparent metal”] of the upper insulating layer.
In regard to claim 15 Hsu and Sipila as combined teaches the method further comprising: producing metal contacts [see Hsu “A transparent electrode 120 overlies the n+ Ge mesa 110. For example, the transparent electrode can be a conductive material such as ITO or a thin layer of Au” “metal electrode 118 overlies a region of p+ Ge mesa lateral interface 114” see paragraph 0033 process flow “10. Deposit a thin layer silicon oxide of about 10 nm to 40 nm” “11. Photoresist mask and etch contact holes” “12. Deposit a transparent metal such as indium tin oxide (ITO). Note, there are many other transparent conductor materials known in the art that may be used as an alternative to ITO” “13. Photoresist mask and etch the transparent metal”] ,one in contact with the interposed semiconductor portion , and the other in contact with the peripheral semiconductor portion
but does not state wherein the interposed semiconductor portion is n-type doped during the epitaxy thereof .
See Sipila paragraph 0041 “Ion implanting is not the only known way of producing doped semiconductor layers. It is only mentioned here as en example of how the desired result can be achieved”.
See Hsu teaches “liquid phase epitaxial (LPE)” and a person of ordinary skill in the art is aware that LPE allows in-situ doping.
See as evidence Yin paragraph 0031 “selective epitaxial growth and in-situ doping are common techniques known by those having ordinary skill in the art, and no more unnecessary details will be provided here”.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Hsu to include wherein the interposed semiconductor portion is n-type doped during the epitaxy thereof .
Thus it would be obvious to combine the references to arrive at the claimed invention.
The motivation is that in-situ doping is standard and known to a person of ordinary skill in the art to give good results for doping epitaxial layers.
Response to Arguments
Applicant's arguments filed 3/5/2026 have been fully considered but they are not persuasive.
The Examiner repeats the Prior art names and numbers so that the numbers can be associated with the names of the prior art: Hsu et al. (US 20070170536 A1), Sipila et al. (US 20040007671 A1), Lu et al. (CN 103426968 A), Yin et al. (US 20130082354 A1).
On page 3 the Applicant argues “Further, Applicant notes that page 2 of the Office Action states that the '354 application "... is provided as evidence." However, Applicant notes that it is not clear to Applicant what evidence the '354 application is meant to convey, as the '354 application is not further mentioned in the rejection of Claim 1”.
The Examiner responds that the evidence of Yin is used in claim 15.
On page 3 the Applicant argues “The '968 application is directed to a thin film solar cell.
In particular, the Office Action on page 4 asserts that the '968 application is cited "... as evidence of 'dead layer,"' and cites to paragraphs 2 and 3 from the Background section of the '968 application. In this regard, Applicant notes that '968 paragraph 3 states that a nanocrystalline silicon solar cell "... usually has the structure P-I-N, wherein P layer and N layer is inactive 'dead layer,' which in the undoped I layer (absorption layer), establishing a built-in electric field, so that the photo-carriers are effectively collected." However, the relevance of this '968 passage to Claim 1 is unclear to Applicant, but appears to describe an effect that may occur if the P and N layers are thick. However, Applicant notes that the Office Action on page 4 does not specifically assert that the '968 application discloses an interposed semiconductor portion or cures any deficiencies of the '536 application directly”
The Examiner responds that the evidence of Lu is what the Applicant is aware, namely that any person of ordinary skill in the art knows about “dead layer” and this is relevant to the behavior of p and n layers in the device of Hsu.
The Examiner responds that the Examiner cannot give an allowance to the Applicant for applying a known solution to a known problem, Lu is evidence of the known problem and Sipila teaches the known solution.
On page 4, 5 the Applicant argues “The '671 application is directed to an X-ray detector comprising, as a detecting element, a semiconductor heterostructure where an undoped Germanium layer is enclosed between two oppositely doped Gallium Arsenide layers. In particular, as noted by the Office Action, and shown in Figure 4, the '671 application discloses a schematic cross-section through a stack of semiconductor layers that together constitute the X-ray detector 401, including a pure Ge layer 402 sandwiched between two oppositely doped GaAs layers 403 and 404. Further, as noted by the Office Action on page 5, '671 paragraph 17 states that the GaAs layers and the Ge layer have "near sameness of certain lattice constants," which means that producing "a nice and regularly grown epitaxial layer of one material on top of the other in the manufacturing process is easy."9
Based on the above-described teachings of the '968 and '671 applications, the Office Action on page 6 asserts that it would have thus been obvious to modify the '536 photodiode to insert an additional interposed semiconductor portion with the claimed properties. Applicant strongly disagrees. First, Applicant respectfully submits that the Office appears to be mistaken in somehow equating the '671 pure germanium layer 402 with the claimed interposed semiconductor portion. The '671 pure germanium layer 402 corresponds functionally only to an intermediate layer, i.e., the I layer in a P-I-N junction. See '671 Figure 4. Moreover, Applicant notes that none of the cited references teach or suggest adding an "additional" portion to the conventional three-zone structure of a photodiode, wherein the additional portion is in contact with one of the n-doped region of the photodiode, and is involved in the polarization of that region. Rather, all of the cited references disclose the conventional three-zone structure of a photodiode. Rather, the Office appears to be engaged in the process of hindsight reconstruction to magically insert an additional layer in the '536 device to be the claimed interposed semiconductor portion, as well as having the claimed properties and location, e.g., in contact with the first region (n-type).”
The Examiner responds that the Examiner cannot give an allowance to the Applicant for applying a known solution to a known problem, Lu is evidence of the known problem and Sipila teaches the known solution.
The Examiner responds that secondary reference Sipila uses GaAs on Ge precisely because of the band-gap difference i.e. what the Examiner is saying is that the Applicant uses GaAs on Ge because it it known in the prior art that using GaAs on Ge allows light to not be absorbed in the “dead layer” i.e. it is not that the Examiner is using Hindsight, it is that the Applicant is applying a known solution to a known problem, Lu is evidence of the known problem and Sipila teaches the known solution, and this is not novel and there is no way that the Examiner can agree that the Applicant invented the use of a band gap difference, the rejection makes it clear that this is known in the art and thus the Examiner cannot give an allowance. The Applicant argues about “claimed properties and location” however the Examiner responds that the claim limitation of “claimed properties and location” are simply a recitation of the known solution in the art i.e. GaAs on Ge to prevent light from being absorbed in the “dead layer”, thus the claim recitation is a description of what any person of ordinary skill in the art already knows, and it is not novel in any way.
On page 4, 5 the Applicant argues “However, it is unclear to Applicant how the '968 application's discussion of a "dead layer" and the '671 application's disclosure of a pure Ge layer in a conventional P-I-N photodiode would motivate one of ordinary skill to insert the claimed interposed semiconductor portion into a conventional photodiode.
Moreover, regarding the claimed bandgap energy feature, while the bandgap of Ge and the bandgap of GaAs may be as set forth on the bottom of page 5 of the Office Action, this comparison is not relevant or consistent with the features of Claim 1, as the '671 application discloses that the pure Ge layer 402 has the lowest gap that is sandwiched between the p and n doped layers 403 and 404 of a P-I-N junction that are doped in opposite ways. However, in Claim 1, it is the opposite, in which the interposed semiconductor portion has the highest bandgap (and can be GaAs as recited in Claim 4), and the first and second portions are Ge-based crystalline material.
Further, Applicant notes that the reference in the Office Action to the layer thickness in the '671 and '968 applications appears to relate to the lattice parameters of respective materials. However, Applicant notes that the single-crystal structure is independent of the thickness of the layers, and the comparison does not appear to be consistent with the teaching in the '671 application regarding the proximity of certain lattice constants of GaAs and Ge.”.
The Examiner responds that the Examiner cannot give an allowance to the Applicant for applying a known solution to a known problem, Lu is evidence of the known problem and Sipila teaches the known solution.
The Examiner responds that secondary reference Sipila uses GaAs on Ge precisely because lattice matching allows GaAs to be put on the Ge, and that GaAs has a higher band gap to prevent light from being absorbed in the “dead layer” so the Applicant’s argument that “in Claim 1, it is the opposite, in which the interposed semiconductor portion has the highest bandgap (and can be GaAs as recited in Claim 4)” is not novel, the Examiner cannot agree that the Applicant invented the higher band gap of GaAs in the current path, it is known in the art and it is taught by secondary reference Sipila.
On page 6, 7 the Applicant argues “Moreover, Applicant notes that the stated motivation for adding "an n-type doped GaAs contact layer between the n+ Ge 110 and transparent electrode 120" of the '536 application appears to be "... using a higher bandgap material such as GaAs on Ge 110 allows current to flow easily to the electrode 120 while at the same time allowing a shallow n+ Ge 110 to be a less thick 'dead layer' and that GaAs is lattice matched to Ge and due to higher bandgap it has lower absorption than Ge in the Ge diode." However, the stated motivation appears to relate to combining Ga and GaAs in the context of the '671 application only, not a reason to combine the teachings of the four cited references, in particular the modify to '536 device. In particular, none of the cited references teaches or suggests adding an additional interposed semiconductor portion disposed on and in contact with the first region of a detected portion that includes a first region, a second region, and an intermediate region. The motivation for adding the additional interposed semiconductor portion appears to merely be hindsight reconstruction of Applicant's invention, using Claim 1 as a guide. However, none of the cited references teach or suggest such an additional layer, and the citation to the three-layer device of the '671 application and the "dead layer" discussion in the '968 application appears to merely be a completely manufactured narrative to justify inserting the interposed semiconductor portion into the '536 device. However, Applicant respectfully submits that one of ordinary skill in the art would not have been motivated to make such a significant structural change to the '536 device based on the teachings of the cited references.” “The '354 application does not cure the deficiencies of the '536, '671, and '968 applications. Thus, no matter how the teachings of the '536, '671, '968, and '354 applications are combined, the combination does not teach or suggest an interposed semiconductor portion disposed on and in contact with the first region of the detection portion, wherein the interposed semiconductor portion is made of a third crystalline semiconductor material having: a natural lattice parameter equal to within 1%, to a natural lattice parameter of the first germanium-based semiconductor material; and a bandgap energy at least 0.5 eV higher than that of the first germanium-based semiconductor material, as recited in amended Claim 1”.
The Examiner responds that the Examiner cannot give an allowance to the Applicant for applying a known solution to a known problem, Lu is evidence of the known problem and Sipila teaches the known solution.
The Examiner responds that secondary reference Sipila uses GaAs on Ge precisely because of the band-gap difference i.e. what the Examiner is saying is that the Applicant uses GaAs on Ge because it it known in the prior art that using GaAs on Ge allows light to not be absorbed in the “dead layer” i.e. it is not that the Examiner is using Hindsight, it is that the Applicant is applying a known solution to a known problem, Lu is evidence of the known problem and Sipila teaches the known solution, and this is not novel and there is no way that the Examiner can agree that the Applicant invented the use of a band gap difference, the rejection makes it clear that this is known in the art and thus the Examiner cannot give an allowance. The Applicant argues about “not a reason to combine the teachings of the four cited references, in particular the modify to '536 device” however the Examiner responds that the use of GaAs on Ge to prevent light from being absorbed in the “dead layer” is a very strong motivation that directly improves operation of the device of Hsu, and the Applicant is merely doing what the prior art has already done, so it is not novel and the Examiner cannot give an allowance.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SITARAMARAO S YECHURI whose telephone number is (571)272-8764. The examiner can normally be reached M-F 8:00-4:30 PM.
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/SITARAMARAO S YECHURI/ Primary Examiner, Art Unit 2893
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