DETAILED ACTION
Claims 1-7, 15-27 are pending.
Notice of Pre-AIA or AIA Status
This Office Action is sent in response to Applicant’s Communication received on 12/15/2025 for application number 18/270,526.
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 5-7, 15-18, 20-24, 26 and 27 are rejected under 35 U.S.C. 103 as being unpatentable over Purandare (US 2022 / 0413720 A1) in view of Hovis et al. (US 2020 / 0409450 A1).
Regarding claim 1, Purandare teaches a power supply voltage control method, comprising:
determining a voltage determination parameter based on a ratio of a first value to a second value, wherein the first value is a number of cores in an operating state in a blockchain server, and the second value is a total number of cores in the blockchain server (“determine a ratio R(k) of the count N(k) of active processing engines to a total count T of the plurality of processing engines in the processor… and store the count A(k,p) in a row k of a virtual partition power limit table associated with the virtual partition p.” par 0335 and “the disclosed embodiments may be implemented in any type of computer system, including server computers (e.g., tower, rack, blade, micro-server and so forth), communications systems, storage systems, desktop computers of any configuration,” par 0041 and Figure 29) [this shows calculating a ratio of active processing engines (first value) to total number of processing engines (second value) and storing this in a virtual partition power limit table which corresponds to a voltage determination parameter as it contains the active processing engines count and corresponding maximum frequencies which the power control unit uses to control power supply’s voltage for a specific virtual partition (see paragraph 0323)];
determining a target voltage value of a power supply of the blockchain server based on the voltage determination parameter (“for each virtual partition of the generated plurality of virtual partitions, control a power supply of the virtual partition based on the associated virtual partition power limit table.” Par 0314) [the target voltage value is the specific voltage value that the power supply is controlled to provide, corresponding to the maximum frequency and active processing engine count stored in the power limit table (voltage determination parameter)].
However, Purandare does not explicitly teach controlling a value of an output voltage of the power supply to be the target voltage value, wherein the determining the target voltage value of the power supply of the blockchain server based on the voltage determination parameter comprises: gradually adjusting a voltage value of the power supply with a predetermined uniform voltage adjustment step, and detecting the corresponding voltage determination parameter to determine the maximum voltage determination parameter; and determining the minimum voltage value among the adjusted voltage values corresponding to the maximum voltage determination parameter as the target voltage value.
In the analogous art, Hovis teaches controlling a value of an output voltage of the power supply to be the target voltage value (“determining a target level of a supply voltage for the integrated circuit device based on the indication, and controlling voltage regulation circuitry to adjust a present level of the supply voltage for the integrated circuit device in accordance with the target level.” Par 0116),
wherein the determining the target voltage value of the power supply of the blockchain server based on the voltage determination parameter comprises:
gradually adjusting a voltage value of the power supply with a predetermined uniform voltage adjustment step (“The power reduction using voltage adjustment processes herein can employ…associated power controller circuitry with selectable voltage supply values (… increments of 12.5 mV, 6.25 mV, 3.125 mV, …), where the integrated circuit device communicates with the associated power controller circuitry to indicate the desired voltage supply values during an associated power… state in which the processing device may be operating.” Par 0032 and “supply voltages will be incrementally adjusted by voltage control system 125” par 0036 and “Voltages provided by power system 130 … can be lowered one incremental step at a time” par 0044), and detecting the corresponding voltage determination parameter to determine the maximum voltage determination parameter (“execution-optimized technique, determines offsets from the minimum operating voltages on a… per-software element basis to establish optimal operating voltages dynamically.” Par 0017 and “characterization can be performed to determine what hardware elements are employed…such as active processing cores,… The characterization process can execute software elements over various performance regimes, …to determine maximum power consumptions, average power consumptions, … This performance can include power consumption and dynamic performance” par 0055-0056 and “Significant power savings can be achieved by tuning voltage levels to be at minimum levels needed to support execution of the software elements. This can lead to … support higher operating frequencies for a given operating voltage,” par 0020 and paragraphs 28-31 and Figure 3) [the optimal performance and maximum performance potential is searched for using the active core count (subset of total cores)]; and
determining the minimum voltage value among the adjusted voltage values corresponding to the maximum voltage determination parameter as the target voltage value (“tuning voltage levels to be at minimum levels needed to support execution… [to] support higher operating frequencies for a given operating voltage,” par 0020 and “establishing a minimum operating voltage… based on a current value of the iteratively reduced voltages,… instructing voltage regulator circuitry of a voltage control system (such as voltage control system 125 of FIG. 1 or voltage regulator units 541-543 of power system 540 in FIG. 5) to supply the at least one resultant supply voltage” par 0107) [this shows determining lowest viable voltage that enables higher operating frequencies and sets it as the target (resultant) voltage].
It would have been obvious to a person having ordinary skill in the art, having the teachings of Purandare and Hovis before him before the effective filing date of the claimed invention, to have modified Purandare to incorporate the teachings of Hovis to gradually adjust the voltage with uniform increments, detect the corresponding voltage determination parameter to determine the maximum voltage determination parameter and determine the maximum voltage determination parameter to maximize core operation and longevity in blockchain servers through precise voltage control.
Claim 16 corresponds to claim 1 and is rejected accordingly.
Regarding claim 2, Purandare and Hovis teach the method according to claim 1. Hovis further teaches wherein the determining the target voltage value of the power supply of the blockchain server based on the voltage determination parameter comprises:
gradually increasing a voltage value of the power supply with a predetermined voltage adjustment step (“this performance test includes incrementally adjusting at least one supply voltage by initially operating one or more voltage domains of system processor 120 at a first supply voltage lower than a manufacturer specified operating voltage and progressively raising the supply voltage in predetermined increments while performing the functional test and monitoring for occurrence of the operational failures.” Par 0036 and Figure 1 and 2) [this directly describes gradually increasing the supply voltage using predetermined parameters];
gradually reducing the voltage value with the voltage adjustment step when the voltage value is increased until the voltage determination parameter remains unchanged or starts to decrease (“this performance test includes incrementally adjusting at least one supply voltage by initially operating one or more voltage domains of system processor 120 at a first supply voltage lower than a manufacturer specified operating voltage and progressively lowering the supply voltage in predetermined increments while performing the functional test and monitoring for occurrence of the operational failures.” Par 0036 and Figure 2) [the voltage starts to decrease when operational failures are detected; the voltage parameter remaining unchanged implies successful operation]; and
determining a result of summation of a current voltage value of the power supply and a single voltage adjustment step as the target voltage value when the voltage value is reduced until the voltage determination parameter starts to decrease (“Finally, a lowest or reduced operating voltage is found at V3 and optional margin is applied to establish VOP.” par 0049 and “Safety margin of 50 mV might be added in graph 250 to establish VOP and account for variation in user applications and device aging that will occur over time.” Par 0050) [under BRI, V3 represents the current voltage value (lowest functional voltage found), the optional margin/safety margin functions as the single voltage adjustment step; the addition to establish Vop corresponds to a summation of V3 and safety margin to determine the target voltage value; Vop = V3+safety margin].
Claim 17 and 23 corresponds to claim 2 and are rejected accordingly.
Regarding claim 3, Purandare and Hovis teach the method according to claim 1. Hovis further teaches wherein the determining the target voltage value of the power supply of the blockchain server based on the voltage determination parameter comprises:
gradually reducing a voltage value of the power supply with a predetermined voltage adjustment step when the voltage determination parameter is equal to a predetermined target value (“If system processor 120 does not experience failures or errors relevant to the voltage adjustment process during the linger time, then the specific input voltages employed can be considered to be sufficiently high to operate system processor 120 successfully (213). Thus, the particular iteration of input voltage levels applied to system processor 120 is considered a ‘pass’ and another progressively adjusted input voltage can be applied. As seen in operation (215) of FIG. 2, input voltages for system processor 120 can be incrementally lowered, system processor 120 restarted, and the functional tests executed again for the linger time.” Par 0043 and Figure 2) [this shows successful operation of a blockchain server (where the voltage determination parameter is at the predetermined target, shown by lack of failures/errors and is operating successfully) leads to gradually reducing its power supply in uniform increments]; and
determining a result of summation of a current voltage value of the power supply and a single voltage adjustment step as the target voltage value when the voltage value is reduced until the voltage determination parameter starts to decrease (“Finally, a lowest or reduced operating voltage is found at V3 and optional margin is applied to establish VOP.” par 0049 and “Safety margin of 50 mV might be added in graph 250 to establish VOP and account for variation in user applications and device aging that will occur over time.” Par 0050) [under BRI, V3 represents the current voltage value (lowest functional voltage found), the optional margin/safety margin functions as the single voltage adjustment step; the addition to establish Vop corresponds to a summation of V3 and safety margin to determine the target voltage value; Vop = V3+safety margin].
Claims 18 and 24 correspond to claim 3 and are rejected accordingly.
Regarding claim 5, Purandare and Hovis teach the method according to claim 3. Hovis further teaches further comprising:
recording a maximum value of the voltage determination parameter of the blockchain server in a frequency up-conversion stage after startup (“An upward voltage search process uses progressively raised voltages to establish an operational voltage, VOP.” par 0050 and “The voltage values determined from the voltage adjustment process can be stored (216) by voltage control system 125 into a memory device or data structure along with other corresponding information” par 0046) [the Vop may correspond to the maximum stable value of the voltage determination parameter]; and
determining the maximum value as the target value (“determining a target level of a supply voltage for the integrated circuit device based on the indication, and controlling voltage regulation circuitry to adjust a present level of the supply voltage for the integrated circuit device in accordance with the target level.” Par 0116 and “VOP is employed for the normal operation of the system processor for a period of operational time indicated by t5.” Par 0049 and Figure 2) [this shows Vop serves as the target voltage of the processor’s operation].
Claims 20 and 26 correspond to claim 5 and are rejected accordingly.
Regarding claim 6, Purandare and Hovis teach the method according to claim 1. Purandare further teaches further comprising:
determining the second value based on a number of chips in the blockchain server and a number of cores included in each of the chips (“a total count T of the plurality of processing engines in the processor;” par 0316) [total count T corresponds to the second value].
Claims 21 and 27 correspond to claim 6 and are rejected accordingly.
Regarding claim 7, Purandare and Hovis teach the method according to claim 1, Hovis further teaches further comprising:
transmitting computing tasks to all cores in the blockchain server, respectively (“The functional tests for CPU portions can include operations initiated simultaneously on all the processing cores (or a sufficient number of them to represent a ‘worst’ possible case that a user application might experience) to produce both static/DC power demand and dynamic/AC power demand for the processing cores that replicates real-world operations.” Par 0031) [this describes initiating operations (computing tasks) simultaneously on all processing cores within a computing system].
Purandare further teaches counting cores that execute the computing tasks to return a specified random number (“each row may include an active number field 2820 that indicates the number N(k) of active processing engines in the processor for the bucket identifier k,” par 0284 and “The decode unit 2040 (or decoder) may decode instructions, and generate as an output one or more micro-operations, micro-code entry points, microinstructions, other instructions, or other control signals, which are decoded from, or which otherwise reflect, or are derived from, the original instructions.” Par 0229) [this describes tracking number if active processing engines]; and
determining a number of the counted cores as the first value (“determine a ratio R(k) of the count N(k) of active processing engines to a total count T of the plurality of processing engines in the processor;” par 0316) [N(k) represents active cores (first value)].
Claim 22 corresponds to claim 7 and is rejected accordingly.
Regarding claim 15, Purandare and Hovis teach a blockchain server. Purandare further teaches a server (“A processor designed using one or more cores having pipelines as in any one or more of FIGS. 5-8 may be implemented in many different end products, extending from mobile devices to server systems.” Par 0091) comprising:
a chip board, comprising a plurality of chips, wherein each of the chips comprises at least one core (“As shown in FIG. 15A, multiprocessor system 1500 is a point-to-point interconnect system, and includes a first processor 1570 and a second processor 1580 coupled via a point-to-point interconnect 1550. As shown in FIG. 15A, each of processors 1570 and 1580 may be multicore processors, including first and second processor cores (i.e., processor cores 1574 a and 1574 b and processor cores 1584 a and 1584 b), although potentially many more cores may be present in the processors.” Par 0129) [the multiprocessor system may represent a chip board]; and
determining a voltage determination parameter based on a ratio of a first value to a second value, wherein the first value is a number of cores in an operating state in the blockchain server, and the second value is a total number of cores in the blockchain server (“determine a ratio R(k) of the count N(k) of active processing engines to a total count T of the plurality of processing engines in the processor… and store the count A(k,p) in a row k of a virtual partition power limit table associated with the virtual partition p.” par 0335 and Figure 29) [this shows calculating a ratio of active processing engines (first value) to total number of processing engines (second value) and storing this in a virtual partition power limit table which corresponds to a voltage determination parameter as it contains the active processing engines count and corresponding maximum frequencies which the power control unit uses to control power supply’s voltage for a specific virtual partition (see paragraph 0323)];
determining a target voltage value of a power supply of the blockchain server based on the voltage determination parameter (“for each virtual partition of the generated plurality of virtual partitions, control a power supply of the virtual partition based on the associated virtual partition power limit table.” Par 0314) [the target voltage value is the specific voltage value that the power supply is controlled to provide, corresponding to the maximum frequency and active processing engine count stored in the power limit table (voltage determination parameter)].
Hovis further teaches a control board, comprising a memory and a processor, wherein the memory stores an application that, when executed by the processor, implements a power supply voltage control method (“Control core 520 can comprise one or more microprocessors and other processing circuitry. Control core 520 can retrieve and execute software or firmware, such as firmware 560 comprising voltage control firmware, voltage monitoring firmware, and voltage optimization, minimization, or characterization firmware from an associated storage system, which might be stored on portions of storage system 531, RAM 532, or auxiliary memory 535.” Par 0087 and “Control core 520 can execute at least a portion of a voltage minimization process, voltage optimization process, or voltage characterization process for integrated circuit device 510.” Par 0086) [control core corresponds to the control board] according to claim 1 comprising:
controlling a value of an output voltage of the power supply to be the target voltage value (“determining a target level of a supply voltage for the integrated circuit device based on the indication, and controlling voltage regulation circuitry to adjust a present level of the supply voltage for the integrated circuit device in accordance with the target level.” Par 0116); and
wherein the determining the target voltage value of the power supply of the blockchain server based on the voltage determination parameter comprises:
gradually adjusting a voltage value of the power supply with a predetermined uniform voltage adjustment step (“The power reduction using voltage adjustment processes herein can employ…associated power controller circuitry with selectable voltage supply values (… increments of 12.5 mV, 6.25 mV, 3.125 mV, …), where the integrated circuit device communicates with the associated power controller circuitry to indicate the desired voltage supply values during an associated power… state in which the processing device may be operating.” Par 0032), and detecting the corresponding voltage determination parameter to determine the maximum voltage determination parameter (“execution-optimized technique, determines offsets from the minimum operating voltages on a… per-software element basis to establish optimal operating voltages dynamically.” Par 0017 and “characterization can be performed to determine what hardware elements are employed…such as active processing cores,… The characterization process can execute software elements over various performance regimes, …to determine maximum power consumptions, average power consumptions, … This performance can include power consumption and dynamic performance” par 0055-0056 and “Significant power savings can be achieved by tuning voltage levels to be at minimum levels needed to support execution of the software elements. This can lead to … support higher operating frequencies for a given operating voltage,” par 0020 and paragraphs 28-31 and Figure 3) [the optimal performance and maximum performance potential is searched for using the active core count (subset of total cores)]; and
determining the minimum voltage value among the obtained voltage values corresponding to the maximum voltage determination parameter as the target voltage value (“tuning voltage levels to be at minimum levels needed to support execution… [to] support higher operating frequencies for a given operating voltage,” par 0020 and “establishing a minimum operating voltage… based on a current value of the iteratively reduced voltages,… instructing voltage regulator circuitry of a voltage control system (such as voltage control system 125 of FIG. 1 or voltage regulator units 541-543 of power system 540 in FIG. 5) to supply the at least one resultant supply voltage” par 0107) [this shows determining lowest viable voltage that enables higher operating frequencies and sets it as the target (resultant) voltage]; and
wherein the chip board forms a signal connection to the control board through a signal connection interface (“These voltage parameters can be retrieved responsive to indications provided by system processor 120 to voltage control system 125.” Par 0024) [system processor 120 corresponds to the chip board and voltage control system 125 functions as the control board; the indications correspond to the signal connection], and the chip board forms an electrical connection to the power supply through a power connection interface (“power system 130 provides one or more input voltages to system processor 120 over links 161.” Par 0023 and Figure 1) [links 161 serve as the power connection interface].
Claims 4, 19 and 25 are rejected under 35 U.S.C. 103 as being unpatentable over Purandare and Hovis in view of Kubo et al. (US 2018 / 0365178 A1).
Regarding claim 4, Purandare and Hovis teach the method according to claim 1. Hovis further teaches wherein the determining the target voltage value of the power supply of the blockchain server based on the voltage determination parameter comprises:
gradually increasing a voltage value of the power supply with a predetermined voltage adjustment step when the voltage determination parameter is less than a predetermined target value (“this performance test includes incrementally adjusting at least one supply voltage by initially operating one or more voltage domains of system processor 120 at a first supply voltage lower than a manufacturer specified operating voltage and progressively raising the supply voltage in predetermined increments while performing the functional test and monitoring for occurrence of the operational failures.” Par 0036 and Figure 1 and 2) [this directly describes gradually increasing the supply voltage using predetermined parameters; this step is usually initiated when voltages are low and performance (voltage determination parameter is not at a target level].
However, Purandare and Hovis do not explicitly teach determining a result obtained by subtracting a single voltage adjustment step from a current voltage value of the power supply as the target voltage value when the voltage value is increased until the voltage determination parameter remains unchanged and gradually reducing the voltage value with the voltage adjustment step when the voltage value is increased until the voltage determination parameter starts to decrease, and determining a result of summation of the current voltage value of the power supply and the single voltage adjustment step as the target voltage value when the voltage value is reduced until the voltage determination parameter first increases, then remains unchanged, and then starts to decrease.
In the analogous art, Kubo teaches determining a result obtained by subtracting a single voltage adjustment step from a current voltage value of the power supply as the target voltage value when the voltage value is increased until the voltage determination parameter remains unchanged (“As shown in FIG. 3, after the excess or shortage of the AC timing window width due to the variation in the load of data transmission/reception between the semiconductor integrated circuit 101 and the external memory 102 or the variation in the temperature of the semiconductor integrated circuit 101 has been solved to allow the output voltage of the second power supply IC 112 to converge, the AC timing window width becomes constant irrespective of the output voltage.” Par 0068) [the AC timing window width may correspond to the voltage determination parameter; the quote implies that further voltage increases yield no change in the parameter, which then necessitates lowering the voltage to optimize power dissipation]; and
gradually reducing the voltage value with the voltage adjustment step when the voltage value is increased until the voltage determination parameter starts to decrease (“If the window width is too broad (if the answer is TOO BROAD in Step S105), the determination circuit 106 outputs control information indicating that the voltage of the second power supply IC 112 be lowered to the voltage control circuit 108.” Par 0040 and Figure 2) [under BRI, if increasing the voltage causes the AC timing window width to become too broad, this signifies exceeding an optimal point and prompts the system to lower the voltage for stable data transmission], and determining a result of summation of the current voltage value of the power supply and the single voltage adjustment step as the target voltage value when the voltage value is reduced until the voltage determination parameter first increases, then remains unchanged, and then starts to decrease (“On the other hand, if the window width is too narrow (if the answer is TOO NARROW in Step S105), the determination circuit 106 outputs control information indicating that the voltage of the second power supply IC 112 be raised to the voltage control circuit 108. In accordance with this instruction, the voltage control circuit 108 raises the voltage of the second power supply IC 112 (in S107).” Par 0041 and Figure 2) [if a voltage reduction leads to the AC timing window width first increasing, then stabilizing, then decreasing, this decrease would correspond to the window becoming too narrow, prompting the voltage to increase by a signal adjustment step].
It would have been obvious to a person having ordinary skill in the art, having the teachings of Purandare, Hovis and Kubo before him before the effective filing date of the claimed invention, to have modified Purandare and Hovis to incorporate the teachings of Kubo to gradually increase/decrease the voltage value with the voltage adjustment step based on certain scenarios to establish data transmission/reception with good stability between external memory and internal circuits. (Kubo, paragraph 38)
Claims 19 and 25 correspond to claim 4 and are rejected accordingly.
Response to Arguments
Applicant’s arguments, see pages 1-4, filed 11/10/2025, with respect to the rejection(s) of claim(s) 1, 15, and 16 under 35 U.S.C. 103 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Purandare in view of Hovis.
Hovis describes an execution-optimized technique to determine optimal operating voltages dynamically by characterizing performance based on the number of active processing cores to support higher operating frequencies and achieve “significant power savings.” (see paragraph 20). Hovis describes an active characterization of internal hardware states (identifying active processing cores – the subset – versus all portions – the total) to determine dynamic performance and establish optimal operating voltages dynamically in real time based on the processor’s current computational state. (see paragraph 17 and Figure 3) Examiner respectfully points to the updated mapping of claim 1.
No additional arguments were presented as to the remaining claims. As such, the rejection is maintained.
Conclusion
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/AYMAN FATIMA/Examiner, Art Unit 2176
/JAWEED A ABBASZADEH/Supervisory Patent Examiner, Art Unit 2176