Prosecution Insights
Last updated: May 04, 2026
Application No. 18/270,605

QUANTUM PREPROCESSING METHOD, DEVICE, STORAGE MEDIUM AND ELECTRONIC DEVICE

Non-Final OA §101§103§112
Filed
Jun 30, 2023
Priority
Dec 31, 2020 — CN 202011633352.2 +3 more
Examiner
LEE, TSU-CHANG
Art Unit
2126
Tech Center
2100 — Computer Architecture & Software
Assignee
Origin Quantum Computing Technology (Heifei) Co. Ltd.
OA Round
1 (Non-Final)
72%
Grant Probability
Favorable
1-2
OA Rounds
8m
Est. Remaining
87%
With Interview

Examiner Intelligence

Grants 72% — above average
72%
Career Allowance Rate
306 granted / 422 resolved
+17.5% vs TC avg
Moderate +14% lift
Without
With
+14.3%
Interview Lift
resolved cases with interview
Typical timeline
3y 6m
Avg Prosecution
19 currently pending
Career history
441
Total Applications
across all art units

Statute-Specific Performance

§101
40.7%
+0.7% vs TC avg
§103
28.7%
-11.3% vs TC avg
§102
5.4%
-34.6% vs TC avg
§112
15.6%
-24.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 422 resolved cases

Office Action

§101 §103 §112
The present application, filed on or after 16 March 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION This office action is in response to Applicant’s submission filed on30 June 2023. THIS ACTION IS NON-FINAL. Status of Claims Claims 1-18 are pending. Claims 16 include limitations interpreted under 35 U.S.C. 112(f), because it uses a generic placeholder coupled with functional language without reciting sufficient structure to achieve the function. Claim 16 is rejected under 35 U.S.C. 112(a) as failing to comply with the written description requirement. Claim 16 is rejected under 35 U.S.C. 112(b) as indefinite. Claim 17 is rejected under 35 U.S.C. 101 for being directed to signal per se. Claims 1-3, 16-18 are rejected under 35 U.S.C. 103 as unpatentable. Claims 4-15 are objected to for depending on rejected laims. There is no art rejection for claims 4-15. Claim Interpretation The following is a quotation of 35 U.S.C. 112(f): (f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph: An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. In claim 16, claim limitations "acquiring module", "constructing module", “computing module", “executing module" have been interpreted under 35 U.S.C. 112(f), because they use a generic placeholder coupled with functional language without reciting sufficient structure to achieve the function. The specification does not provide descriptions of the structure of these elements. If applicant wishes to provide further explanation or dispute the examiner’s interpretation of the corresponding structure, applicant must identify the corresponding structure with reference to the specification by page and line number, and to the drawing, if any, by reference characters in response to this Office action. If applicant does not intend to have the claim(s) limitations treated under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112 , sixth paragraph, applicant may amend the claim(s) so that it/they will clearly not invoke 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, or present a sufficient showing that the claim recites/recite sufficient structure, material, or acts for performing the claimed function to preclude application of 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. For more information, see MPEP § 2173 et seq. and Supplementary Examination Guidelines for Determining Compliance With 35 U.S.C. 112 and for Treatment of Related Issues in Patent Applications, 76 FR 7162, 7167 (Feb. 9, 2011). Claim Rejections - 35 USC § 112 112(b) Rejection The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. A claim is indefinite if, when read in light of the specification, it fails to inform, with reasonable certainty, those skilled in the art about the scope of the invention. Nautilus, Inc. v. Biosig Instruments, Inc., 110 USPQ.2d 1688, U.S. Supreme Court (2014). Claim 16 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. Regarding claim 16, "acquiring module", "constructing module", “computing module", “executing module", the specification does not provide limiting description to determine the scope of this limitation, the claim is therefore indefinite. 35 U.S.C. 112(a) Rejections The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. Claims 1-3, 6-13, and 16-20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for pre-AIA the inventor(s), at the time the application was filed, had possession of the claimed invention. Regarding claim 16, "acquiring module", "constructing module", “computing module", “executing module”, The specification does not provide descriptions of the structure of these elements. The claim is therefore rejected for failing to comply with the written description requirement. Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Non-Statutory Subject Matter Claim 17 is directed to non-statutory subject matter. The claim does not fall within at least one of the four categories of patent eligible subject matter because the claim is directed to signal per se, as the storage medium could be transitory signal. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-3, 16-18 are rejected under 35 U.S.C. 103 as being unpatentable over Cao et al, US-PGPUB NO.20200104740A1 [hereafter Cao] in view of Li et al, “A pre-processing hybrid algorithm for solving ill-conditioned linear equations”, Proceedings of the 2011 international conference on machine learning and cybernetics, Guilin, 10-13, July 2011 [hereafter Li]. With regards to claim 1, Cao teaches “A quantum preprocessing method for a linear system, characterized by comprising: acquiring element information of a first matrix A and a first vector b in a linear system Ax = b (Cao, FIG.1-7, [0054], [0065], [0074], [0101], PNG media_image1.png 535 744 media_image1.png Greyscale PNG media_image2.png 156 449 media_image2.png Greyscale ); … and constructing a first quantum circuit representing a quantum state evolution of a specific class of element in the second matrix and a second quantum circuit representing a quantum state evolution of a specific class of element in the second vector and executing a quantum state evolution operation respectively on the first quantum circuit and the second quantum circuit, to obtain an evolved quantum state of the first quantum circuit and an evolved quantum state of the second quantum circuit (Cao, FIG.2, 4-6, PNG media_image3.png 530 787 media_image3.png Greyscale )”. Cao does not explicitly detail “constructing a new matrix M for linear system preprocessing; computing a second matrix A and a second vector b for constructing a quantum circuit, according to the new matrix M”. However Li teaches “constructing a new matrix M for linear system preprocessing; computing a second matrix A and a second vector b for constructing a quantum circuit, according to the new matrix M (Li, 2. Ill-conditioned matrix pre-processing, PNG media_image4.png 142 395 media_image4.png Greyscale 3. Pre-processing hybrid algorithm)”. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, and having the teachings of Cao and Li before him or her, to modify the quantum computing system and method of Cao to include linear transformation pre-processing as shown in Li. The motivation for doing so would have been to reduce number of conditions (Li, Abstract). With regards to claim 2, Cao in view of Li teaches “The method of claim 1, wherein the specific class of element are non-zero elements (Cao, FIG.1, [0113] ‘put the qubits 104 partially or entirely into non-zero state …’)”. With regards to claim 3, Cao in view of Li teaches “The method of claim 1”. Cao does not explicitly detail “wherein the constructing a new matrix M for linear system preprocessing comprises: constructing the new matrix M for linear system preprocessing according to main diagonal elements of the first matrix A; wherein the computing a second matrix A’ and a second vector b’ for constructing a quantum circuit, according to the new matrix M comprises: computing the second matrix A’ and the second vector b’ according to an inverse matrix of the new matrix M, wherein the second matrix A’= M-1 A, and the second vector b'=M-1b”. However Li teaches “wherein the constructing a new matrix M for linear system preprocessing comprises: constructing the new matrix M for linear system preprocessing according to main diagonal elements of the first matrix A; wherein the computing a second matrix A’ and a second vector b’ for constructing a quantum circuit, according to the new matrix M comprises: computing the second matrix A’ and the second vector b’ according to an inverse matrix of the new matrix M, wherein the second matrix A’= M-1 A, and the second vector b'=M-1b (Li, 2. Ill-conditioned matrix pre-processing, 3. Pre-processing hybrid algorithm)”. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, and having the teachings of Cao and Li before him or her, to modify the quantum computing system and method of Cao to include linear transformation pre-processing as shown in Li. The motivation for doing so would have been to reduce number of conditions (Li, Abstract). Claims 16-18 are substantially similar to claim 11. The arguments as given above for claim 1 are applied, mutatis mutandis, to claims 16-18, therefore the rejection of claim 1 are applied accordingly. Additional Relevant Art The prior art made of record is considered pertinent to applicant’s disclosure and is recorded on Form PTO-892. Applicant is required under 37 C.F.R. § 1.111 (c) to consider these references fully when responding to this action, with particular attention paid to: Kerenidis et al., US-PGPUB NO.20210319351A1 [hereafter Kerenidis] shows quantum circuits. Ulyanov et al., US-PATENT NO.6578018B1 [hereafter Ulyanov] shows quantum computing with quantum gates. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to TSU-CHANG LEE whose telephone number is 571-272-3567. The fax number is 571-273-3567. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Omar Fernandez Rivas, can be reached 571-272-2589. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TSU-CHANG LEE/ Primary Examiner, Art Unit 2128
Read full office action

Prosecution Timeline

Jun 30, 2023
Application Filed
Apr 20, 2026
Non-Final Rejection — §101, §103, §112 (current)

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Prosecution Projections

1-2
Expected OA Rounds
72%
Grant Probability
87%
With Interview (+14.3%)
3y 6m (~8m remaining)
Median Time to Grant
Low
PTA Risk
Based on 422 resolved cases by this examiner. Grant probability derived from career allowance rate.

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