Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Claim Objections
The claim that follows claim 8 is numbered as claim 6. Examiner believes this second instance of claim 6 should be claim number 9. Appropriate correction required.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-13 are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception (i.e., a law of nature, a natural phenomenon, or an abstract idea) without significantly more.
Regarding independent claims the limitations determine whether or not to change a value, as drafted, recites functions that, under its broadest reasonable interpretation, covers a function that could reasonably be performed in the mind, including with the aid of pen and paper, but for the recitation of generic computer components. That is, the limitations as cited above as drafted, are functions that, under its broadest reasonable interpretation, recite the abstract idea of a mental process.
Thus, these limitation falls within the “Mental Processes” grouping of abstract ideas under Prong 1.
Under Prong 2, this judicial exception is not integrated into a practical application. The claim recites the following additional limitations: computer, physical resource, register, processor, and virtual device. The additional elements are recited at a high-level of generality such that it amounts no more than mere instructions to apply the exception using generic computer, and/or mere computer components, MPEP 2106.05(f), and steps of receiving and storing a value do nothing more than add insignificant extra solution activity to the judicial exception of merely gathering data. Accordingly, the additional elements do not integrate the recited judicial exception into a practical application and the claim is therefore directed to the judicial exception. See MPEP 2106.05(g) (Ex. v. Consulting and updating an activity log, Ultramercial, 772 F.3d at 715, 112 USPQ2d at 1754).
Under Step 2B, the claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements of computer, physical resource, register, processor, and virtual device amount to no more than mere instructions, or generic computer/computer components to carry out the exception. Furthermore, the limitations directed to receiving and storing a value the courts have identified mere data gathering is well-understood, routine and conventional activity. See MPEP 2106.05(d) (Ex. iv. Storing and retrieving information in memory, Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93;).
The recitation of generic computer instruction and computer components to apply the judicial exception, and mere data gathering do not amount to significantly more, thus, cannot provide an inventive concept. Accordingly, the claims are not patent eligible under 35 USC 101.
Regarding claim 2, 3, 5, 8, 11-13 the limitations of determining a change to a value, restoring a value, determining an order, are functions that can be reasonably performed in the human mind, thus, additional mental process defined in the claims. The claim does not include any additional element, thus, no limitation that needs to be analyzed under prong 2 for practical application, or under step 2B for significantly more.
Regarding claim 4, 9, 10 the limitations of saving a value and restoring a value are nothing more than insignificant extra solution activity which is not a practical application under prong 2. Under step 2B, the courts of identified the generic function of gathering/storing data, the results of the judicial exception, is well-understood, routine and conventional activity. See MPEP 2106.05(d) - i. Receiving or transmitting data over a network, e.g., using the Internet to gather data, Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362 (utilizing an intermediary computer to forward information); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 610, 118 USPQ2d 1744, 1745 (Fed. Cir. 2016) (using a telephone for image transmission); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network); buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network).
Regarding claim 7 the limitations of saving a value and restoring a value are nothing more than insignificant extra solution activity which is not a practical application under prong 2. Under step 2B, the courts of identified the generic function of gathering/storing data, the results of the judicial exception, is well-understood, routine and conventional activity. See MPEP 2106.05(d) - i. Receiving or transmitting data over a network, e.g., using the Internet to gather data, Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362 (utilizing an intermediary computer to forward information); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 610, 118 USPQ2d 1744, 1745 (Fed. Cir. 2016) (using a telephone for image transmission); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network); buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network). The limitation pertaining to determining is a function that can be reasonably performed in the human mind, thus, additional mental process defined in the claims.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claim 7 is rejected under 35 U.S.C. § 101 because the claimed invention is directed to non-statutory subject matter. During examination, the claims must be interpreted as broadly as their terms reasonably allow. In re American Academy of Science Tech Center, 367 F.3d 1359, 1369, 70 U.S.P.Q.2d 1827, 1834 (Fed. Cir. 2004). Independent claim 7 recites a “a computer program… to execute the following processing…” which is not comprehensively defined by the specification. The broadest reasonable interpretation of a claim drawn to a program covers software per se in view of the ordinary and customary meaning of program, particularly when the specification is silent. Software per se is not a “process,” a “machine,” a “manufacture,” or a “composition of matter” as defined in 35 U.S.C. § 101.
Claim Rejections - 35 USC §103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim/s 1-4, 6-10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Zidenberg (Pat. No. US 11,126,474) in view of Acharya (Pub. No. US 2017/0083998) in further view of Hayes (Pub. No. US 2020/0326967).
Claim 1, 6, 7, Zidenberg teaches “a … computer comprising a physical resource including a processor having a register and a plurality of physical devices … , the … computer generating a plurality of virtual devices by allocating the physical resource through time-division ([Col. 3, Lines 10-15] (17) Each of VMs 1-N (130a-130c) may be assigned one or more virtual CPUs (VCPUs) 140a, 140b, or 140c. VCPUs are mapped to allocated time slices of available logical processors in the physical computer and can be scheduled by the hypervisor to allow more virtual processors than available logical processors. [Col. 16, Lines 50-57] (84) In some instances, the hardware processor(s) 820 may be a single core processor or a multi-core processor. A multi-core processor may include multiple processing units within the same processor. In some embodiments, the multi-core processors may share certain resources, such as buses and second or third level caches. In some instances, each core in a single or multi-core processor may also include multiple executing logical processors (or executing threads).)”.
However, Zidenberg may not explicitly teach the remaining limitations.
Zidenberg does teach virtual devices may be context switched [Col. 5, Lines 33-41] “For example, in Intel x86 processors, a physical hardware device (e.g., a CPU) may monitor the execution within a VCPU on a VM. When an excessive number of iterations around a spinlock are detected (e.g., signaled by the occurrence of many executions of “Pause” instructions), the physical hardware device (e.g., the CPU) may cause the VCPU to exit and return the control to the hypervisor so that the hypervisor can schedule another VCPU to run”.
Acharya teaches context switching of processes such that teaches “a plurality of physical devices each having a register ([0005] The processing unit may have on-chip memory [0050] Computing device 2 may include additional modules or processing units not shown in FIG. 1 for purposes of clarity.) wherein the processor saves a register value of the processor related to a first virtual device among the virtual devices and restores a register value of the processor related to a second virtual device among the virtual devices when switching from the first virtual device to the second virtual device ([0093] In some examples, the processing unit may be configured to apply a signature algorithm to binary data stored in on-chip memory of the processing unit. For example, the processing unit may be configured to apply a signature algorithm to data stored in the registers of the processing unit, memory (e.g., RAM) of the processing unit, and/or any other data structure or memory location of the processing unit. [0103] FIG. 3. The processing unit may be configured to store context information corresponding to the switch-out process (i.e. VCPU as taught by Zidenberg) in external memory (70). It is understood that the order of operations shown in FIGS. 3-5 is exemplary and may be different in other examples. For example, the processing unit may be configured to store context information corresponding to the switch-out process in external memory (70) before generating one or more signatures (54) corresponding to context information stored in on-chip memory of the processing unit. The processing unit may be configured to determine whether any of the generated one or more signatures match any previously generated signatures (56) in the same manner as described above with respect to FIG. 3. [0106] For each on-chip signature that does not match an off-chip signature, the processing unit is configured to restore context information for the switched-in process from external memory (e.g., external memory 10) (62). By avoiding redundant, unnecessary restoration of data, the present disclosure enables faster context switching by decreasing latency, and also enables a reduction in power and energy consumed. The processing unit may be configured to proceed from block 72 and block 62 to execute the switched-in process (64). In other examples, the processing unit may return to block 56 from blocks 72 and 62 until each on-chip signature has been resolved (e.g., whether the processing unit has determined whether each on-chip signature matches or does not match an off-chip signature and/or whether blocks 72 and 62 have resolved each instance of a match or a non-match). Once the processing unit has resolved each on-chip signature (or the minimum amount necessary to start executing the switched-in process) generated at block 56, then the processing unit may be configured to proceed to execute the switched-in process (64).), determines whether or not it is necessary to change a register value of the physical device to be used by the second virtual device when switching from the first virtual device to the second virtual device ([0102] The processing unit may be configured to proceed from block 58 and block 60 to restore context information for the switched-in process from external memory (e.g., external memory 10) (62). Following restoration of the context information for the switched-in process, the processing unit may be configured to execute the switched-in process (64). In other examples, the processing unit may return to block 56 from blocks 58 and 62 until each on-chip signature has been resolved (e.g., whether the processing unit has determined whether each on-chip signature matches or does not match an off-chip signature and/or whether blocks 72 and 62 have resolved each instance of a match or a non-match). Once the processing unit has resolved each on-chip signature (or the minimum amount necessary to start executing the switched-in process) generated at block 56, then the processing unit may be configured to proceed to execute the switched-in process (64).), and restores the register value of the physical device related to the second virtual device in the physical device if it is determined that change is necessary ([Fig. 5, 56] No match [0102] The processing unit may be configured to proceed from block 58 and block 60 to restore context information for the switched-in process from external memory (e.g., external memory 10) (62).)”.
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to apply the teachings of Acharya with the teachings of Zidenberg in order to provide a system that teaches details of determining matches when switching context. The motivation for applying Acharya teaching with Zidenberg teaching is to provide a system that allows for improved context switching. Zidenberg, Acharya are analogous art directed towards context switching. Together Zidenberg, Acharya teach every limitation of the claimed invention. Since the teachings were analogous art known at the filing time of invention, one of ordinary skill could have applied the teachings of Acharya with the teachings of Zidenberg by known methods before the effective filing date of the claimed invention and gained expected results.
However, the combination may not explicitly teach the computer is vehicle mounted.
Hayes teaches in an analogous art of context switching a “a vehicle-mounted computer ([0061] Readers will appreciate that any of the methods described above may be carried out, for example, by one or more modules of computer program instructions executing on computer hardware such as a CPU, a GPU, and so on. In such an example, the one or more modules of computer program instructions that are executing on computer hardware may be included in an apparatus such as a special purpose computing device, a server or other general purpose computing device, or in some other way. Such an apparatus may reside inside the autonomous vehicle itself such that the autonomous vehicle itself may perform the steps described above.)”.
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to apply the teachings of Hayes with the teachings of Zidenberg, Acharya in order to provide a system that teaches a different operating environment. The motivation for applying Hayes teaching with Zidenberg, Acharya teaching is to provide a system that allows for design choice. Zidenberg, Acharya, Hayes are analogous art directed towards context switching. Together Zidenberg, Acharya, Hayes teach every limitation of the claimed invention. Since the teachings were analogous art known at the filing time of invention, one of ordinary skill could have applied the teachings of Hayes with the teachings of Zidenberg, Acharya by known methods before the effective filing date of the claimed invention and gained expected results.
Claim 2, the combination teaches the claim, wherein Acharya teaches “the vehicle-mounted computer according to claim 1, further comprising: a device configuration table including register values to be set in the physical devices to be used by each of the plurality of virtual devices, wherein the processor determines whether or not it is necessary to change the register value of the physical device to be used by the second virtual device by referring to the device configuration table when switching from the first virtual device to the second virtual device, and restores the register value of the physical device to be used by the second virtual device in the physical device if it is determined that change is necessary ([0098] In other examples, one or more previously generated signatures may be stored in on-chip memory of the processing unit. In this regard, while some examples throughout this disclosure refer to comparing on-chip signatures to off-chip signatures, it is understood that if the particular example is implemented, then such portions of this disclosure may refer to comparing currently generated on-chip signatures to previously generated on-chip signatures. In such examples, currently generated on-chip signatures are analogous to on-chip signatures, and previously generated on-chip signatures are analogous to off-chip signatures with the exception that the previously generated signatures are actually stored in on-chip memory of the processor instead of being stored in external memory. [0114] The processing unit may be configured to store, to at least one of the one or more memories, any signature of the one or more signatures that is determined not to match any previously generated signature stored in at least one of the one or more memories (104). The processing unit may be configured to store, to at least one of the one or more memories, the current context information respectively corresponding to the one or more signatures determined not to match any previously generated signature stored in at least one of the one or more memories (106).)”.
Rationale to claim 1 is applied here.
Claim 3, 8 the combination teaches the claim, wherein Acharya teaches “the vehicle-mounted computer according to claim 1, wherein if it is determined that it is not necessary to change the register value of the physical device, the processor skips processing for restoring the register value of the physical device ([0105] It is understood that block 72 shows what is not being restored from external memory to on-chip memory of the processing unit. In some examples, the processing unit may include instructions to this effect. For example, block 72 may be synonymous with skipping or avoiding a restoring operation. In other examples, in the event of an on-chip signature matching an off-chip signature match, block 56 may proceed directly to block 64. In such examples, by proceeding directly to block 64, block 72 is skipped or avoided, resulting in the context information corresponding to the on-chip signature not being restored due to block 72 not being invoked or processed.)”.
Rationale to claim 1 is applied here.
Claim 4, 6, 10 the combination teaches the claim, wherein Acharya teaches “the vehicle-mounted computer according claim 1, wherein the processor saves a register value of the physical device to be used by the first virtual device, and restores the register value of the physical device to be used by the second virtual device, when switching from the first virtual device to the second virtual device ([0106] For each on-chip signature that does not match an off-chip signature, the processing unit is configured to restore context information for the switched-in process from external memory (e.g., external memory 10) (62). By avoiding redundant, unnecessary restoration of data, the present disclosure enables faster context switching by decreasing latency, and also enables a reduction in power and energy consumed. The processing unit may be configured to proceed from block 72 and block 62 to execute the switched-in process (64). In other examples, the processing unit may return to block 56 from blocks 72 and 62 until each on-chip signature has been resolved (e.g., whether the processing unit has determined whether each on-chip signature matches or does not match an off-chip signature and/or whether blocks 72 and 62 have resolved each instance of a match or a non-match). Once the processing unit has resolved each on-chip signature (or the minimum amount necessary to start executing the switched-in process) generated at block 56, then the processing unit may be configured to proceed to execute the switched-in process (64).)”.
Rationale to claim 1 is applied here.
Claim/s 5, 11, 12, 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Zidenberg, Acharya, Hayes in further view of Beranek (Pat. No. US 9,250,891).
Claim 5, 11, 12, 13, the combination may not explicitly teach the limitation.
Beranek teaches “the vehicle-mounted computer according to claim 1, wherein the processor refers to the device configuration table and determines a switching order of the plurality of virtual devices that minimizes the number of changes to the register values of the physical devices, and the processor controls operation of the plurality of virtual devices in the determined order ([Col. 8, Lines 59-Col. 9, Line 11] (42) From operation 308, the routine 300 proceeds to operation 310, where the classloader 106 might store class usage data 112 describing the computational cost (e.g. the CPU cycles and/or memory required to load the class) and/or the resource cost (e.g. the number of disk I/O operations, network I/O operations, or other types of resource usage used to load the class) of loading a class 108, or classes 108. For example, the classloader 106 might store class usage data 112 describing the performance impact caused by loading a particular class 108. Classes 108 that are larger in size or require certain types of processing might have a larger performance impact, while classes 108 that are smaller in size or that do not require processing might have a lower performance impact. Using this data, the classloader 106 might determine that classes 108 having a larger computation cost or resource cost are not to be pre-loaded into the cache 114 or vice versa. Similarly, the classloader 106 might conclude that there is insufficient benefit to loading classes 108 that have a smaller computational cost or resource cost. This information might also be used in other ways in other configurations.)”.
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to apply the teachings of Beranek with the teachings of Zidenberg, Acharya, Hayes in order to provide a system that teaches a different operating environment. The motivation for applying Hayes teaching with Zidenberg, Acharya teaching is to provide a system that allows for design choice. Zidenberg, Acharya, Hayes are analogous art directed towards context switching. Together Zidenberg, Acharya, Hayes teach every limitation of the claimed invention. Since the teachings were analogous art known at the filing time of invention, one of ordinary skill could have applied the teachings of Hayes with the teachings of Zidenberg, Acharya by known methods before the effective filing date of the claimed invention and gained expected results.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to WYNUEL S AQUINO whose telephone number is (571)272-7478. The examiner can normally be reached 9AM-5PM EST M-F.
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/WYNUEL S AQUINO/Primary Examiner, Art Unit 2199
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