DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 16-18, 25 and 28-30 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Blum et al (US 2018/0152094 A1).
Regarding claim 16, Blum et al discloses a power converter (Figure 2), comprising: at least two power semiconductor modules (Figure 2, references 15-19, paragraph 0049), each of the at least two power semiconductor modules (Figure 2, references 15-19, paragraph 0049) including a power semiconductor (Figure 2, reference 16) and power contacts (Figure 2, reference 17) which are electrically conductively connected (Figure 2, references 19, 23 and 25) to the power semiconductors (Figure 2, reference 16) via an external circuit (Figure 2, reference 24) for a parallel connection (paragraph 0045) of the at least two power semiconductor modules (Figure 2, references 16-19); and an additional connection having a lower parasitic inductance or a lower series resistance, or both, (Figure 2, reference 26) than the external circuit (Figure 2, reference 24) and electrically conductively connecting the power semiconductors (Figure 2, reference 16) of the at least two power semiconductor modules (Figure 2, references 15-19) to one another (paragraph 0046).
Regarding claim 17, Blum et al discloses wherein the at least two power semiconductor modules are identical (Figure 2, references 15-19 up, down, left and right).
Regarding claim 18, Blum et al discloses wherein the additional connection (Figure 2, reference 26) has a current-carrying capacity which is lower than a current-carrying capacity of the external circuit (Figure 2, reference 24).
Regarding claim 25, Blum et al discloses wherein the additional connection (Figure 2, reference 26) comprises conductors running in parallel (Figure 2, reference 22).
Regarding claim 28, Blum et al discloses wherein the additional connection comprises a filter element (Figure 2, reference 26).
Regarding claim 29, Blum et al discloses wherein the additional connection comprises a PTC thermistor (Figure 2, reference 26).
Regarding claim 30, Blum et al discloses a method for producing a power converter (Figure 2) comprising at least two power semiconductor modules (Figure 2, references 15-19, paragraph 0049), each of the at least two power semiconductor modules (Figure 2, references 15-19, paragraph 0049) including a power semiconductor (Figure 2, reference 16) and power contacts (Figure 2, reference 17), the method comprising: electrically conductively connecting (Figure 2, references 19 and 23) the power semiconductors (Figure 2, reference 16) to the power contacts (Figure 2, reference 17) of the corresponding one of the at least two power semiconductor modules (Figure 2, references 15-19, paragraph 0049); electrically conductively connecting the power contacts (Figure 2, reference 17) of the at least two power semiconductor modules (Figure 2, references 15-19, paragraph 0049) in parallel via an external circuit (Figure 2, reference 24); and electrically conductively connecting the power semiconductors (Figure 2, reference 16) to one another via an additional connection having a lower parasitic inductance (Figure 2, reference 26) or a lower series resistance, or both, than the external circuit (Figure 2, reference 24).
Allowable Subject Matter
Claim 19-24, 26, 27 and 31-35 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: The prior art does not disclose nor fairly suggest a power converter, comprising: wherein each of the at least two power semiconductor modules includes a housing containing respective ones of the power contacts, said additional connection being arranged so as to extend through the housing (claim 19) and wherein the conductors running in parallel form a filter having a limit frequency in a MHz range (claim 26) further incorporated into independent claim 16 and in the context of its recited apparatus, along with its depending claims and method for producing a power converter comprising: installing each of the at least two power semiconductor modules in a corresponding housing that comprises the power contacts; and arranging the additional connection so as to run through the housing of each of the at least two power semiconductor modules (claim 31) and integrating connection elements of the additional connection into the housing of each of the at least two power semiconductor modules, and electrically conductively connecting the connection elements via a separate contact element (claim 32), further incorporated into independent claim 30 and in the context of its recited process, along with its depending claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MONICA D HARRISON whose telephone number is (571)272-1959. The examiner can normally be reached M-F 7-4:30pm.
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/MONICA D HARRISON/ Primary Examiner, Art Unit 2815
mdh
May 12, 2026
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