Prosecution Insights
Last updated: July 17, 2026
Application No. 18/273,532

Electrophoretic Display Substrate and Manufacturing Method thereof, and a Electrophoretic Display Device

Non-Final OA §102
Filed
Jul 20, 2023
Priority
Jul 08, 2022 — nonprovisional of PCTCN2022104677
Examiner
THOMAS, BRANDI N
Art Unit
2872
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
BOE Technology Group Co., Ltd.
OA Round
1 (Non-Final)
82%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
90%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allowance Rate
911 granted / 1105 resolved
+14.4% vs TC avg
Moderate +8% lift
Without
With
+7.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
26 currently pending
Career history
1129
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
65.3%
+25.3% vs TC avg
§102
31.4%
-8.6% vs TC avg
§112
0.2%
-39.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1105 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement Acknowledgement is made of receipt of Information Disclosure Statement(s) (PTO-1449) filed 1/18/2024. An initialed copy is attached to this Office Action. Election/Restrictions Applicant's election with traverse of claims 1-17 in the reply filed on 2/24/2026 is acknowledged. The traversal is on the ground(s) that claim 1 in Group I and claim 18 in Group II each include similar limitations. Therefore these features can be regarding as the same technical features between Groups I and II. Therefore the two groups of claims do not lack unity of invention, and there would not be a serious burden for the examination. This is found persuasive and claims 18-20 have been rejoined and are examined below. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-7 and 16-18 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Liyuan Liu (CN 10903719), hereinafter ‘719. Regarding claims 1 and 18, ‘719 discloses, in figures 2 and 3, a display substrate (1 display panel) (paragraph 60), comprising: a base substrate (10, substrate base plate) (paragraph 60); and a circuit structure layer (21, pixel circuit region) (paragraph 73) and an electronic paper film sequentially (25 or 220, light emitting layer) disposed on the base substrate (10, substrate base plate) (paragraph 77 and figures 2-4), wherein: the circuit structure layer comprises: a plurality of first signal lines (11, first signal lines) extending along a first direction (row direction) (paragraph 61); a plurality of second signal lines (12, second signal lines) extending along a second direction (column direction); a plurality of drive units (211, driving units) (paragraph 77); and at least one near field communication coil, wherein the first direction is intersected with the second direction (paragraph 72 and figure 3); the plurality of first signal lines and the plurality of second signal lines are intersected to form a plurality of sub-pixel areas (43, sub-pixel regions) (paragraphs 13-14 and 61-62); the drive units are located in the sub-pixel area (43, sub-pixel regions) and electrically connected with the first signal lines and the second signal lines (figure 6), and the drive units are configured to control display patterns of the electronic paper film corresponding to the sub-pixel areas (paragraphs 62, 73, and 78); and the near field communication coil comprises at least one first communication line (gate line) extending along the first direction and at least one second communication line (data line) extending along the second direction (figure 3 and paragraphs 20 and 72), wherein the at least one first communication line is electrically connected with the at least one second communication line (paragraph 72). Further regarding claim 18, ‘719 discloses wherein the drive units (211, driving units) of the circuit structure is configured to control the display patterns of the electronic paper film corresponding to the sub-pixel areas (paragraphs 74-75 and 82). Regarding claim 2, ‘719 discloses, in figures 2 and 3, wherein at least one first signal line (11, first signal lines) is adjacent to the first communication line (gate lines) in the second direction, and at least one second signal line (12, second signal lines) is adjacent to the second communication line (data lines) in the first direction (see annotated figure 3 below). PNG media_image1.png 404 388 media_image1.png Greyscale Regarding claim 3, ‘719 discloses, in figures 2 and 3, wherein at least one sub-pixel area (43, sub-pixel regions) is spaced between two adjacent first communication lines (gate lines) in the second direction and at least one sub-pixel area (shown in annotated figure 3 above) is spaced between two adjacent second communication lines (data lines) in the first direction (see figure 3 above). Regarding claim 4, ‘719 discloses, in figures 2 and 3, wherein the at least one first communication line is located on a side of the at least one second communication line close to the base substrate; the plurality of first signal lines are located on a side of the plurality of second signal lines close to the base substrate (see figure 3 above). Regarding claim 5, ‘719 discloses, in figures 2 and 3, wherein the at least one second communication line and the plurality of second signal lines are in a same layer (see figure 3 above and paragraphs 18 and 73). Regarding claim 6, ‘719 discloses, in figures 2 and 3, wherein the at least one first communication line and the plurality of first signal lines are in a same layer (see figure 3 above and paragraphs 18 and 73). Regarding claim 7, ‘719 discloses, in figures 2 and 3, wherein the at least one first communication line is located on a side of the plurality of first signal lines away from the base substrate (figure 3 above). Regarding claim 16, ‘719 discloses, in figures 2 and 3, wherein the electronic paper film is configured to display using incident light from a side of the base substrate (paragraphs 60, 66, and 70). Regarding claim 17, ‘719 discloses, in figure 11, a display device (500, display device), comprising a display substrate according to claim 1 (paragraph 102). Allowable Subject Matter Claim 8-15 and 19-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The prior art of record fails to teach or fairly suggest to one of ordinary skill in the art at the time of the invention, in conjunction with all the other claimed limitation, a display substrate having all the claimed features of applicant's instant invention, specifically including: in claim 8, wherein the at least one first communication line comprises a plurality of first sub-communication line segments extending along the first direction and sequentially arranged, two adjacent first sub-communication line segments are electrically connected by a first connection electrode located on a side of the first sub-communication line segment away from the base substrate; in claim 9, wherein the base substrate comprises: at least one near field communication area and at least one non-near field communication area, wherein the at least one near field communication coil is located within the at least one near field communication area, and the at least one non-near field communication area is provided with at least one first dummy communication line extending along the first direction and at least one second dummy communication line extending along the second direction; the first communication line is disconnected from the first dummy communication line, and the second communication line is disconnected from the second dummy communication line; in claim 10, wherein the circuit structure layer further comprises: a plurality of touch signal lines and a plurality of touch electrodes; the plurality of touch signal lines extend along the second direction, and at least one ouch signal line is electrically connected with the plurality of touch electrodes electrically connected with each other and spaced apart; in claim 19, forming the circuit structure layer on the base substrate comprises: forming a first conductive layer, a first insulation layer, a semiconductor layer, a first transparent conductive layer, a second conductive layer, a second insulation layer, a third insulation layer, and a second transparent conductive layer on the base substrate sequentially; the first conductive layer at least comprises: the plurality of first signal lines, gates of transistors of the drive units; the semiconductor layer at least comprises: active layers of the transistors of the drive units; the first transparent conductive layer comprises: a plurality of touch electrodes; the second conductive layer at least comprises: the plurality of second signal lines, the at least one second communication line and a plurality of touch signal lines, first electrodes and second electrodes of the transistors of the drive units; and the second transparent conductive layer at least comprises: a plurality of pixel electrodes of the drive units, as set forth in the claims. Liyuan Liu, hereinafter ‘719 disclose first and second signals (11 and 12, first and second signal lines) and first and second communications lines (data and gate lines) intersecting with one another. However, ‘719 is silent as to the plurality of sub-communication lines and the first and second dummy lines. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRANDI N THOMAS whose telephone number is (571)272-2341. The examiner can normally be reached Monday - Friday 7:30 - 3:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Stephone Allen can be reached at 571-272-2434. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /BRANDI N THOMAS/ Primary Examiner, Art Unit 2872
Read full office action

Prosecution Timeline

Jul 20, 2023
Application Filed
May 21, 2026
Non-Final Rejection mailed — §102 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12681355
DISPLAY MATERIAL INCLUDING PATTERNED AREAS OF ENCAPSULATED ELECTROPHORETIC MEDIA
3y 3m to grant Granted Jul 14, 2026
Patent 12674980
HEAD-UP DISPLAY DEVICE
3y 3m to grant Granted Jul 07, 2026
Patent 12663685
DISPLAY DEVICE
3y 2m to grant Granted Jun 23, 2026
Patent 12656652
ASYMMETRIC DRIVING FOR OPTICAL MODULATOR
1y 5m to grant Granted Jun 16, 2026
Patent 12650584
METHOD, OPTICAL APPARATUS AND RETROFIT KIT FOR PRODUCING LIGHT SHEETS BY MEANS OF A RETROREFLECTOR
3y 4m to grant Granted Jun 09, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
82%
Grant Probability
90%
With Interview (+7.8%)
2y 10m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1105 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month