DETAILED ACTION
This is a response to Applicant’s submissions filed on 12/16/2025. Claims 1 and 4-10 are pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 12/16/2025 has been entered.
Information Disclosure Statement
The information disclosure statement filed on 10/15/2025 has been reviewed and considered.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1 and 4-10 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1 and 8-9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jung (US 2020/0382597) in view of Hanf et al. (US 6,115,831), hereinafter Hanf, and Saito (JP 3987163).
Regarding claim 1, Jung discloses a vehicle diagnostic device for an electric vehicle, the vehicle diagnostic device comprising: a connector (Jung; para. 53: external diagnostic device 300 is connected to a communication port (OBD-II) 240 for diagnosis. The communication port 240, which is a connector called a diagnostic link connector (DLC), is formed with a total of 16 pins) configured to be attached to or detached from a diagnostic controller area network (D-CAN) channel (Jung; para. 87: D-CAN to which the OBD or OEM diagnostic device is connected) in a vehicle network system of the electric vehicle (Jung; fig. 1); collecting diagnosis data from the vehicle network system through a CAN interface while in a wakeup mode (Jung; fig. 8: diagnosis response S115); and a first signal line, a second signal line, a ground line configured to transmit a ground voltage and a power line configured to transmit a power source voltage of a power circuit provided in the electric vehicle through the connector (Jung; para. 53: external diagnostic device 300 is connected to a communication port (OBD-II) 240).
Jung does not explicitly disclose a controller area network (CAN) transceiver connected to a first signal line, a second signal line, a ground line configured to transmit a ground voltage and a power line configured to transmit a power source voltage of a power circuit provided in the electric vehicle through the connector; a wakeup circuit connected to the first signal line or the second signal line through the connector; and a control circuit configured to change from a sleep mode to a wakeup mode in response to an input of a first wakeup signal outputted by the CAN transceiver or a second wakeup signal outputted by the wakeup circuit in the sleep mode, wherein the CAN transceiver is configured to output the first wakeup signal to the control circuit in response to an input of a wakeup pattern from the D-CAN channel, wherein, while the CAN transceiver cannot output the first wakeup signal, the wakeup circuit is configured to output the second wakeup signal to the control circuit in response to an input voltage from the first signal line or the second signal line being larger than a reference voltage, the reference voltage being based on the power source voltage from the power line transmitted to the CAN transceiver through the connector, and wherein the reference voltage is less than a bias voltage output to the first signal line.
Hanf, in the same field of endeavor (automotive CAN circuits), discloses a controller area network (CAN) transceiver connected to a first signal line, a second signal line (Hanf; col. 4, ll. 31-32: IC 100 is connected between the CAN_H and CAN_L bus wires), a ground line configured to transmit a ground voltage and a power line configured to transmit a power source voltage of a power circuit (Hanf; col. 4, ll. 61-65: IC 100 has a connection 13 to ground GND and a connection 14 to the feed potential VBATT—which is preferably obtained by way of a reverse-polarity protection device 19, from a higher order supply potential UBATT—); a wakeup circuit connected to the first signal line or the second signal line (Hanf; col. 6: a wakeup recognition logic (WAKEUP LOGIC) 111, on the one hand, which is connected with the above-described terminal 7 and, on the other hand, with the bus wires CAN_H and CAN_L); and a control circuit (Hanf; col. 8, ll. 35-36: the voltage regulator is switched on by ENA/NINH from the IC 100; col. 5, ll. 2-4: output 20.2 of the regulator 20 supplies operating current to the microcontroller 21) configured to change from a sleep mode to a wakeup mode in response to an input of a first wakeup signal outputted by the CAN transceiver or a second wakeup signal outputted by the wakeup circuit in the sleep mode (Hanf; col. 9, ll. 20-26: In the case of a wakeup due to activity on CAN_H/CAN_L, such activity is sensed by the wakeup logic 111 in block 110 which causes the switch 141 in control block 140 to activate the voltage regulator 20. As a result, VCC is switched on, activating the bus protocol chip 22, of the clock oscillator of the microcontroller 21 and its watchdog (not shown).), wherein the CAN transceiver is configured to output the first wakeup signal to the control circuit in response to an input of a wakeup pattern from the CAN channel, wherein, while the CAN transceiver cannot output the first wakeup signal (e.g., when the first wakeup signal has not been received), the wakeup circuit is configured to output the second wakeup signal to the control circuit (Hanf; col. 6, ll. 7-10: wakeup logic is configured to convert either an analog wakeup signal (or a wakeup signal edge) from the connection 7, or a wakeup message from the bus into a standardized WAKEUP signal).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention, with a reasonable expectation of success, to have modified the processor of the external diagnostic device of Jung to be enabled by a voltage regulator that is controlled by an integrated circuit comprising wakeup recognition logic, as disclosed by Hanf, to yield the predictable result of conserving power during times when the vehicle is not producing diagnostic data.
Jung, as modified, does not explicitly disclose outputting the second wakeup signal in response to an input voltage from the first signal line or the second signal line being larger than a reference voltage, the reference voltage being based on the power source voltage from the power line transmitted to the CAN transceiver through the connector, and wherein the reference voltage is less than a bias voltage output to the first signal line.
Saito, in a reasonably pertinent field of endeavor (differential-signal based communication circuits), discloses outputting a signal in response to an input voltage from a first signal line or a second signal line being larger than a reference voltage (Saito; para. 9: When the cable 10 is connected between the nodes A and B, the common-mode voltage TPBIAS from the node A is transmitted to the port TPB of the node B via the signal line pair [L0+, L0-] of the cable 10, whereby an input voltage VCNA higher than the comparison reference voltage VS is input to the comparator 22, and a comparator output CNA of a predetermined logical value, for example, the logical value L, is obtained.), the reference voltage being based on a power source voltage from a power line (Saito; para. 48: comparison reference voltage VS for the comparator 22 is also continuously supplied from a reference voltage generator (not shown) as long as the power supply is on at the node) transmitted to a transceiver (Saito; para. 40: node B also has a common mode voltage generating amplifier 20, two differential transceivers [16a, 16b], [18a, 18b]) through a connector (Saito; para. 4: Two pairs of signal lines [L0+, L0-] and [L1+, L1-] of a cable 10 are detachably connected between two devices or nodes A and B … via connectors 12 and 14.), wherein the reference voltage is less than a bias voltage output to the first signal line (Saito; para. 8: At the port TPA of each of the nodes A and B, under active operating conditions, the amplifier 20 applies a common-mode voltage TPBIAS having a constant voltage value (e.g., 1.8 V); para. 31: comparison reference voltage Vs applied to the comparator 22 is also set to 0.8V).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention, with a reasonable expectation of success, to have modified, in response to the analog wakeup signal, the WAKEUP signal generated by the wakeup recognition logic of Jung, as modified, to be output when a bias voltage is detected on the differential signal lines, as disclosed by Saito, with the motivation of enabling the diagnostic device to quickly switch to an active operating state thereby providing a plug-and-play function (Saito; para. 34) that increases convenience for a user.
Regarding claim 8, Jung, as modified, discloses the control circuit includes: a voltage regulator configured to step-down the power source voltage from the power circuit in the electric vehicle to another voltage in response to the input of the first wakeup signal or the second wakeup signal (Hanf; col. 8, ll. 35-36: the voltage regulator is switched on by ENA/NINH from the IC 100); and a data processing unit configured to operate in the wakeup mode in response to an input of the power source voltage from the voltage regulator in the sleep mode (Hanf; col. 5, ll. 2-4: output 20.2 of the regulator 20 supplies operating current to the microcontroller 21).
Regarding claim 9, Jung, as modified, discloses the control circuit is further configured to change from the sleep mode to the wakeup mode in response to the input of the first wakeup signal or the second wakeup signal maintaining for a predetermined time in the sleep mode (Hanf; col. 19, ll. 34-54: IC 100 … may also comprise filter elements, particularly with a low-pass characteristic. For example, such a filter element 80 may be arranged between terminal 7 and the function block 111 (WAKEUP logic) … They may also be quasi-digital filters, for example, those with a predetermined response time on the order of several bus bit lengths.).
Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jung in view of Hanf and Saito as applied to claim 1 above, and further in view of Kay et al. (Comparator with Hysteresis Reference Design), hereinafter Kay.
Regarding claim 4, Jung, as modified, discloses the invention substantially as claimed as described above.
Jung, as modified, does not explicitly disclose the wakeup circuit includes a voltage divider to split the power source voltage from the power circuit provided in the electric vehicle to generate the reference voltage.
Kay, in the field of endeavor (analog circuit design), discloses a circuit includes a voltage divider to split a power source voltage from a power circuit to generate a reference voltage (Kay; p. 3: Figure 2 shows a typical configuration for a comparator that does not use hysteresis. This configuration uses a voltage divider (Rx and Ry) to set up the threshold voltage. The comparator will compare the input signal (Vin) to the threshold voltage (Vth).).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention, with a reasonable expectation of success, to have used a voltage divider, as disclosed by Kay, as the reference voltage generator of Jung, as modified, to yield the predictable result of setting the comparator switching threshold relative to the input voltage using a minimal quantity of simple, reliable, and low-cost parts.
Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jung in view of Hanf and Saito as applied to claim 1 above, and further in view of Toshiba (Basics of Operational Amplifiers and Comparators).
Regarding claim 5, Jung, as modified, discloses the wakeup circuit includes: a comparator configured to output a low voltage level in response to the input voltage being larger than the reference voltage (Saito; para. 9: When the cable 10 is connected between the nodes A and B, the common-mode voltage TPBIAS from the node A is transmitted to the port TPB of the node B via the signal line pair [L0+, L0-] of the cable 10, whereby an input voltage VCNA higher than the comparison reference voltage VS is input to the comparator 22, and a comparator output CNA of a predetermined logical value, for example, the logical value L, is obtained.); and a signal transmission circuit (Hanf; col. 7, ll. 36-40: for initializing the microcontroller 21, it has a controlled switch or a gate 141 which emits at the terminal 1 of block 100 a switch-off or switch-on signal ENA/NINH for the voltage regulator 20) configured to output the power source voltage from the power circuit provided in the electric vehicle, as the second wakeup signal, to the control circuit, in response to the low level voltage (Hanf; col. 5, ll. 50-57: Block 110 also provides the internal current supply for all partial functions from the supply potential applied at terminal 14 of the IC 100. A control or switching potential fed, for example, through block 140 (for generating an ENA/NINH signal for control purposes in the bus user apparatus in question or for the voltage regulator 20 in the example according to FIG. 1a) is made available to block 140 by way of a path 151.).
Jung, as modified, does not explicitly disclose the comparator outputs a high level voltage in response to the input voltage being larger than the reference voltage.
Toshiba, in the same field of endeavor (analog circuit design), discloses a comparator outputs a high level voltage in response to an input voltage being larger than a reference voltage (Toshiba; p. 10 § 2.6: A comparator acts as follows when the inverting input is connected to a reference voltage and the voltage to be monitored is connected to the noninverting input … Voltage to be monitored (noninverting input) > reference voltage (inverting voltage) → The output terminal provides a High level.).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention, with a reasonable expectation of success, to have modified the VCNA and VS inputs of the comparator of Jung, as modified, by swapping them to output a high value when the input voltage is larger than the reference voltage, as disclosed by Toshiba, to yield the predictable result of inverting the output of the circuit.
Claim(s) 6-7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jung in view of Hanf, Saito and Toshiba as applied to claim 5 above, and further in view of Kumar et al. (US 2015/0326226), hereinafter Kumar, and Rehm (MOSFET driver: a common cause of failure).
Regarding claim 6, Jung, as modified, discloses the invention substantially as claimed as described above.
Jung, as modified, does not explicitly disclose the signal transmission circuit includes: a first transistor including a gate, a source and a drain, wherein the gate is connected to an output pin of the comparator; a first resistor connected between the gate of the first transistor and the source of the first transistor; a second resistor connected between the source of the first transistor and a ground; a second transistor including a gate, a source connected to the power circuit and a drain connected to the control circuit; a third resistor connected between the gate of the second transistor and the source of the second transistor; and a fourth resistor connected between the gate of the second transistor and the drain of the first transistor.
Kumar, in the same field of endeavor (analog electronic circuits), discloses a signal transmission circuit includes: a first transistor including a gate, a source and a drain, wherein the gate is connected to an output pin of a logic circuit (Kumar; fig. 1: transistor 132); a second transistor including a gate, a source connected to a power circuit and a drain connected to a load circuit (Kumar; fig. 1: pass element 130); a third resistor connected between the gate of the second transistor and the source of the second transistor (Kumar; fig. 1: resistor 134); and a fourth resistor connected between the gate of the second transistor and the drain of the first transistor (Kumar; fig. 1: resistor 136).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention, with a reasonable expectation of success, to have replaced the controlled switch of Jung, as modified, with a load switch, as disclosed by Kumar, wherein the switch is operably connected to the comparator’s output pin to control the supply of power to the voltage regulator from the power supplied by the vehicle, as further disclosed by Jung, as modified, with the motivation of selectively switching ON/OFF of peripherals or sub-circuits of the electronic device thereby providing a simple and inexpensive method for an electronic device to conserve power (Kumar; para. 13).
Jung, as modified, does not explicitly disclose a first resistor connected between the gate of the first transistor and the source of the first transistor and a second resistor connected between the source of the first transistor and a ground.
Rehm, in the same field of endeavor (analog electronic circuits), discloses a resistor connected between the source of a transistor and a ground (Rehm; fig. 5: R3).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention, with a reasonable expectation of success, to have modified the first transistor of the load switch of Jung, as modified, with a resistor between its source and ground, as disclosed by Rehm, to yield the predictable result of limiting the current through the transistor.
Jung, as modified, does not explicitly disclose a first resistor connected between the gate of the first transistor and the source of the first transistor.
Rehm further discloses a resistor connected between a gate of a transistor and a source of a transistor (Rehm; fig. 5: Rgs).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention, with a reasonable expectation of success, to have modified the first transistor of the load switch of Jung, as modified, to include a resistor between its gate and source, as disclosed by Rehm, with the motivation of reducing the impedance of the gate line thereby increasing immunity to interference (Rehm, pg. 3).
Regarding claim 7, Jung, as modified, discloses the first transistor is an N-channel metal-oxide-semiconductor field-effect transistor (MOSFET) (Kumar; para. 27: the first transistor 342 is an NMOS transistor), and wherein the second transistor is a P-channel MOSFET (Kumar; para. 26: the pass element 330 is a PMOS transistor).
Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jung in view of Hanf and Saito as applied to claim 1 above, and further in view of Kilmurray et al. (US 2010/0127857), hereinafter Kilmurray.
Regarding claim 10, Jung, as modified, discloses the control circuit is further configured to change from the wakeup mode to the sleep mode (Hanf; col. 8, ll. 42-50: The selection bits present at the terminals 5 (STANDBY/STB) and 6 (TRANSMIT ENABLE/EN) select one of the four operating modes (for example) SLEEP, STANDBY, RECEIVE ONLY, and NORMAL of the IC 100. These operating modes are managed within the framework of a higher order bus management software for the operation of the bus network and are initiated explicitly by the application software of the corresponding electronic apparatus in which the considered IC 100 is situated.).
Jung, as modified, does not appear to explicitly disclose changing from the wakeup mode to the sleep mode in response to the second wakeup signal being not inputted for a predetermined time after the change from the sleep mode to the wakeup mode by the second wakeup signal
Kilmurray, in the same field of endeavor (vehicle diagnostic wakeup circuits), discloses changing from a wakeup mode to a sleep mode in response to a wakeup signal being not inputted for a predetermined time (Kilmurray; para. 47: if the communications bus 28 has been inactive for a predefined time period, or if a sleep message is received, the wake-up circuit 18 may send a disable signal to, or remove an enable signal from, the data logger 16, or may switch the power to the data logger 16 off).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention, with a reasonable expectation of success, to have modified the SLEEP mode of the integrated circuit of Jung, as modified, to be entered after a predetermined time without receiving a wakeup signal, as disclosed by Kilmurray, with the motivation of entering a low-power state thereby protecting against unintentional power source depletion (Kilmurray; para. 10).
Conclusion
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/JOSEPH THOMPSON/Examiner, Art Unit 3665
/Erin D Bishop/Supervisory Patent Examiner, Art Unit 3665