Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 07/17/2026 has been entered.
Status of Claims
Claim 1 is amended. Claim 8 is canceled. Claims 9-12 are withdrawn. Claims 13-14 are newly added. Claims 1-7 and 9-14 remain pending.
Response to Remarks
Statement of Substance of Interview
The examiner thanks applicant for the summary of the contents of the interview conducted 06/16/2026.
Claim Objections
In light of the cancelling of claim 8, the objection is withdrawn.
Claim Rejections – 35 USC § 112
The examiner acknowledges the amendments to claim 1, removing the limitation “…and to analyze the target based on the measured magnitude”. However, the newly added amendment drawn to: “an image generator configured to provide a mapping image corresponding to changes in the magnitude of the peak current measured by the sensing circuit during scanning of the target” raises new issues under § 112(a)-(b).
Claim Rejections – 35 USC § 103
In the response filed 07/17/2026, the applicant amended the subject matter of claim 8 into the independent claim 1. The applicant argues that the combined teachings of Yonehara and Beyrard fail to teach the claimed invention as a whole (REMARKS, p. 12). The Examiner respectfully disagrees. Specifically, the Applicant argues that Yonehara and Beyrard fail to teach:
“measuring peak current magnitudes of a photocurrent, distinguishing between a first peak current corresponding to a leading edge of pulsed light and a second peak current corresponding to trailing edge, or providing a mapping image corresponding to changes in such peak current magnitudes during scanning of a target.”
The test for obviousness is not whether the features of a secondary reference may be bodily incorporated into the structure of the primary reference; nor is it that the claimed invention must be expressly suggested in any one or all of the references. Rather, the test is what the combined teachings of the references would have suggested to those of ordinary skill in the art. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981).
Furthermore, the specific features are expressed as known and conventional in the art for signal detection, and “would reasonably include current sensing circuitry, peak detection circuitry, and signal processing circuitry configured to process transient photocurrent signals generated by a PN junction” (REMARKS filed 02/09/2026, p. 10). This prior art admission is what is relied upon in the combination, of which the applicant’s arguments fail to acknowledge.
The applicant argues that specific features of the sensing circuit for using a leading/trailing edge peak current magnitude during a scanning enables significant detection improvements (REMARKS filed 07/17/2026, p. 13). However, the applicant’s previous admission of the sensing circuitry conventional structures and predictable outcomes of using a peak detecting sensing circuitry appears to conflict with their current position of providing “unexpected benefits” (Ibid., p. 13). The mere statement of unexpected benefits does not amount to a demonstration, and the applicant hasn’t pointed. Applying a known technique (sensing circuitry for detecting leading or trail edge peak currents of a sensing element) to a known device (see Yonehara and Beyrard) ready for improvement to yield predictable results would have been obvious to one of ordinary skill in the art at the time of filing.
The applicant argues that statements by applicant regarding features being “readily construed” was made solely in response to the rejections under § 112(a) and (b) and do not constitute admissions regarding the prior art and cannot be used as evidence of obviousness under § 103. The Examiner respectfully disagrees. MPEP §§ 2129 and 2120.02 explains:
“A statement by an applicant in the specification or made during prosecution identifying the work of another as “prior art” is an admission which can be relied upon for both anticipation and obviousness determinations, regardless of whether the admitted prior art would otherwise qualify as prior art under the statutory categories of 35 U.S.C. 102. Riverwood Int’l Corp. v. R.A. Jones & Co., 324 F.3d 1346, 1354, 66 USPQ2d 1331, 1337 (Fed. Cir. 2003); Constant v. Advanced Micro-Devices Inc., 848 F.2d 1560, 1570, 7 USPQ2d 1057, 1063 (Fed. Cir. 1988).”
Thus, the Applicant arguments are not persuasive and the rejection is maintained.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: “image generator configured to…” in claim 1.
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-7 and 13-14 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites the phrase “sensing circuit”. According to the applicant’s disclosure, the sensing circuit appears to be a conventional ammeter capable of measuring current magnitudes, but the claim includes additional functional limitations (“…configured to measure a magnitude of either a first peak current of the photocurrent corresponding to a leading edge of the infrared pulse light or a second peak current of the photocurrent corresponding to a trailing edge of the infrared pulse light”) that distinguish the element, leaving the scope of the phrase is unclear.
Claim 1 recites the phrase “image generator configured to provide a mapping image corresponding to changes in the magnitude of the peak current measured by the sensing circuit during scanning of the target”. It is unclear if the biosensing device further includes a scanning means that is not explicitly disclosed, or the phrase is recited as intended use. One of ordinary skill would not be apprised of the scope of the claim.
The balance of claims are rejected based on dependence.
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-7 and 13-14 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claims 1-7 and 13-14 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the enablement requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to enable one skilled in the art to which it pertains, or with which it is most nearly connected, to make and/or use the invention.
Claim 1 recites the phrase:
“…a sensing circuit configured to measure a magnitude configured to measure a magnitude of either a first peak current of the photocurrent corresponding to a leading edge of the infrared pulse light or a second peak current of the photocurrent corresponding to a trailing edge of the infrared pulse light…”.
Regarding written description, the disclosure fails to provide the specific structure of the sensing circuit which supports the function. Simply reciting a desired functional result (e.g., "a sensing circuit configured to measure X") without describing the structural steps, schematic blocks, or physical layout needed to achieve that result fails the possession test. See MPEP 2161 for details. Regarding enablement, the specification does not provide sufficient structural details or working examples for all forms of the sensing circuit encompassed by the functional language. Accordingly, building a suitable circuit would require undue experimentation. Dependent claims fail to address the issue.
Claim 1 recites the phrase:
“…an image generator configured to provide a mapping image corresponding to changes in the magnitude of the peak current measured by the sensing circuit during scanning of the target”.
Regarding written description, the phrase invokes § 112(f) as explained above under Claim Interpretation. Because the phrase is a computer-implemented functional limitation (CIFL), the disclosure must provide a corresponding algorithm, flow chart, mathematical equations or explicit method steps detailing the CIFL. The supporting disclosure is silent regarding these features and thus the instant phrase lacks written description. See MPEP § 2161 and § 2181(II) for details. Regarding enablement, the specification does not provide sufficient details or working examples for all forms of the image generator encompassed by the functional language. Accordingly, building a suitable image generator would require undue experimentation. Additionally, CIFL of claims 13 and 14 are rejected for the same reasons set forth above.
The balance of claims are rejected based on dependence.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1, 2, 13, 14 are rejected under 35 U.S.C. 103 as being unpatentable over Yonehara et al. (JP 2016214512 A) in view of Beyrard (JP 2009500136 A).
Regarding claim 1, Yonehara teaches a bio-sensing device (under "Background-art": "The sensor is used for detecting a biological signal") with a photoelectric circuit (Fig. 1: photoelectric conversion layers 231, 232) the device comprising:
an infrared ("The light emitted from the light emitting layer 121 may be... infrared light") pulse generator (Fig. 3: light emitting unit can receive pulse signal from pulse generator 901a) configured to irradiate infrared pulsed light (Fig. 1: 121a, 121b) to a target (Fig. 1: measurement object 60);
the photoelectric circuit configured to receive the infrared pulsed light which has
transmitted through the target (Fig. 1: light 121a, b transmits through target to
photoelectric conversion layers), and to generate photocurrent based on the received
light ("a current corresponding to the number of carriers generated in the first
photoelectric conversion layer 231 flows...")
Yonehara does not teach a sensing circuit configured to measure a magnitude of either a first peak current of the photocurrent corresponding to a leading edge of the infrared pulsed light or a second peak current of the photocurrent corresponding to a trailing edge of the infrared pulsed light, and to analyze the target based on the measured magnitude. Per applicant's remarks (02/09/2026), sensing circuits for measuring photoelectric current, detecting peaks, and processing transient photocurrent signals generated by a PN junction are well-known and conventional structures to one of ordinary skill in the art for measuring a signal from a pn-junction. It would have been obvious to one of ordinary skill in the art at the time of filing to apply a known technique (circuitry capable of measuring a peak current magnitude analyzing the magnitude to obtain information) to a known device ready for improvement (the bio-sensing device of Yonehara) to yield predictable results (a bio-sensor that irradiates pulsed infrared light through a target onto a photoelectric device, generating a photocurrent with peaks corresponding to the leading and trailing edges of the pulsed light, with the magnitudes of the peaks measured and analyzed by a sensing circuit). See KSR Int'l Co. V. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007) and MPEP 2143. Yonehara does not teach an image generator configured to generate a mapping image of the target based on a change in the magnitude of the peak current measured by the sensing circuit. In the same field of endeavor, Beyrard teaches an image generator configured to generate a mapping image of the target (Abstract and Fig. 26: detectors 13a and 13b detect light intensity after attenuation through target; converter 15 turns light intensity into data, which is used to generate an image by computer 27). The image generator of Beyrard uses light intensity data to generate the mapping rather than the magnitudes of peak currents induced in a photoelectric circuit, measured by the sensing circuit. However, the necessary components of the sensing circuit are well-known in the art, per applicant's remarks. In light of the teachings of Beyrard, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to further modify Yonehara (already modified with the well-known peak detection circuitry, as outlined in the rejection of claim 1) to include circuitry that converts the peak current magnitudes measured at various points on the target to data, which is then processed into an image by a computer. Image generation based on the data provides the benefit of allowing the operator to view and analyze all the peak currents at once in order to determine the condition of the target.
Regarding claim 2, Yonehara teaches a pulse period of the infrared pulsed light being in a range of 1-100 ms (Paragraph beginning with "When the frequency..." in machine translation: "frequency of the pulse voltage [powering the light emitters] can be, for example, 100 Hz to 100 KHz [.01 ms to 10 ms]"). Yonehara does not teach a ratio of a pulse width to the pulse period of the infrared pulsed light being in a range of 1% to 10%. However, Yonehara explains that using a pulsed voltage to power the light emitter causes it to emit light for a shorter duration than with a constant voltage; therefore, power consumption is reduced and deterioration of the light emitter is slowed (Paragraph beginning with "According to this embodiment, the sensor..." in machine translation). It logically follows that further reducing the duty cycle of the pulse generator (and thus the ratio of the pulse width to the pulse period of the light) will further reduce power consumption and slow the deterioration of the light source. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to reduce the duty cycle of the pulsed light to a value in a range of 1% to 10% as a result of routine optimization of the device of Yonehara. This obtains a pulse duration that minimizes the emission time of the light while still being long enough to induce and detect transient photocurrents.
Regarding claim 13, the phrase “wherein the mapping image is provided based on a change in magnitude of the peak current to indicate whether the target is damaged.” Is a recitation of intended use of the device. The combined reference disclose the limitations of the claim as the combination would be capable of the recitation.
Regarding claim 14, Beyrard discloses the image generator providing a mapping image of peak current from a target (computer 27).
Claim(s) 3, 4, 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yonehara et al. (JP 2016214512 A) in view of Beyrard (JP 2009500136 A), further in view of Fukuda (JP 6554300 B2).
Regarding claim 3, Yonehara does not teach the photoelectric circuit comprising: a p-type semiconductor layer; an n-type semiconductor layer formed on the p-type semiconductor layer such that a PN junction is formed between the p-type semiconductor layer and the n-type semiconductor layer, wherein the infrared pulsed light is incident on the n-type semiconductor layer; and a transparent current collector formed on a surface of the n-type semiconductor layer. In the same field of endeavor, Fukuda teaches the photoelectric circuit (under "Technical-Field": photoelectric conversion device) comprising: a p-type semiconductor layer (Fig. 1: p-type semiconductor layer 7); an n-type semiconductor layer (Fig. 1: n-type semiconductor layer 5), wherein the light is incident on the n-type semiconductor layer (Fig. 1; Note the intervening translucent substrate 2 does not prevent the light from being incident on the n-type semiconductor 5); a transparent current collector formed on a surface of the n-type semiconductor layer (Fig. 1: transparent conductive layer 3). Neither Yonehara nor Fukuda directly teach the n-type semiconductor layer being formed on the p-type semiconductor layer such that a PN junction is formed between the p-type semiconductor layer and the n-type semiconductor layer. Rather, Fukuda teaches an intervening i-type semiconductor layer, forming a PIN diode. However, PN junctions formed between p- and n-type semiconductor layers are well-known in the art, and the insertion of an i-type layer is a well-known modification to this junction that simply widens the depletion region while maintaining a similar function. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to simply substitute the PIN junction of Fukuda with a simpler PN junction, obtaining predictable results (a photoelectric circuit with a PN junction between the p- and n-type layers, with the benefit of a simpler design and manufacturing process). See MPEP 2143. In light of the teachings of Fukuda, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Yonehara such that the photoelectric circuit involves a PN junction formed between p- and n-type semiconductor layers, with the infrared pulsed light being incident on the n-type layer, and a transparent current collector is formed on a surface of the n-type semiconductor layer. This is an altogether simple, functional, and easily manufacturable structure for the photoelectric circuit.
Regarding claim 4, Yonehara does not teach the photoelectric circuit generating the
photocurrent using a self-bias generated by the PN junction. In the same field of endeavor, Fukuda teaches the photoelectric circuit generating the photocurrent using a self-bias generated by the PIN diode (Paragraph beginning with "Here, prior to the description of each component..." in machine translation describes light being absorbed by the i-type layer, causing charge separation inside the i-type layer, forming electrons and holes. Electrons and holes are collected in n-type layer and p-type layer respectively, then collected in the transparent conductive layer and back electrode layer respectively). This is largely identical to the process by which a PN diode photoelectric circuit generates photocurrent using a self-bias, except that the i-type layer simply widens the depletion region of the PN junction. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to substitute the PIN junction of Fukuda with a simpler PN junction, obtaining predictable results (a photoelectric circuit wherein the photocurrent is generated using a self-bias generated by a PN junction). See KSR Int'l Co. V. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007). In light of the teachings of Fukuda, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Yonehara such that the photoelectric circuit involves a PN junction formed between p- and n-type semiconductor layers, with the photocurrent being generated using a self-bias from the PN junction. This is an altogether simple, functional, and easily manufacturable structure for the photoelectric circuit that does not require an external power supply to generate the current (and, in fact, generating the current using an external supply rather than a self-bias would simply be counterintuitive to the goal of photocurrent-based imaging).
Regarding claim 6, Fukuda teaches the transparent current collector comprising at least one selected from silver nanowire, IGZO (Indium Gallium Zinc Oxide), IZO (Indium Zinc Oxide), SIZO (Silicon Indium Zinc Oxide), HIZO (Hafnium Indium Zinc Oxide), ZTO (Zinc Tin Oxide), ZnO (Paragraph beginning with "the transparent conductive layer 3 is not..." in machine translation: zinc oxide liste d), Ga₂O₃, In₂O₃, and SnO₂. This is a list of materials well-known to be transparent and conductive and therefore used in transparent conductive collectors. Zinc oxide in particular is highly transparent, minimizing parasitic light absorption while providing good conductivity of the photocurrent. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use a transparent current collector comprising zinc oxide in the photoelectric device.
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Yonehara et al. (JP 2016214512 A) in view of Beyrard (JP 2009500136 A), Fukuda (JP 6554300 B2) and Song et al. (KR 20180013787 A).
Regarding claim 5, the combination of Yonehara and Fukuda does not teach the p-type
semiconductor layer comprising p-type silicon (p-Si), and the n-type semiconductor layer comprising titanium dioxide (TiO₂). In the same field of endeavor, Song teaches a p-type semiconductor layer comprising p-type silicon (p-Si) (Fig. 3: p+-BSF channel formed in silicon substrate 100), and the n-type semiconductor layer comprising titanium dioxide (Fig. 3 and paragraph beginning with "Referring to FIG. 3" in machine translation: metal oxide layer 130 may be a titanium [di]oxide film) In light of the teachings of Song, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combination of Yonehara and Fukuda such that the p-type layer comprises silicon and the n-type layer comprises titanium dioxide. Using these materials in combination enhances carrier separation and reduces combination, as is well- known in the art.
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Yonehara et al. (JP 2016214512 A) in view of Beyrard (JP 2009500136 A), Fukuda (JP 6554300 B2) and Oh et al. (US 20190067507 A1).
Regarding claim 7, the combination of Yonehara and Fukuda does not teach the sensing circuit being electrically connected to and disposed between the p-type semiconductor layer and the n-type semiconductor layer. In the same field of endeavor, Oh teaches the sensing circuit being electrically connected to and disposed between the p-type semiconductor layer and the n-type semiconductor layer (Paragraph [0134]: "a negative terminal and a positive terminal of an ammeter (not shown) are respectively connected to the n-type electrode 360 and the p-type electrode 370 to measure current generated in the light receiving device". See Fig. 8). In light of the teachings of Oh, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combination of Yonehara and Fukuda such that an ammeter is connected to measure the current between the p-type and n-type semiconductor layers. This provides a simple and immediate structure to measure the induced photocurrents and peaks directly, rather than reading out a voltage as in Yonehara.
Conclusion
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CASEY BRYANT
Primary Examiner
Art Unit 2884
/CASEY BRYANT/ Primary Examiner, Art Unit 2884