DETAILED ACTION This action is in response to claims filed 25 March 2024 for application 28 July 2023. Currently claims 1-3, 5-6, 9-11, 13, 19-20, 24, 26, 29, 33, 37, 44, 46-47, 51-54, and 56 are pending. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg , 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman , 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi , 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum , 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel , 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington , 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA. A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA/25, or PTO/AIA/26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer . Claim s 1-3, 5, 19-20, 24, 26, 29, 51-52, and 54 are rejected on the ground of nonstatutory double patenting a s being unpatentable over claim FILLIN "Pluralize \“Claim\” if necessary, and insert the claim number(s) of the U.S. Patent." 16 of U.S. Patent No. 12,299,422 B2 . Although the claims at issue are not identical, they are not patentably distinct from each other because : Instant Application US 12,299,422 Claim 1 Claim 16 An apparatus comprising: a resource state interconnect having a plurality of output paths to output a resource state during each of a plurality of operating cycles, wherein each resource state is a quantum system of multiple entangled qubits, wherein different qubits of the resource state are output on a different ones of the output paths; a plurality of routing switches, each routing switch having an input path coupled to a different one of the output paths of the resource state interconnect and a plurality of output paths, wherein each routing switch is configured to receive a different qubit of the resource state on the input path and to selectably route the received qubit to one of the plurality of output paths; a plurality of reconfigurable fusion circuits, each of the plurality of reconfigurable fusion circuits being configured to receive two input qubits and to selectably perform either a projective entangling measurement between the two input qubits or one of a plurality of single-qubit measurements on each of the two input qubits, thereby producing measurement outcome data; a plurality of delay lines having different delay lengths, wherein different delay lines are coupled between respective output paths of the resource state interconnect and respective input paths of different ones of the routing switches; and a plurality of routing paths including a plurality of local routing paths and a plurality of network routing paths, wherein the local routing paths are coupled between the routing switches and the reconfigurable fusion circuits such that each of the routing switches is coupled to at least one of the reconfigurable fusion circuits and wherein each of the network routing paths exits the apparatus. A system comprising: a network of interleaving modules, each interleaving module including: a resource state interconnect having a plurality of output paths to output a resource state during each of a plurality of operating cycles, wherein each resource state is a quantum system of multiple entangled physical qubits, wherein different physical qubits of the resource state are output on a different ones of the output paths; a plurality of reconfigurable fusion circuits, each of the plurality of reconfigurable fusion circuits being configured to receive two input physical qubits and to selectably perform either a projective entangling measurement between the two input physical qubits or one of a plurality of single-qubit measurements on each of the two input physical qubits, thereby producing measurement outcome data; a plurality of routing switches, each routing switch having an input path coupled to a respective one of the output paths of the resource state interconnect and a plurality of output routing paths selectably coupled to the input path, wherein, for each routing switch, the plurality of output routing paths includes: a first local path, wherein the first local paths of different ones of the routing switches introduce different delays; a plurality of internal port routing paths; and a plurality of port transfer paths that exit the interleaving module; and a plurality of external port routing paths to receive physical qubits from a plurality of other interleaving modules in the network, wherein the plurality of reconfigurable fusion circuits includes: a plurality of local fusion circuits, wherein each local fusion circuit is coupled to respective first local routing paths of two of the routing switches; and a plurality of port fusion circuits, wherein each port fusion circuit has a first input coupled to one of the internal port routing paths of one of the routing switches and a second input coupled to one of the of the external port routing paths, and wherein, for a first one of the routing switches, the plurality of output routing paths further includes a plurality of internal quickswap routing paths, and wherein, for a second one of the routing switches, the plurality of output routing paths further includes a plurality of quickswap transfer paths that exit the circuit; and a plurality of external quickswap routing paths that receive physical qubits from a plurality of external circuits, wherein the plurality of reconfigurable fusion circuits includes: a plurality of local fusion circuits, wherein each local fusion circuit is coupled to respective first local routing paths of two of the routing switches; and a plurality of quickswap fusion circuits, wherein each quickswap fusion circuit has a first input coupled to one of the internal quickswap routing paths of the first one of the routing switches and a second input coupled to one of the of the external quickswap routing paths. Claim 1 of the instant application is fully anticipated by claim 16 of the ‘422 patent. Claims 26 and 51 are largely the same subject matter and are similarly rejected. Claim 2 of the instant application is fully anticipated by claim 16 of the ‘422 patent. Claim 3 of the instant application is fully anticipated by claim 21 of the ‘422 patent. Claim 5 of the instant application is fully anticipated by claim 18 of the ‘422 patent. Claim 19 of the instant application is fully anticipated by claim 21 of the ‘422 patent. Claim 20 of the instant application is fully anticipated by claim 22 of the ‘422 patent. Claim 24 of the instant application is fully anticipated by claim 25 of the ‘422 patent. Claim 29 of the instant application is fully anticipated by claim 20 of the ‘422 patent. Claim 52 of the instant application is fully anticipated by claim 16 of the ‘422 patent. Claim 54 of the instant application is fully anticipated by claim 21 of the ‘422 patent. Claim s 1-3, 19-20, 24, 26, 51 and 56 are rejected on the ground of nonstatutory double patenting a s being unpatentable over claim FILLIN "Pluralize \“Claim\” if necessary, and insert the claim number(s) of the U.S. Patent." 16 of U.S. Patent No. 12,271,714 B2 . Although the claims at issue are not identical, they are not patentably distinct from each other because : Instant Application US 12,271,714 Claim 1 Claim 1 An apparatus comprising: a resource state interconnect having a plurality of output paths to output a resource state during each of a plurality of operating cycles, wherein each resource state is a quantum system of multiple entangled qubits, wherein different qubits of the resource state are output on a different ones of the output paths; a plurality of routing switches, each routing switch having an input path coupled to a different one of the output paths of the resource state interconnect and a plurality of output paths, wherein each routing switch is configured to receive a different qubit of the resource state on the input path and to selectably route the received qubit to one of the plurality of output paths; a plurality of reconfigurable fusion circuits, each of the plurality of reconfigurable fusion circuits being configured to receive two input qubits and to selectably perform either a projective entangling measurement between the two input qubits or one of a plurality of single-qubit measurements on each of the two input qubits, thereby producing measurement outcome data; a plurality of delay lines having different delay lengths, wherein different delay lines are coupled between respective output paths of the resource state interconnect and respective input paths of different ones of the routing switches; and a plurality of routing paths including a plurality of local routing paths and a plurality of network routing paths, wherein the local routing paths are coupled between the routing switches and the reconfigurable fusion circuits such that each of the routing switches is coupled to at least one of the reconfigurable fusion circuits and wherein each of the network routing paths exits the apparatus. A circuit comprising: a resource state interconnect having a plurality of output paths to output a resource state during each of a plurality of operating cycles, wherein each resource state is a quantum system of multiple entangled physical qubits, wherein the physical qubits are photonic qubits, and wherein different physical qubits of the resource state are output on a different ones of the output paths; a plurality of reconfigurable fusion circuits, each of the plurality of reconfigurable fusion circuits being configured to receive two input physical qubits and to selectably perform either a projective entangling measurement between the two input physical qubits or one of a plurality of single-qubit measurements on each of the two input physical qubits, thereby producing measurement outcome data; a plurality of routing switches, each routing switch having an input path coupled to a respective one of the output paths of the resource state interconnect and a plurality of output routing paths selectably coupled to the input path, wherein, for each routing switch, the plurality of output routing paths includes: a first local path, wherein the first local paths of different ones of the routing switches introduce different delays; a plurality of internal port routing paths; and a plurality of port transfer paths that exit the circuit; and a plurality of external port routing paths to receive physical qubits from a plurality of external circuits, wherein the plurality of reconfigurable fusion circuits includes: a plurality of local fusion circuits, wherein each local fusion circuit is coupled to respective first local routing paths of two of the routing switches; and a plurality of port fusion circuits, wherein each port fusion circuit has a first input coupled to one of the internal port routing paths of one of the routing switches and a second input coupled to one of the of the external port routing paths. Claim 1 of the instant application is fully anticipated by claim 1 of the ‘714 patent. Claims 26 and 51 are largely the same subject matter and are similarly rejected. Claim 2 of the instant application is fully anticipated by claim 2 of the ‘714 patent. Claims 3 and 54 of the instant application are fully anticipated by claim 9 of the ‘714 patent. Claim 19 of the instant application is fully anticipated by claim 8 of the ‘714 patent. Claim 20 of the instant application is fully anticipated by claim 10 of the ‘714 patent. Claim 24 of the instant application is fully anticipated by claim 11 of the ‘714 patent. Claim 56 of the instant application is fully anticipated by claim 7 of the ‘714 patent. Allowable Subject Matter As allowable subject matter has been indicated, applicant's reply must either comply with all formal requirements or specifically traverse each requirement not complied with. See 37 CFR 1.111(b) and MPEP § 707.07(a). The following is a statement of reasons for the indication of allowable subject matter: None of the prior art, either alone or in combination, fairly discloses the limitations of the claim as a whole. Particularly, none of the references teach: a plurality of reconfigurable fusion circuits, each of the plurality of reconfigurable fusion circuits being configured to receive two input qubits and to selectably perform either a projective entangling measurement between the two input qubits or one of a plurality of single-qubit measurements on each of the two input qubits, thereby producing measurement outcome data; a plurality of delay lines having different delay lengths, wherein different delay lines are coupled between respective output paths of the resource state interconnect and respective input paths of different ones of the routing switches . The closest prior art includes Pant et al. ( Routing entanglement in the quantum internet ) which discloses various routing of qubits in a quantum system. Chan et al. ( Unitary-projective entanglement dynamics ) discloses projective entanglements but is silent as to the remainder of the claim. Harrison et al. (US 20120155870 A1) discloses selective routing of qubits. Wang et al. (US 10,379,420) by the same assignee discloses fusion circuits. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to FILLIN "Examiner name" \* MERGEFORMAT ERIC NILSSON whose telephone number is FILLIN "Phone number" \* MERGEFORMAT (571)272-5246 . The examiner can normally be reached FILLIN "Work Schedule?" \* MERGEFORMAT M-F: 7-3 . Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, FILLIN "SPE Name?" \* MERGEFORMAT James Trujillo can be reached at FILLIN "SPE Phone?" \* MERGEFORMAT (571)-272-3677 . The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. 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